New Upstream Snapshot - ruby-rsec
Ready changes
Summary
Merged new upstream version: 0.4.2+git20191210.1.59d0c7b (was: 0.4.2).
Resulting package
Built on 2023-01-12T09:33 (took 8m35s)
The resulting binary packages can be installed (if you have the apt repository enabled) by running one of:
apt install -t fresh-snapshots ruby-rsec
Diff
diff --git a/bench/little.tt b/bench/little.tt
new file mode 100644
index 0000000..9086145
--- /dev/null
+++ b/bench/little.tt
@@ -0,0 +1,44 @@
+grammar Arithmetic
+ rule expr
+ left:term right_opt:(op:[\+\-] right:term)* {
+ def value
+ right_opt.elements.inject(left.value) {|acc, plus_and_right|
+ acc.send \
+ plus_and_right.op.text_value,
+ plus_and_right.right.value
+ }
+ end
+ }
+ end
+
+ rule term
+ left:factor right_opt:(op:[\*\/] right:factor)* {
+ def value
+ right_opt.elements.inject(left.value) {|acc, mul_and_right|
+ acc.send \
+ mul_and_right.op.text_value,
+ mul_and_right.right.value
+ }
+ end
+ }
+ end
+
+ rule factor
+ '(' expr ')' {
+ def value
+ expr.value
+ end
+ }
+ /
+ number
+ end
+
+ rule number
+ [1-9] [0-9]* {
+ def value
+ text_value.to_f
+ end
+ }
+ end
+end
+
diff --git a/bench/parsec/Arithmetic.hs b/bench/parsec/Arithmetic.hs
new file mode 100644
index 0000000..23d12fd
--- /dev/null
+++ b/bench/parsec/Arithmetic.hs
@@ -0,0 +1,38 @@
+module Arithmetic where
+import Text.ParserCombinators.Parsec
+import Text.ParserCombinators.Parsec.Expr
+import Foreign.C.String
+
+expr :: Parser Integer
+expr = buildExpressionParser table factor
+ <?> "expression"
+
+table = [[op "*" (*) AssocLeft, op "/" div AssocLeft]
+ ,[op "+" (+) AssocLeft, op "-" (-) AssocLeft]
+ ]
+ where
+ op s f assoc = Infix (do{ string s; return f}) assoc
+
+factor = do{char '('
+ ; x <- expr
+ ; char ')'
+ ; return x
+ } <|> number <?> "simple expression"
+
+number :: Parser Integer
+number = do{ds <- many1 digit
+ ; return (read ds)
+ } <?> "number"
+
+calculate :: CString -> IO Int
+calculate cs = do
+ s <- peekCString cs
+ (Right x) <- return $ parse expr "" s
+ return (fromIntegral x)
+
+donothing :: CString -> IO Int
+donothing cs = return 0
+
+foreign export stdcall calculate :: CString -> IO Int
+foreign export stdcall donothing :: CString -> IO Int
+
diff --git a/bench/parsec/dllmain.c b/bench/parsec/dllmain.c
new file mode 100644
index 0000000..6b537ee
--- /dev/null
+++ b/bench/parsec/dllmain.c
@@ -0,0 +1,13 @@
+#include <windows.h>
+#include <Rts.h>
+extern void __stginit_Arithmetic(void);
+static char* args[] = { "ghcDll", NULL };
+BOOL APIENTRY DllMain(HANDLE hModule, DWORD reason, void* reserved)
+{
+ if (reason == DLL_PROCESS_ATTACH) {
+ startupHaskell(1, args, __stginit_Arithmetic);
+ return TRUE;
+ }
+ return TRUE;
+}
+
diff --git a/bench/parsec/make.bat b/bench/parsec/make.bat
new file mode 100644
index 0000000..0deec92
--- /dev/null
+++ b/bench/parsec/make.bat
@@ -0,0 +1,4 @@
+ghc -c Arithmetic.hs -fglasgow-exts -O2
+ghc -c dllmain.c -O2
+ghc -shared *.o -o Arithmetic.so -O2 -package parsec
+
diff --git a/bench/parsec/make.sh b/bench/parsec/make.sh
new file mode 100644
index 0000000..46f64c3
--- /dev/null
+++ b/bench/parsec/make.sh
@@ -0,0 +1,3 @@
+ghc -c Arithmetic.hs -fglasgow-exts -O2
+ghc -shared *.o -o Arithmetic.so -O2 -package parsec
+
diff --git a/debian/changelog b/debian/changelog
index a2b2cf9..c0a7e54 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,4 +1,4 @@
-ruby-rsec (0.4.2-2) UNRELEASED; urgency=medium
+ruby-rsec (0.4.2+git20191210.1.59d0c7b-1) UNRELEASED; urgency=medium
[ Utkarsh Gupta ]
* Add salsa-ci.yml
@@ -17,8 +17,9 @@ ruby-rsec (0.4.2-2) UNRELEASED; urgency=medium
+ ruby-rsec: Add :all qualifier for ruby dependency.
* Update watch file format version to 4.
* Bump debhelper from old 12 to 13.
+ * New upstream snapshot.
- -- Utkarsh Gupta <guptautkarsh2102@gmail.com> Tue, 13 Aug 2019 07:19:47 +0530
+ -- Utkarsh Gupta <guptautkarsh2102@gmail.com> Thu, 12 Jan 2023 09:27:44 -0000
ruby-rsec (0.4.2-1) unstable; urgency=medium
diff --git a/examples/c_minus.rb b/examples/c_minus.rb
index d987e3f..43d5f45 100644
--- a/examples/c_minus.rb
+++ b/examples/c_minus.rb
@@ -91,7 +91,7 @@ class CMinus
# p expr.parse! "gcd (v ,u- u/v *v)"
expr.map{|e| Expr[e] }
end
-
+
# statement parser builder, returns [stmt, block]
def statement var_decl
expr = expression()
@@ -114,9 +114,10 @@ class CMinus
}
stmt = block | if_stmt | while_stmt | return_stmt | expr_stmt
# p if_stmt.parse! 'if(v == 0)return u;'
+ # p block.parse! '{ int x; }'
[stmt, block]
end
-
+
def initialize
type_id = seq_(TYPE, ID).cached
# p type_id.parse! 'int a'
@@ -137,10 +138,10 @@ class CMinus
[ty, id, *maybe_bra]
}
params = param.join(COMMA).even | 'void'.r{[]}
- brace = seq_('(', params, ')')[1]
- fun_decl = seq_(type_id, brace, block){
- |(type, id), params, block|
- Function[type, id, params, block]
+ paren_args = seq_('(', params, ')')[1]
+ fun_decl = seq_(type_id, paren_args, block){|results|
+ type_id_result, params_result, block_result = results
+ Function[*type_id_result, params_result, block_result]
}
# p fun_decl.parse! 'int gcd(int u, int v){return 2;}'
@program = SPACE.join(fun_decl | var_decl | EOSTMT).odd.eof
diff --git a/examples/little_markdown.rb b/examples/little_markdown.rb
index 1449166..9191553 100644
--- a/examples/little_markdown.rb
+++ b/examples/little_markdown.rb
@@ -65,7 +65,7 @@ class LittleMarkdown
"<span id='#{id}'>#{text}</span>"
}
line = (img | link | strong | em | code | escape | id | text).star
- line.eof.map &:join
+ line.eof.map {|parts, _| parts.join }
end
# pseudo xml tag parser, except <br> and <hr> and <script>
diff --git a/examples/nasm_manual.rb b/examples/nasm_manual.rb
index 7a236b3..011f265 100644
--- a/examples/nasm_manual.rb
+++ b/examples/nasm_manual.rb
@@ -42,7 +42,7 @@ module NASMManualParser
tr_class = 'TR3/4/5/6/7'
classes = (imm_class.r | memoffs_class | mem_class | reg_class | tr_class).fail 'operand class'
reg = reg_parser.fail 'register'
- num = /\d/.r(&:to_i).fail 'num'
+ num = /\d/.r{|n, _| n.to_i }.fail 'num'
# memoffs should be left of mem
operand = classes | reg | num
operands = operand.join('/').even.join(',').even
@@ -107,7 +107,7 @@ module NASMManualParser
parsed = ''
parser = instruction_parser.eof
src = File.read filename
- src.lines.with_index do |raw_line, idx|
+ src.lines.to_a.each_with_index do |raw_line, idx|
line = raw_line.strip
# this shapy shows the line is something defining an nemonic
if line =~ /^\w+\s+[^;\[]+;\ [^;\[]+\[.+\]$/
diff --git a/examples/nasm_manual.txt b/examples/nasm_manual.txt
new file mode 100644
index 0000000..b7d2891
--- /dev/null
+++ b/examples/nasm_manual.txt
@@ -0,0 +1,3500 @@
+nasm.txt The Netwide Assembler: NASM
+
+Previous Chapter <nasmdo10.html> | Contents <nasmdoc0.html> | Index
+<nasmdoci.html>
+
+
+ Appendix A: Intel x86 Instruction Reference
+
+This appendix provides a complete list of the machine instructions which
+NASM will assemble, and a short description of the function of each one.
+
+It is not intended to be exhaustive documentation on the fine details of
+the instructions' function, such as which exceptions they can trigger:
+for such documentation, you should go to Intel's Web site,
+|http://www.intel.com/|.
+
+Instead, this appendix is intended primarily to provide documentation on
+the way the instructions may be used within NASM. For example, looking
+up |LOOP| will tell you that NASM allows |CX| or |ECX| to be specified
+as an optional second argument to the |LOOP| instruction, to enforce
+which of the two possible counter registers should be used if the
+default is not the one desired.
+
+The instructions are not quite listed in alphabetical order, since
+groups of instructions with similar functions are lumped together in the
+same entry. Most of them don't move very far from their alphabetic
+position because of this.
+
+
+ A.1 Key to Operand Specifications
+
+The instruction descriptions in this appendix specify their operands
+using the following notation:
+
+ * Registers: |reg8| denotes an 8-bit general purpose register,
+ |reg16| denotes a 16-bit general purpose register, and |reg32| a
+ 32-bit one. |fpureg| denotes one of the eight FPU stack registers,
+ |mmxreg| denotes one of the eight 64-bit MMX registers, and
+ |segreg| denotes a segment register. In addition, some registers
+ (such as |AL|, |DX| or |ECX|) may be specified explicitly.
+ * Immediate operands: |imm| denotes a generic immediate operand.
+ |imm8|, |imm16| and |imm32| are used when the operand is intended
+ to be a specific size. For some of these instructions, NASM needs
+ an explicit specifier: for example, |ADD ESP,16| could be
+ interpreted as either |ADD r/m32,imm32| or |ADD r/m32,imm8|. NASM
+ chooses the former by default, and so you must specify |ADD
+ ESP,BYTE 16| for the latter.
+ * Memory references: |mem| denotes a generic memory reference;
+ |mem8|, |mem16|, |mem32|, |mem64| and |mem80| are used when the
+ operand needs to be a specific size. Again, a specifier is needed
+ in some cases: |DEC [address]| is ambiguous and will be rejected
+ by NASM. You must specify |DEC BYTE [address]|, |DEC WORD
+ [address]| or |DEC DWORD [address]| instead.
+ * Restricted memory references: one form of the |MOV| instruction
+ allows a memory address to be specified /without/ allowing the
+ normal range of register combinations and effective address
+ processing. This is denoted by |memoffs8|, |memoffs16| and
+ |memoffs32|.
+ * Register or memory choices: many instructions can accept either a
+ register /or/ a memory reference as an operand. |r/m8| is a
+ shorthand for |reg8/mem8|; similarly |r/m16| and |r/m32|. |r/m64|
+ is MMX-related, and is a shorthand for |mmxreg/mem64|.
+
+
+ A.2 Key to Opcode Descriptions
+
+This appendix also provides the opcodes which NASM will generate for
+each form of each instruction. The opcodes are listed in the following way:
+
+ * A hex number, such as |3F|, indicates a fixed byte containing that
+ number.
+ * A hex number followed by |+r|, such as |C8+r|, indicates that one
+ of the operands to the instruction is a register, and the
+ `register value' of that register should be added to the hex
+ number to produce the generated byte. For example, EDX has
+ register value 2, so the code |C8+r|, when the register operand is
+ EDX, generates the hex byte |CA|. Register values for specific
+ registers are given in section A.2.1 <#section-A.2.1>.
+ * A hex number followed by |+cc|, such as |40+cc|, indicates that
+ the instruction name has a condition code suffix, and the numeric
+ representation of the condition code should be added to the hex
+ number to produce the generated byte. For example, the code
+ |40+cc|, when the instruction contains the |NE| condition,
+ generates the hex byte |45|. Condition codes and their numeric
+ representations are given in section A.2.2 <#section-A.2.2>.
+ * A slash followed by a digit, such as |/2|, indicates that one of
+ the operands to the instruction is a memory address or register
+ (denoted |mem| or |r/m|, with an optional size). This is to be
+ encoded as an effective address, with a ModR/M byte, an optional
+ SIB byte, and an optional displacement, and the spare (register)
+ field of the ModR/M byte should be the digit given (which will be
+ from 0 to 7, so it fits in three bits). The encoding of effective
+ addresses is given in section A.2.3 <#section-A.2.3>.
+ * The code |/r| combines the above two: it indicates that one of the
+ operands is a memory address or |r/m|, and another is a register,
+ and that an effective address should be generated with the spare
+ (register) field in the ModR/M byte being equal to the `register
+ value' of the register operand. The encoding of effective
+ addresses is given in section A.2.3 <#section-A.2.3>; register
+ values are given in section A.2.1 <#section-A.2.1>.
+ * The codes |ib|, |iw| and |id| indicate that one of the operands to
+ the instruction is an immediate value, and that this is to be
+ encoded as a byte, little-endian word or little-endian doubleword
+ respectively.
+ * The codes |rb|, |rw| and |rd| indicate that one of the operands to
+ the instruction is an immediate value, and that the /difference/
+ between this value and the address of the end of the instruction
+ is to be encoded as a byte, word or doubleword respectively. Where
+ the form |rw/rd| appears, it indicates that either |rw| or |rd|
+ should be used according to whether assembly is being performed in
+ |BITS 16| or |BITS 32| state respectively.
+ * The codes |ow| and |od| indicate that one of the operands to the
+ instruction is a reference to the contents of a memory address
+ specified as an immediate value: this encoding is used in some
+ forms of the |MOV| instruction in place of the standard
+ effective-address mechanism. The displacement is encoded as a word
+ or doubleword. Again, |ow/od| denotes that |ow| or |od| should be
+ chosen according to the |BITS| setting.
+ * The codes |o16| and |o32| indicate that the given form of the
+ instruction should be assembled with operand size 16 or 32 bits.
+ In other words, |o16| indicates a |66| prefix in |BITS 32| state,
+ but generates no code in |BITS 16| state; and |o32| indicates a
+ |66| prefix in |BITS 16| state but generates nothing in |BITS 32|.
+ * The codes |a16| and |a32|, similarly to |o16| and |o32|, indicate
+ the address size of the given form of the instruction. Where this
+ does not match the |BITS| setting, a |67| prefix is required.
+
+
+ A.2.1 Register Values
+
+Where an instruction requires a register value, it is already implicit
+in the encoding of the rest of the instruction what type of register is
+intended: an 8-bit general-purpose register, a segment register, a debug
+register, an MMX register, or whatever. Therefore there is no problem
+with registers of different types sharing an encoding value.
+
+The encodings for the various classes of register are:
+
+ * 8-bit general registers: |AL| is 0, |CL| is 1, |DL| is 2, |BL| is
+ 3, |AH| is 4, |CH| is 5, |DH| is 6, and |BH| is 7.
+ * 16-bit general registers: |AX| is 0, |CX| is 1, |DX| is 2, |BX| is
+ 3, |SP| is 4, |BP| is 5, |SI| is 6, and |DI| is 7.
+ * 32-bit general registers: |EAX| is 0, |ECX| is 1, |EDX| is 2,
+ |EBX| is 3, |ESP| is 4, |EBP| is 5, |ESI| is 6, and |EDI| is 7.
+ * Segment registers: |ES| is 0, |CS| is 1, |SS| is 2, |DS| is 3,
+ |FS| is 4, and |GS| is 5.
+ * {Floating-point registers}: |ST0| is 0, |ST1| is 1, |ST2| is 2,
+ |ST3| is 3, |ST4| is 4, |ST5| is 5, |ST6| is 6, and |ST7| is 7.
+ * 64-bit MMX registers: |MM0| is 0, |MM1| is 1, |MM2| is 2, |MM3| is
+ 3, |MM4| is 4, |MM5| is 5, |MM6| is 6, and |MM7| is 7.
+ * Control registers: |CR0| is 0, |CR2| is 2, |CR3| is 3, and |CR4|
+ is 4.
+ * Debug registers: |DR0| is 0, |DR1| is 1, |DR2| is 2, |DR3| is 3,
+ |DR6| is 6, and |DR7| is 7.
+ * Test registers: |TR3| is 3, |TR4| is 4, |TR5| is 5, |TR6| is 6,
+ and |TR7| is 7.
+
+(Note that wherever a register name contains a number, that number is
+also the register value for that register.)
+
+
+ A.2.2 Condition Codes
+
+The available condition codes are given here, along with their numeric
+representations as part of opcodes. Many of these condition codes have
+synonyms, so several will be listed at a time.
+
+In the following descriptions, the word `either', when applied to two
+possible trigger conditions, is used to mean `either or both'. If
+`either but not both' is meant, the phrase `exactly one of' is used.
+
+ * |O| is 0 (trigger if the overflow flag is set); |NO| is 1.
+ * |B|, |C| and |NAE| are 2 (trigger if the carry flag is set); |AE|,
+ |NB| and |NC| are 3.
+ * |E| and |Z| are 4 (trigger if the zero flag is set); |NE| and |NZ|
+ are 5.
+ * |BE| and |NA| are 6 (trigger if either of the carry or zero flags
+ is set); |A| and |NBE| are 7.
+ * |S| is 8 (trigger if the sign flag is set); |NS| is 9.
+ * |P| and |PE| are 10 (trigger if the parity flag is set); |NP| and
+ |PO| are 11.
+ * |L| and |NGE| are 12 (trigger if exactly one of the sign and
+ overflow flags is set); |GE| and |NL| are 13.
+ * |LE| and |NG| are 14 (trigger if either the zero flag is set, or
+ exactly one of the sign and overflow flags is set); |G| and |NLE|
+ are 15.
+
+Note that in all cases, the sense of a condition code may be reversed by
+changing the low bit of the numeric representation.
+
+
+ A.2.3 Effective Address Encoding: ModR/M and SIB
+
+An effective address is encoded in up to three parts: a ModR/M byte, an
+optional SIB byte, and an optional byte, word or doubleword displacement
+field.
+
+The ModR/M byte consists of three fields: the |mod| field, ranging from
+0 to 3, in the upper two bits of the byte, the |r/m| field, ranging from
+0 to 7, in the lower three bits, and the spare (register) field in the
+middle (bit 3 to bit 5). The spare field is not relevant to the
+effective address being encoded, and either contains an extension to the
+instruction opcode or the register value of another operand.
+
+The ModR/M system can be used to encode a direct register reference
+rather than a memory access. This is always done by setting the |mod|
+field to 3 and the |r/m| field to the register value of the register in
+question (it must be a general-purpose register, and the size of the
+register must already be implicit in the encoding of the rest of the
+instruction). In this case, the SIB byte and displacement field are both
+absent.
+
+In 16-bit addressing mode (either |BITS 16| with no |67| prefix, or
+|BITS 32| with a |67| prefix), the SIB byte is never used. The general
+rules for |mod| and |r/m| (there is an exception, given below) are:
+
+ * The |mod| field gives the length of the displacement field: 0
+ means no displacement, 1 means one byte, and 2 means two bytes.
+ * The |r/m| field encodes the combination of registers to be added
+ to the displacement to give the accessed address: 0 means |BX+SI|,
+ 1 means |BX+DI|, 2 means |BP+SI|, 3 means |BP+DI|, 4 means |SI|
+ only, 5 means |DI| only, 6 means |BP| only, and 7 means |BX| only.
+
+However, there is a special case:
+
+ * If |mod| is 0 and |r/m| is 6, the effective address encoded is not
+ |[BP]| as the above rules would suggest, but instead |[disp16]|:
+ the displacement field is present and is two bytes long, and no
+ registers are added to the displacement.
+
+Therefore the effective address |[BP]| cannot be encoded as efficiently
+as |[BX]|; so if you code |[BP]| in a program, NASM adds a notional
+8-bit zero displacement, and sets |mod| to 1, |r/m| to 6, and the
+one-byte displacement field to 0.
+
+In 32-bit addressing mode (either |BITS 16| with a |67| prefix, or |BITS
+32| with no |67| prefix) the general rules (again, there are exceptions)
+for |mod| and |r/m| are:
+
+ * The |mod| field gives the length of the displacement field: 0
+ means no displacement, 1 means one byte, and 2 means four bytes.
+ * If only one register is to be added to the displacement, and it is
+ not |ESP|, the |r/m| field gives its register value, and the SIB
+ byte is absent. If the |r/m| field is 4 (which would encode
+ |ESP|), the SIB byte is present and gives the combination and
+ scaling of registers to be added to the displacement.
+
+If the SIB byte is present, it describes the combination of registers
+(an optional base register, and an optional index register scaled by
+multiplication by 1, 2, 4 or 8) to be added to the displacement. The SIB
+byte is divided into the |scale| field, in the top two bits, the |index|
+field in the next three, and the |base| field in the bottom three. The
+general rules are:
+
+ * The |base| field encodes the register value of the base register.
+ * The |index| field encodes the register value of the index
+ register, unless it is 4, in which case no index register is used
+ (so |ESP| cannot be used as an index register).
+ * The |scale| field encodes the multiplier by which the index
+ register is scaled before adding it to the base and displacement:
+ 0 encodes a multiplier of 1, 1 encodes 2, 2 encodes 4 and 3
+ encodes 8.
+
+The exceptions to the 32-bit encoding rules are:
+
+ * If |mod| is 0 and |r/m| is 5, the effective address encoded is not
+ |[EBP]| as the above rules would suggest, but instead |[disp32]|:
+ the displacement field is present and is four bytes long, and no
+ registers are added to the displacement.
+ * If |mod| is 0, |r/m| is 4 (meaning the SIB byte is present) and
+ |base| is 4, the effective address encoded is not |[EBP+index]| as
+ the above rules would suggest, but instead |[disp32+index]|: the
+ displacement field is present and is four bytes long, and there is
+ no base register (but the index register is still processed in the
+ normal way).
+
+
+ A.3 Key to Instruction Flags
+
+Given along with each instruction in this appendix is a set of flags,
+denoting the type of the instruction. The types are as follows:
+
+ * |8086|, |186|, |286|, |386|, |486|, |PENT| and |P6| denote the
+ lowest processor type that supports the instruction. Most
+ instructions run on all processors above the given type; those
+ that do not are documented. The Pentium II contains no additional
+ instructions beyond the P6 (Pentium Pro); from the point of view
+ of its instruction set, it can be thought of as a P6 with MMX
+ capability.
+ * |CYRIX| indicates that the instruction is specific to Cyrix
+ processors, for example the extra MMX instructions in the Cyrix
+ extended MMX instruction set.
+ * |FPU| indicates that the instruction is a floating-point one, and
+ will only run on machines with a coprocessor (automatically
+ including 486DX, Pentium and above).
+ * |MMX| indicates that the instruction is an MMX one, and will run
+ on MMX-capable Pentium processors and the Pentium II.
+ * |PRIV| indicates that the instruction is a protected-mode
+ management instruction. Many of these may only be used in
+ protected mode, or only at privilege level zero.
+ * |UNDOC| indicates that the instruction is an undocumented one, and
+ not part of the official Intel Architecture; it may or may not be
+ supported on any given machine.
+
+
+ A.4 |AAA|, |AAS|, |AAM|, |AAD|: ASCII Adjustments
+
+AAA ; 37 [8086]
+
+AAS ; 3F [8086]
+
+AAD ; D5 0A [8086]
+AAD imm ; D5 ib [8086]
+
+AAM ; D4 0A [8086]
+AAM imm ; D4 ib [8086]
+
+These instructions are used in conjunction with the add, subtract,
+multiply and divide instructions to perform binary-coded decimal
+arithmetic in /unpacked/ (one BCD digit per byte - easy to translate to
+and from ASCII, hence the instruction names) form. There are also packed
+BCD instructions |DAA| and |DAS|: see section A.23 <#section-A.23>.
+
+|AAA| should be used after a one-byte |ADD| instruction whose
+destination was the |AL| register: by means of examining the value in
+the low nibble of |AL| and also the auxiliary carry flag |AF|, it
+determines whether the addition has overflowed, and adjusts it (and sets
+the carry flag) if so. You can add long BCD strings together by doing
+|ADD|/|AAA| on the low digits, then doing |ADC|/|AAA| on each subsequent
+digit.
+
+|AAS| works similarly to |AAA|, but is for use after |SUB| instructions
+rather than |ADD|.
+
+|AAM| is for use after you have multiplied two decimal digits together
+and left the result in |AL|: it divides |AL| by ten and stores the
+quotient in |AH|, leaving the remainder in |AL|. The divisor 10 can be
+changed by specifying an operand to the instruction: a particularly
+handy use of this is |AAM 16|, causing the two nibbles in |AL| to be
+separated into |AH| and |AL|.
+
+|AAD| performs the inverse operation to |AAM|: it multiplies |AH| by
+ten, adds it to |AL|, and sets |AH| to zero. Again, the multiplier 10
+can be changed.
+
+
+ A.5 |ADC|: Add with Carry
+
+ADC r/m8,reg8 ; 10 /r [8086]
+ADC r/m16,reg16 ; o16 11 /r [8086]
+ADC r/m32,reg32 ; o32 11 /r [386]
+
+ADC reg8,r/m8 ; 12 /r [8086]
+ADC reg16,r/m16 ; o16 13 /r [8086]
+ADC reg32,r/m32 ; o32 13 /r [386]
+
+ADC r/m8,imm8 ; 80 /2 ib [8086]
+ADC r/m16,imm16 ; o16 81 /2 iw [8086]
+ADC r/m32,imm32 ; o32 81 /2 id [386]
+
+ADC r/m16,imm8 ; o16 83 /2 ib [8086]
+ADC r/m32,imm8 ; o32 83 /2 ib [386]
+
+ADC AL,imm8 ; 14 ib [8086]
+ADC AX,imm16 ; o16 15 iw [8086]
+ADC EAX,imm32 ; o32 15 id [386]
+
+|ADC| performs integer addition: it adds its two operands together, plus
+the value of the carry flag, and leaves the result in its destination
+(first) operand. The flags are set according to the result of the
+operation: in particular, the carry flag is affected and can be used by
+a subsequent |ADC| instruction.
+
+In the forms with an 8-bit immediate second operand and a longer first
+operand, the second operand is considered to be signed, and is
+sign-extended to the length of the first operand. In these cases, the
+|BYTE| qualifier is necessary to force NASM to generate this form of the
+instruction.
+
+To add two numbers without also adding the contents of the carry flag,
+use |ADD| (section A.6 <#section-A.6>).
+
+
+ A.6 |ADD|: Add Integers
+
+ADD r/m8,reg8 ; 00 /r [8086]
+ADD r/m16,reg16 ; o16 01 /r [8086]
+ADD r/m32,reg32 ; o32 01 /r [386]
+
+ADD reg8,r/m8 ; 02 /r [8086]
+ADD reg16,r/m16 ; o16 03 /r [8086]
+ADD reg32,r/m32 ; o32 03 /r [386]
+
+ADD r/m8,imm8 ; 80 /0 ib [8086]
+ADD r/m16,imm16 ; o16 81 /0 iw [8086]
+ADD r/m32,imm32 ; o32 81 /0 id [386]
+
+ADD r/m16,imm8 ; o16 83 /0 ib [8086]
+ADD r/m32,imm8 ; o32 83 /0 ib [386]
+
+ADD AL,imm8 ; 04 ib [8086]
+ADD AX,imm16 ; o16 05 iw [8086]
+ADD EAX,imm32 ; o32 05 id [386]
+
+|ADD| performs integer addition: it adds its two operands together, and
+leaves the result in its destination (first) operand. The flags are set
+according to the result of the operation: in particular, the carry flag
+is affected and can be used by a subsequent |ADC| instruction (section
+A.5 <#section-A.5>).
+
+In the forms with an 8-bit immediate second operand and a longer first
+operand, the second operand is considered to be signed, and is
+sign-extended to the length of the first operand. In these cases, the
+|BYTE| qualifier is necessary to force NASM to generate this form of the
+instruction.
+
+
+ A.7 |AND|: Bitwise AND
+
+AND r/m8,reg8 ; 20 /r [8086]
+AND r/m16,reg16 ; o16 21 /r [8086]
+AND r/m32,reg32 ; o32 21 /r [386]
+
+AND reg8,r/m8 ; 22 /r [8086]
+AND reg16,r/m16 ; o16 23 /r [8086]
+AND reg32,r/m32 ; o32 23 /r [386]
+
+AND r/m8,imm8 ; 80 /4 ib [8086]
+AND r/m16,imm16 ; o16 81 /4 iw [8086]
+AND r/m32,imm32 ; o32 81 /4 id [386]
+
+AND r/m16,imm8 ; o16 83 /4 ib [8086]
+AND r/m32,imm8 ; o32 83 /4 ib [386]
+
+AND AL,imm8 ; 24 ib [8086]
+AND AX,imm16 ; o16 25 iw [8086]
+AND EAX,imm32 ; o32 25 id [386]
+
+|AND| performs a bitwise AND operation between its two operands (i.e.
+each bit of the result is 1 if and only if the corresponding bits of the
+two inputs were both 1), and stores the result in the destination
+(first) operand.
+
+In the forms with an 8-bit immediate second operand and a longer first
+operand, the second operand is considered to be signed, and is
+sign-extended to the length of the first operand. In these cases, the
+|BYTE| qualifier is necessary to force NASM to generate this form of the
+instruction.
+
+The MMX instruction |PAND| (see section A.116 <#section-A.116>) performs
+the same operation on the 64-bit MMX registers.
+
+
+ A.8 |ARPL|: Adjust RPL Field of Selector
+
+ARPL r/m16,reg16 ; 63 /r [286,PRIV]
+
+|ARPL| expects its two word operands to be segment selectors. It adjusts
+the RPL (requested privilege level - stored in the bottom two bits of
+the selector) field of the destination (first) operand to ensure that it
+is no less (i.e. no more privileged than) the RPL field of the source
+operand. The zero flag is set if and only if a change had to be made.
+
+
+ A.9 |BOUND|: Check Array Index against Bounds
+
+BOUND reg16,mem ; o16 62 /r [186]
+BOUND reg32,mem ; o32 62 /r [386]
+
+|BOUND| expects its second operand to point to an area of memory
+containing two signed values of the same size as its first operand (i.e.
+two words for the 16-bit form; two doublewords for the 32-bit form). It
+performs two signed comparisons: if the value in the register passed as
+its first operand is less than the first of the in-memory values, or is
+greater than or equal to the second, it throws a BR exception.
+Otherwise, it does nothing.
+
+
+ A.10 |BSF|, |BSR|: Bit Scan
+
+BSF reg16,r/m16 ; o16 0F BC /r [386]
+BSF reg32,r/m32 ; o32 0F BC /r [386]
+
+BSR reg16,r/m16 ; o16 0F BD /r [386]
+BSR reg32,r/m32 ; o32 0F BD /r [386]
+
+|BSF| searches for a set bit in its source (second) operand, starting
+from the bottom, and if it finds one, stores the index in its
+destination (first) operand. If no set bit is found, the contents of the
+destination operand are undefined.
+
+|BSR| performs the same function, but searches from the top instead, so
+it finds the most significant set bit.
+
+Bit indices are from 0 (least significant) to 15 or 31 (most significant).
+
+
+ A.11 |BSWAP|: Byte Swap
+
+BSWAP reg32 ; o32 0F C8+r [486]
+
+|BSWAP| swaps the order of the four bytes of a 32-bit register: bits 0-7
+exchange places with bits 24-31, and bits 8-15 swap with bits 16-23.
+There is no explicit 16-bit equivalent: to byte-swap |AX|, |BX|, |CX| or
+|DX|, |XCHG| can be used.
+
+
+ A.12 |BT|, |BTC|, |BTR|, |BTS|: Bit Test
+
+BT r/m16,reg16 ; o16 0F A3 /r [386]
+BT r/m32,reg32 ; o32 0F A3 /r [386]
+BT r/m16,imm8 ; o16 0F BA /4 ib [386]
+BT r/m32,imm8 ; o32 0F BA /4 ib [386]
+
+BTC r/m16,reg16 ; o16 0F BB /r [386]
+BTC r/m32,reg32 ; o32 0F BB /r [386]
+BTC r/m16,imm8 ; o16 0F BA /7 ib [386]
+BTC r/m32,imm8 ; o32 0F BA /7 ib [386]
+
+BTR r/m16,reg16 ; o16 0F B3 /r [386]
+BTR r/m32,reg32 ; o32 0F B3 /r [386]
+BTR r/m16,imm8 ; o16 0F BA /6 ib [386]
+BTR r/m32,imm8 ; o32 0F BA /6 ib [386]
+
+BTS r/m16,reg16 ; o16 0F AB /r [386]
+BTS r/m32,reg32 ; o32 0F AB /r [386]
+BTS r/m16,imm ; o16 0F BA /5 ib [386]
+BTS r/m32,imm ; o32 0F BA /5 ib [386]
+
+These instructions all test one bit of their first operand, whose index
+is given by the second operand, and store the value of that bit into the
+carry flag. Bit indices are from 0 (least significant) to 15 or 31 (most
+significant).
+
+In addition to storing the original value of the bit into the carry
+flag, |BTR| also resets (clears) the bit in the operand itself. |BTS|
+sets the bit, and |BTC| complements the bit. |BT| does not modify its
+operands.
+
+The bit offset should be no greater than the size of the operand.
+
+
+ A.13 |CALL|: Call Subroutine
+
+CALL imm ; E8 rw/rd [8086]
+CALL imm:imm16 ; o16 9A iw iw [8086]
+CALL imm:imm32 ; o32 9A id iw [386]
+CALL FAR mem16 ; o16 FF /3 [8086]
+CALL FAR mem32 ; o32 FF /3 [386]
+CALL r/m16 ; o16 FF /2 [8086]
+CALL r/m32 ; o32 FF /2 [386]
+
+|CALL| calls a subroutine, by means of pushing the current instruction
+pointer (|IP|) and optionally |CS| as well on the stack, and then
+jumping to a given address.
+
+|CS| is pushed as well as |IP| if and only if the call is a far call,
+i.e. a destination segment address is specified in the instruction. The
+forms involving two colon-separated arguments are far calls; so are the
+|CALL FAR mem| forms.
+
+You can choose between the two immediate far call forms (|CALL imm:imm|)
+by the use of the |WORD| and |DWORD| keywords: |CALL WORD
+0x1234:0x5678|) or |CALL DWORD 0x1234:0x56789abc|.
+
+The |CALL FAR mem| forms execute a far call by loading the destination
+address out of memory. The address loaded consists of 16 or 32 bits of
+offset (depending on the operand size), and 16 bits of segment. The
+operand size may be overridden using |CALL WORD FAR mem| or |CALL DWORD
+FAR mem|.
+
+The |CALL r/m| forms execute a near call (within the same segment),
+loading the destination address out of memory or out of a register. The
+keyword |NEAR| may be specified, for clarity, in these forms, but is not
+necessary. Again, operand size can be overridden using |CALL WORD mem|
+or |CALL DWORD mem|.
+
+As a convenience, NASM does not require you to call a far procedure
+symbol by coding the cumbersome |CALL SEG routine:routine|, but instead
+allows the easier synonym |CALL FAR routine|.
+
+The |CALL r/m| forms given above are near calls; NASM will accept the
+|NEAR| keyword (e.g. |CALL NEAR [address]|), even though it is not
+strictly necessary.
+
+
+ A.14 |CBW|, |CWD|, |CDQ|, |CWDE|: Sign Extensions
+
+CBW ; o16 98 [8086]
+CWD ; o16 99 [8086]
+CDQ ; o32 99 [386]
+CWDE ; o32 98 [386]
+
+All these instructions sign-extend a short value into a longer one, by
+replicating the top bit of the original value to fill the extended one.
+
+|CBW| extends |AL| into |AX| by repeating the top bit of |AL| in every
+bit of |AH|. |CWD| extends |AX| into |DX:AX| by repeating the top bit of
+|AX| throughout |DX|. |CWDE| extends |AX| into |EAX|, and |CDQ| extends
+|EAX| into |EDX:EAX|.
+
+
+ A.15 |CLC|, |CLD|, |CLI|, |CLTS|: Clear Flags
+
+CLC ; F8 [8086]
+CLD ; FC [8086]
+CLI ; FA [8086]
+CLTS ; 0F 06 [286,PRIV]
+
+These instructions clear various flags. |CLC| clears the carry flag;
+|CLD| clears the direction flag; |CLI| clears the interrupt flag (thus
+disabling interrupts); and |CLTS| clears the task-switched (|TS|) flag
+in |CR0|.
+
+To set the carry, direction, or interrupt flags, use the |STC|, |STD|
+and |STI| instructions (section A.156 <#section-A.156>). To invert the
+carry flag, use |CMC| (section A.16 <#section-A.16>).
+
+
+ A.16 |CMC|: Complement Carry Flag
+
+CMC ; F5 [8086]
+
+|CMC| changes the value of the carry flag: if it was 0, it sets it to 1,
+and vice versa.
+
+
+ A.17 |CMOVcc|: Conditional Move
+
+CMOVcc reg16,r/m16 ; o16 0F 40+cc /r [P6]
+CMOVcc reg32,r/m32 ; o32 0F 40+cc /r [P6]
+
+|CMOV| moves its source (second) operand into its destination (first)
+operand if the given condition code is satisfied; otherwise it does
+nothing.
+
+For a list of condition codes, see section A.2.2 <#section-A.2.2>.
+
+Although the |CMOV| instructions are flagged |P6| above, they may not be
+supported by all Pentium Pro processors; the |CPUID| instruction
+(section A.22 <#section-A.22>) will return a bit which indicates whether
+conditional moves are supported.
+
+
+ A.18 |CMP|: Compare Integers
+
+CMP r/m8,reg8 ; 38 /r [8086]
+CMP r/m16,reg16 ; o16 39 /r [8086]
+CMP r/m32,reg32 ; o32 39 /r [386]
+
+CMP reg8,r/m8 ; 3A /r [8086]
+CMP reg16,r/m16 ; o16 3B /r [8086]
+CMP reg32,r/m32 ; o32 3B /r [386]
+
+CMP r/m8,imm8 ; 80 /0 ib [8086]
+CMP r/m16,imm16 ; o16 81 /0 iw [8086]
+CMP r/m32,imm32 ; o32 81 /0 id [386]
+
+DEADCMP r/m16,imm8 ; o16 83 /0 ib [8086]
+DEADCMP r/m32,imm8 ; o32 83 /0 ib [386]
+
+CMP AL,imm8 ; 3C ib [8086]
+CMP AX,imm16 ; o16 3D iw [8086]
+CMP EAX,imm32 ; o32 3D id [386]
+
+|CMP| performs a `mental' subtraction of its second operand from its
+first operand, and affects the flags as if the subtraction had taken
+place, but does not store the result of the subtraction anywhere.
+
+In the forms with an 8-bit immediate second operand and a longer first
+operand, the second operand is considered to be signed, and is
+sign-extended to the length of the first operand. In these cases, the
+|BYTE| qualifier is necessary to force NASM to generate this form of the
+instruction.
+
+
+ A.19 |CMPSB|, |CMPSW|, |CMPSD|: Compare Strings
+
+CMPSB ; A6 [8086]
+CMPSW ; o16 A7 [8086]
+CMPSD ; o32 A7 [386]
+
+|CMPSB| compares the byte at |[DS:SI]| or |[DS:ESI]| with the byte at
+|[ES:DI]| or |[ES:EDI]|, and sets the flags accordingly. It then
+increments or decrements (depending on the direction flag: increments if
+the flag is clear, decrements if it is set) |SI| and |DI| (or |ESI| and
+|EDI|).
+
+The registers used are |SI| and |DI| if the address size is 16 bits, and
+|ESI| and |EDI| if it is 32 bits. If you need to use an address size not
+equal to the current |BITS| setting, you can use an explicit |a16| or
+|a32| prefix.
+
+The segment register used to load from |[SI]| or |[ESI]| can be
+overridden by using a segment register name as a prefix (for example,
+|es cmpsb|). The use of |ES| for the load from |[DI]| or |[EDI]| cannot
+be overridden.
+
+|CMPSW| and |CMPSD| work in the same way, but they compare a word or a
+doubleword instead of a byte, and increment or decrement the addressing
+registers by 2 or 4 instead of 1.
+
+The |REPE| and |REPNE| prefixes (equivalently, |REPZ| and |REPNZ|) may
+be used to repeat the instruction up to |CX| (or |ECX| - again, the
+address size chooses which) times until the first unequal or equal byte
+is found.
+
+
+ A.20 |CMPXCHG|, |CMPXCHG486|: Compare and Exchange
+
+CMPXCHG r/m8,reg8 ; 0F B0 /r [PENT]
+CMPXCHG r/m16,reg16 ; o16 0F B1 /r [PENT]
+CMPXCHG r/m32,reg32 ; o32 0F B1 /r [PENT]
+
+CMPXCHG486 r/m8,reg8 ; 0F A6 /r [486,UNDOC]
+CMPXCHG486 r/m16,reg16 ; o16 0F A7 /r [486,UNDOC]
+CMPXCHG486 r/m32,reg32 ; o32 0F A7 /r [486,UNDOC]
+
+These two instructions perform exactly the same operation; however,
+apparently some (not all) 486 processors support it under a non-standard
+opcode, so NASM provides the undocumented |CMPXCHG486| form to generate
+the non-standard opcode.
+
+|CMPXCHG| compares its destination (first) operand to the value in |AL|,
+|AX| or |EAX| (depending on the size of the instruction). If they are
+equal, it copies its source (second) operand into the destination and
+sets the zero flag. Otherwise, it clears the zero flag and leaves the
+destination alone.
+
+|CMPXCHG| is intended to be used for atomic operations in multitasking
+or multiprocessor environments. To safely update a value in shared
+memory, for example, you might load the value into |EAX|, load the
+updated value into |EBX|, and then execute the instruction |lock cmpxchg
+[value],ebx|. If |value| has not changed since being loaded, it is
+updated with your desired new value, and the zero flag is set to let you
+know it has worked. (The |LOCK| prefix prevents another processor doing
+anything in the middle of this operation: it guarantees atomicity.)
+However, if another processor has modified the value in between your
+load and your attempted store, the store does not happen, and you are
+notified of the failure by a cleared zero flag, so you can go round and
+try again.
+
+
+ A.21 |CMPXCHG8B|: Compare and Exchange Eight Bytes
+
+CMPXCHG8B mem ; 0F C7 /1 [PENT]
+
+This is a larger and more unwieldy version of |CMPXCHG|: it compares the
+64-bit (eight-byte) value stored at |[mem]| with the value in |EDX:EAX|.
+If they are equal, it sets the zero flag and stores |ECX:EBX| into the
+memory area. If they are unequal, it clears the zero flag and leaves the
+memory area untouched.
+
+
+ A.22 |CPUID|: Get CPU Identification Code
+
+CPUID ; 0F A2 [PENT]
+
+|CPUID| returns various information about the processor it is being
+executed on. It fills the four registers |EAX|, |EBX|, |ECX| and |EDX|
+with information, which varies depending on the input contents of |EAX|.
+
+|CPUID| also acts as a barrier to serialise instruction execution:
+executing the |CPUID| instruction guarantees that all the effects
+(memory modification, flag modification, register modification) of
+previous instructions have been completed before the next instruction
+gets fetched.
+
+The information returned is as follows:
+
+ * If |EAX| is zero on input, |EAX| on output holds the maximum
+ acceptable input value of |EAX|, and |EBX:EDX:ECX| contain the
+ string |"GenuineIntel"| (or not, if you have a clone processor).
+ That is to say, |EBX| contains |"Genu"| (in NASM's own sense of
+ character constants, described in section 3.4.2
+ <nasmdoc3.html#section-3.4.2>), |EDX| contains |"ineI"| and |ECX|
+ contains |"ntel"|.
+ * If |EAX| is one on input, |EAX| on output contains version
+ information about the processor, and |EDX| contains a set of
+ feature flags, showing the presence and absence of various
+ features. For example, bit 8 is set if the |CMPXCHG8B| instruction
+ (section A.21 <#section-A.21>) is supported, bit 15 is set if the
+ conditional move instructions (section A.17 <#section-A.17> and
+ section A.34 <#section-A.34>) are supported, and bit 23 is set if
+ MMX instructions are supported.
+ * If |EAX| is two on input, |EAX|, |EBX|, |ECX| and |EDX| all
+ contain information about caches and TLBs (Translation Lookahead
+ Buffers).
+
+For more information on the data returned from |CPUID|, see the
+documentation on Intel's web site.
+
+
+ A.23 |DAA|, |DAS|: Decimal Adjustments
+
+DAA ; 27 [8086]
+DAS ; 2F [8086]
+
+These instructions are used in conjunction with the add and subtract
+instructions to perform binary-coded decimal arithmetic in /packed/ (one
+BCD digit per nibble) form. For the unpacked equivalents, see section
+A.4 <#section-A.4>.
+
+|DAA| should be used after a one-byte |ADD| instruction whose
+destination was the |AL| register: by means of examining the value in
+the |AL| and also the auxiliary carry flag |AF|, it determines whether
+either digit of the addition has overflowed, and adjusts it (and sets
+the carry and auxiliary-carry flags) if so. You can add long BCD strings
+together by doing |ADD|/|DAA| on the low two digits, then doing
+|ADC|/|DAA| on each subsequent pair of digits.
+
+|DAS| works similarly to |DAA|, but is for use after |SUB| instructions
+rather than |ADD|.
+
+
+ A.24 |DEC|: Decrement Integer
+
+DEC reg16 ; o16 48+r [8086]
+DEC reg32 ; o32 48+r [386]
+DEC r/m8 ; FE /1 [8086]
+DEC r/m16 ; o16 FF /1 [8086]
+DEC r/m32 ; o32 FF /1 [386]
+
+|DEC| subtracts 1 from its operand. It does /not/ affect the carry flag:
+to affect the carry flag, use |SUB something,1| (see section A.159
+<#section-A.159>). See also |INC| (section A.79 <#section-A.79>).
+
+
+ A.25 |DIV|: Unsigned Integer Divide
+
+DIV r/m8 ; F6 /6 [8086]
+DIV r/m16 ; o16 F7 /6 [8086]
+DIV r/m32 ; o32 F7 /6 [386]
+
+|DIV| performs unsigned integer division. The explicit operand provided
+is the divisor; the dividend and destination operands are implicit, in
+the following way:
+
+ * For |DIV r/m8|, |AX| is divided by the given operand; the quotient
+ is stored in |AL| and the remainder in |AH|.
+ * For |DIV r/m16|, |DX:AX| is divided by the given operand; the
+ quotient is stored in |AX| and the remainder in |DX|.
+ * For |DIV r/m32|, |EDX:EAX| is divided by the given operand; the
+ quotient is stored in |EAX| and the remainder in |EDX|.
+
+Signed integer division is performed by the |IDIV| instruction: see
+section A.76 <#section-A.76>.
+
+
+ A.26 |EMMS|: Empty MMX State
+
+MMS ; 0F 77 [PENT,MMX]
+
+|EMMS| sets the FPU tag word (marking which floating-point registers are
+available) to all ones, meaning all registers are available for the FPU
+to use. It should be used after executing MMX instructions and before
+executing any subsequent floating-point operations.
+
+
+ A.27 |ENTER|: Create Stack Frame
+
+ENTER imm,imm ; C8 iw ib [186]
+
+|ENTER| constructs a stack frame for a high-level language procedure
+call. The first operand (the |iw| in the opcode definition above refers
+to the first operand) gives the amount of stack space to allocate for
+local variables; the second (the |ib| above) gives the nesting level of
+the procedure (for languages like Pascal, with nested procedures).
+
+The function of |ENTER|, with a nesting level of zero, is equivalent to
+
+ PUSH EBP ; or PUSH BP in 16 bits
+ MOV EBP,ESP ; or MOV BP,SP in 16 bits
+ SUB ESP,operand1 ; or SUB SP,operand1 in 16 bits
+
+This creates a stack frame with the procedure parameters accessible
+upwards from |EBP|, and local variables accessible downwards from |EBP|.
+
+With a nesting level of one, the stack frame created is 4 (or 2) bytes
+bigger, and the value of the final frame pointer |EBP| is accessible in
+memory at |[EBP-4]|.
+
+This allows |ENTER|, when called with a nesting level of two, to look at
+the stack frame described by the /previous/ value of |EBP|, find the
+frame pointer at offset -4 from that, and push it along with its new
+frame pointer, so that when a level-two procedure is called from within
+a level-one procedure, |[EBP-4]| holds the frame pointer of the most
+recent level-one procedure call and |[EBP-8]| holds that of the most
+recent level-two call. And so on, for nesting levels up to 31.
+
+Stack frames created by |ENTER| can be destroyed by the |LEAVE|
+instruction: see section A.94 <#section-A.94>.
+
+
+ A.28 |F2XM1|: Calculate 2**X-1
+
+F2XM1 ; D9 F0 [8086,FPU]
+
+|F2XM1| raises 2 to the power of |ST0|, subtracts one, and stores the
+result back into |ST0|. The initial contents of |ST0| must be a number
+in the range -1 to +1.
+
+
+ A.29 |FABS|: Floating-Point Absolute Value
+
+FABS ; D9 E1 [8086,FPU]
+
+|FABS| computes the absolute value of |ST0|, storing the result back in
+|ST0|.
+
+
+ A.30 |FADD|, |FADDP|: Floating-Point Addition
+
+FADD mem32 ; D8 /0 [8086,FPU]
+FADD mem64 ; DC /0 [8086,FPU]
+
+FADD fpureg ; D8 C0+r [8086,FPU]
+FADD ST0,fpureg ; D8 C0+r [8086,FPU]
+
+FADD TO fpureg ; DC C0+r [8086,FPU]
+FADD fpureg,ST0 ; DC C0+r [8086,FPU]
+
+FADDP fpureg ; DE C0+r [8086,FPU]
+FADDP fpureg,ST0 ; DE C0+r [8086,FPU]
+
+|FADD|, given one operand, adds the operand to |ST0| and stores the
+result back in |ST0|. If the operand has the |TO| modifier, the result
+is stored in the register given rather than in |ST0|.
+
+|FADDP| performs the same function as |FADD TO|, but pops the register
+stack after storing the result.
+
+The given two-operand forms are synonyms for the one-operand forms.
+
+
+ A.31 |FBLD|, |FBSTP|: BCD Floating-Point Load and Store
+
+FBLD mem80 ; DF /4 [8086,FPU]
+FBSTP mem80 ; DF /6 [8086,FPU]
+
+|FBLD| loads an 80-bit (ten-byte) packed binary-coded decimal number
+from the given memory address, converts it to a real, and pushes it on
+the register stack. |FBSTP| stores the value of |ST0|, in packed BCD, at
+the given address and then pops the register stack.
+
+
+ A.32 |FCHS|: Floating-Point Change Sign
+
+FCHS ; D9 E0 [8086,FPU]
+
+|FCHS| negates the number in |ST0|: negative numbers become positive,
+and vice versa.
+
+
+ A.33 |FCLEX|, {FNCLEX}: Clear Floating-Point Exceptions
+
+FCLEX ; 9B DB E2 [8086,FPU]
+FNCLEX ; DB E2 [8086,FPU]
+
+|FCLEX| clears any floating-point exceptions which may be pending.
+|FNCLEX| does the same thing but doesn't wait for previous
+floating-point operations (including the /handling/ of pending
+exceptions) to finish first.
+
+
+ A.34 |FCMOVcc|: Floating-Point Conditional Move
+
+FCMOVB fpureg ; DA C0+r [P6,FPU]
+FCMOVB ST0,fpureg ; DA C0+r [P6,FPU]
+
+FCMOVBE fpureg ; DA D0+r [P6,FPU]
+FCMOVBE ST0,fpureg ; DA D0+r [P6,FPU]
+
+FCMOVE fpureg ; DA C8+r [P6,FPU]
+FCMOVE ST0,fpureg ; DA C8+r [P6,FPU]
+
+FCMOVNB fpureg ; DB C0+r [P6,FPU]
+FCMOVNB ST0,fpureg ; DB C0+r [P6,FPU]
+
+FCMOVNBE fpureg ; DB D0+r [P6,FPU]
+FCMOVNBE ST0,fpureg ; DB D0+r [P6,FPU]
+
+FCMOVNE fpureg ; DB C8+r [P6,FPU]
+FCMOVNE ST0,fpureg ; DB C8+r [P6,FPU]
+
+FCMOVNU fpureg ; DB D8+r [P6,FPU]
+FCMOVNU ST0,fpureg ; DB D8+r [P6,FPU]
+
+FCMOVU fpureg ; DA D8+r [P6,FPU]
+FCMOVU ST0,fpureg ; DA D8+r [P6,FPU]
+
+The |FCMOV| instructions perform conditional move operations: each of
+them moves the contents of the given register into |ST0| if its
+condition is satisfied, and does nothing if not.
+
+The conditions are not the same as the standard condition codes used
+with conditional jump instructions. The conditions |B|, |BE|, |NB|,
+|NBE|, |E| and |NE| are exactly as normal, but none of the other
+standard ones are supported. Instead, the condition |U| and its
+counterpart |NU| are provided; the |U| condition is satisfied if the
+last two floating-point numbers compared were /unordered/, i.e. they
+were not equal but neither one could be said to be greater than the
+other, for example if they were NaNs. (The flag state which signals this
+is the setting of the parity flag: so the |U| condition is notionally
+equivalent to |PE|, and |NU| is equivalent to |PO|.)
+
+The |FCMOV| conditions test the main processor's status flags, not the
+FPU status flags, so using |FCMOV| directly after |FCOM| will not work.
+Instead, you should either use |FCOMI| which writes directly to the main
+CPU flags word, or use |FSTSW| to extract the FPU flags.
+
+Although the |FCMOV| instructions are flagged |P6| above, they may not
+be supported by all Pentium Pro processors; the |CPUID| instruction
+(section A.22 <#section-A.22>) will return a bit which indicates whether
+conditional moves are supported.
+
+
+ A.35 |FCOM|, |FCOMP|, |FCOMPP|, |FCOMI|, |FCOMIP|: Floating-Point
+ Compare
+
+FCOM mem32 ; D8 /2 [8086,FPU]
+FCOM mem64 ; DC /2 [8086,FPU]
+FCOM fpureg ; D8 D0+r [8086,FPU]
+FCOM ST0,fpureg ; D8 D0+r [8086,FPU]
+
+FCOMP mem32 ; D8 /3 [8086,FPU]
+FCOMP mem64 ; DC /3 [8086,FPU]
+FCOMP fpureg ; D8 D8+r [8086,FPU]
+FCOMP ST0,fpureg ; D8 D8+r [8086,FPU]
+
+FCOMPP ; DE D9 [8086,FPU]
+
+FCOMI fpureg ; DB F0+r [P6,FPU]
+FCOMI ST0,fpureg ; DB F0+r [P6,FPU]
+
+FCOMIP fpureg ; DF F0+r [P6,FPU]
+FCOMIP ST0,fpureg ; DF F0+r [P6,FPU]
+
+|FCOM| compares |ST0| with the given operand, and sets the FPU flags
+accordingly. |ST0| is treated as the left-hand side of the comparison,
+so that the carry flag is set (for a `less-than' result) if |ST0| is
+less than the given operand.
+
+|FCOMP| does the same as |FCOM|, but pops the register stack afterwards.
+|FCOMPP| compares |ST0| with |ST1| and then pops the register stack twice.
+
+|FCOMI| and |FCOMIP| work like the corresponding forms of |FCOM| and
+|FCOMP|, but write their results directly to the CPU flags register
+rather than the FPU status word, so they can be immediately followed by
+conditional jump or conditional move instructions.
+
+The |FCOM| instructions differ from the |FUCOM| instructions (section
+A.69 <#section-A.69>) only in the way they handle quiet NaNs: |FUCOM|
+will handle them silently and set the condition code flags to an
+`unordered' result, whereas |FCOM| will generate an exception.
+
+
+ A.36 |FCOS|: Cosine
+
+FCOS ; D9 FF [386,FPU]
+
+|FCOS| computes the cosine of |ST0| (in radians), and stores the result
+in |ST0|. See also |FSINCOS| (section A.61 <#section-A.61>).
+
+
+ A.37 |FDECSTP|: Decrement Floating-Point Stack Pointer
+
+FDECSTP ; D9 F6 [8086,FPU]
+
+|FDECSTP| decrements the `top' field in the floating-point status word.
+This has the effect of rotating the FPU register stack by one, as if the
+contents of |ST7| had been pushed on the stack. See also |FINCSTP|
+(section A.46 <#section-A.46>).
+
+
+ A.38 |FxDISI|, |FxENI|: Disable and Enable Floating-Point Interrupts
+
+FDISI ; 9B DB E1 [8086,FPU]
+FNDISI ; DB E1 [8086,FPU]
+
+FENI ; 9B DB E0 [8086,FPU]
+FNENI ; DB E0 [8086,FPU]
+
+|FDISI| and |FENI| disable and enable floating-point interrupts. These
+instructions are only meaningful on original 8087 processors: the 287
+and above treat them as no-operation instructions.
+
+|FNDISI| and |FNENI| do the same thing as |FDISI| and |FENI|
+respectively, but without waiting for the floating-point processor to
+finish what it was doing first.
+
+
+ A.39 |FDIV|, |FDIVP|, |FDIVR|, |FDIVRP|: Floating-Point Division
+
+FDIV mem32 ; D8 /6 [8086,FPU]
+FDIV mem64 ; DC /6 [8086,FPU]
+
+FDIV fpureg ; D8 F0+r [8086,FPU]
+FDIV ST0,fpureg ; D8 F0+r [8086,FPU]
+
+FDIV TO fpureg ; DC F8+r [8086,FPU]
+FDIV fpureg,ST0 ; DC F8+r [8086,FPU]
+
+FDIVR mem32 ; D8 /0 [8086,FPU]
+FDIVR mem64 ; DC /0 [8086,FPU]
+
+FDIVR fpureg ; D8 F8+r [8086,FPU]
+FDIVR ST0,fpureg ; D8 F8+r [8086,FPU]
+
+FDIVR TO fpureg ; DC F0+r [8086,FPU]
+FDIVR fpureg,ST0 ; DC F0+r [8086,FPU]
+
+FDIVP fpureg ; DE F8+r [8086,FPU]
+FDIVP fpureg,ST0 ; DE F8+r [8086,FPU]
+
+FDIVRP fpureg ; DE F0+r [8086,FPU]
+FDIVRP fpureg,ST0 ; DE F0+r [8086,FPU]
+
+|FDIV| divides |ST0| by the given operand and stores the result back in
+|ST0|, unless the |TO| qualifier is given, in which case it divides the
+given operand by |ST0| and stores the result in the operand.
+
+|FDIVR| does the same thing, but does the division the other way up: so
+if |TO| is not given, it divides the given operand by |ST0| and stores
+the result in |ST0|, whereas if |TO| is given it divides |ST0| by its
+operand and stores the result in the operand.
+
+|FDIVP| operates like |FDIV TO|, but pops the register stack once it has
+finished. |FDIVRP| operates like |FDIVR TO|, but pops the register stack
+once it has finished.
+
+
+ A.40 |FFREE|: Flag Floating-Point Register as Unused
+
+FFREE fpureg ; DD C0+r [8086,FPU]
+
+|FFREE| marks the given register as being empty.
+
+
+ A.41 |FIADD|: Floating-Point/Integer Addition
+
+FIADD mem16 ; DE /0 [8086,FPU]
+FIADD mem32 ; DA /0 [8086,FPU]
+
+|FIADD| adds the 16-bit or 32-bit integer stored in the given memory
+location to |ST0|, storing the result in |ST0|.
+
+
+ A.42 |FICOM|, |FICOMP|: Floating-Point/Integer Compare
+
+FICOM mem16 ; DE /2 [8086,FPU]
+FICOM mem32 ; DA /2 [8086,FPU]
+
+FICOMP mem16 ; DE /3 [8086,FPU]
+FICOMP mem32 ; DA /3 [8086,FPU]
+
+|FICOM| compares |ST0| with the 16-bit or 32-bit integer stored in the
+given memory location, and sets the FPU flags accordingly. |FICOMP| does
+the same, but pops the register stack afterwards.
+
+
+ A.43 |FIDIV|, |FIDIVR|: Floating-Point/Integer Division
+
+FIDIV mem16 ; DE /6 [8086,FPU]
+FIDIV mem32 ; DA /6 [8086,FPU]
+
+FIDIVR mem16 ; DE /0 [8086,FPU]
+FIDIVR mem32 ; DA /0 [8086,FPU]
+
+|FIDIV| divides |ST0| by the 16-bit or 32-bit integer stored in the
+given memory location, and stores the result in |ST0|. |FIDIVR| does the
+division the other way up: it divides the integer by |ST0|, but still
+stores the result in |ST0|.
+
+
+ A.44 |FILD|, |FIST|, |FISTP|: Floating-Point/Integer Conversion
+
+FILD mem16 ; DF /0 [8086,FPU]
+FILD mem32 ; DB /0 [8086,FPU]
+FILD mem64 ; DF /5 [8086,FPU]
+
+FIST mem16 ; DF /2 [8086,FPU]
+FIST mem32 ; DB /2 [8086,FPU]
+
+FISTP mem16 ; DF /3 [8086,FPU]
+FISTP mem32 ; DB /3 [8086,FPU]
+FISTP mem64 ; DF /0 [8086,FPU]
+
+|FILD| loads an integer out of a memory location, converts it to a real,
+and pushes it on the FPU register stack. |FIST| converts |ST0| to an
+integer and stores that in memory; |FISTP| does the same as |FIST|, but
+pops the register stack afterwards.
+
+
+ A.45 |FIMUL|: Floating-Point/Integer Multiplication
+
+FIMUL mem16 ; DE /1 [8086,FPU]
+FIMUL mem32 ; DA /1 [8086,FPU]
+
+|FIMUL| multiplies |ST0| by the 16-bit or 32-bit integer stored in the
+given memory location, and stores the result in |ST0|.
+
+
+ A.46 |FINCSTP|: Increment Floating-Point Stack Pointer
+
+FINCSTP ; D9 F7 [8086,FPU]
+
+|FINCSTP| increments the `top' field in the floating-point status word.
+This has the effect of rotating the FPU register stack by one, as if the
+register stack had been popped; however, unlike the popping of the stack
+performed by many FPU instructions, it does not flag the new |ST7|
+(previously |ST0|) as empty. See also |FDECSTP| (section A.37
+<#section-A.37>).
+
+
+ A.47 |FINIT|, |FNINIT|: Initialise Floating-Point Unit
+
+FINIT ; 9B DB E3 [8086,FPU]
+FNINIT ; DB E3 [8086,FPU]
+
+|FINIT| initialises the FPU to its default state. It flags all registers
+as empty, though it does not actually change their values. |FNINIT| does
+the same, without first waiting for pending exceptions to clear.
+
+
+ A.48 |FISUB|: Floating-Point/Integer Subtraction
+
+FISUB mem16 ; DE /4 [8086,FPU]
+FISUB mem32 ; DA /4 [8086,FPU]
+
+FISUBR mem16 ; DE /5 [8086,FPU]
+FISUBR mem32 ; DA /5 [8086,FPU]
+
+|FISUB| subtracts the 16-bit or 32-bit integer stored in the given
+memory location from |ST0|, and stores the result in |ST0|. |FISUBR|
+does the subtraction the other way round, i.e. it subtracts |ST0| from
+the given integer, but still stores the result in |ST0|.
+
+
+ A.49 |FLD|: Floating-Point Load
+
+FLD mem32 ; D9 /0 [8086,FPU]
+FLD mem64 ; DD /0 [8086,FPU]
+FLD mem80 ; DB /5 [8086,FPU]
+FLD fpureg ; D9 C0+r [8086,FPU]
+
+|FLD| loads a floating-point value out of the given register or memory
+location, and pushes it on the FPU register stack.
+
+
+ A.50 |FLDxx|: Floating-Point Load Constants
+
+FLD1 ; D9 E8 [8086,FPU]
+FLDL2E ; D9 EA [8086,FPU]
+FLDL2T ; D9 E9 [8086,FPU]
+FLDLG2 ; D9 EC [8086,FPU]
+FLDLN2 ; D9 ED [8086,FPU]
+FLDPI ; D9 EB [8086,FPU]
+FLDZ ; D9 EE [8086,FPU]
+
+These instructions push specific standard constants on the FPU register
+stack. |FLD1| pushes the value 1; |FLDL2E| pushes the base-2 logarithm
+of e; |FLDL2T| pushes the base-2 log of 10; |FLDLG2| pushes the base-10
+log of 2; |FLDLN2| pushes the base-e log of 2; |FLDPI| pushes pi; and
+|FLDZ| pushes zero.
+
+
+ A.51 |FLDCW|: Load Floating-Point Control Word
+
+FLDCW mem16 ; D9 /5 [8086,FPU]
+
+|FLDCW| loads a 16-bit value out of memory and stores it into the FPU
+control word (governing things like the rounding mode, the precision,
+and the exception masks). See also |FSTCW| (section A.64 <#section-A.64>).
+
+
+ A.52 |FLDENV|: Load Floating-Point Environment
+
+FLDENV mem ; D9 /4 [8086,FPU]
+
+|FLDENV| loads the FPU operating environment (control word, status word,
+tag word, instruction pointer, data pointer and last opcode) from
+memory. The memory area is 14 or 28 bytes long, depending on the CPU
+mode at the time. See also |FSTENV| (section A.65 <#section-A.65>).
+
+
+ A.53 |FMUL|, |FMULP|: Floating-Point Multiply
+
+FMUL mem32 ; D8 /1 [8086,FPU]
+FMUL mem64 ; DC /1 [8086,FPU]
+
+FMUL fpureg ; D8 C8+r [8086,FPU]
+FMUL ST0,fpureg ; D8 C8+r [8086,FPU]
+
+FMUL TO fpureg ; DC C8+r [8086,FPU]
+FMUL fpureg,ST0 ; DC C8+r [8086,FPU]
+
+FMULP fpureg ; DE C8+r [8086,FPU]
+FMULP fpureg,ST0 ; DE C8+r [8086,FPU]
+
+|FMUL| multiplies |ST0| by the given operand, and stores the result in
+|ST0|, unless the |TO| qualifier is used in which case it stores the
+result in the operand. |FMULP| performs the same operation as |FMUL TO|,
+and then pops the register stack.
+
+
+ A.54 |FNOP|: Floating-Point No Operation
+
+FNOP ; D9 D0 [8086,FPU]
+
+|FNOP| does nothing.
+
+
+ A.55 |FPATAN|, |FPTAN|: Arctangent and Tangent
+
+FPATAN ; D9 F3 [8086,FPU]
+FPTAN ; D9 F2 [8086,FPU]
+
+|FPATAN| computes the arctangent, in radians, of the result of dividing
+|ST1| by |ST0|, stores the result in |ST1|, and pops the register stack.
+It works like the C |atan2| function, in that changing the sign of both
+|ST0| and |ST1| changes the output value by pi (so it performs true
+rectangular-to-polar coordinate conversion, with |ST1| being the Y
+coordinate and |ST0| being the X coordinate, not merely an arctangent).
+
+|FPTAN| computes the tangent of the value in |ST0| (in radians), and
+stores the result back into |ST0|.
+
+
+ A.56 |FPREM|, |FPREM1|: Floating-Point Partial Remainder
+
+FPREM ; D9 F8 [8086,FPU]
+FPREM1 ; D9 F5 [386,FPU]
+
+These instructions both produce the remainder obtained by dividing |ST0|
+by |ST1|. This is calculated, notionally, by dividing |ST0| by |ST1|,
+rounding the result to an integer, multiplying by |ST1| again, and
+computing the value which would need to be added back on to the result
+to get back to the original value in |ST0|.
+
+The two instructions differ in the way the notional round-to-integer
+operation is performed. |FPREM| does it by rounding towards zero, so
+that the remainder it returns always has the same sign as the original
+value in |ST0|; |FPREM1| does it by rounding to the nearest integer, so
+that the remainder always has at most half the magnitude of |ST1|.
+
+Both instructions calculate /partial/ remainders, meaning that they may
+not manage to provide the final result, but might leave intermediate
+results in |ST0| instead. If this happens, they will set the C2 flag in
+the FPU status word; therefore, to calculate a remainder, you should
+repeatedly execute |FPREM| or |FPREM1| until C2 becomes clear.
+
+
+ A.57 |FRNDINT|: Floating-Point Round to Integer
+
+FRNDINT ; D9 FC [8086,FPU]
+
+|FRNDINT| rounds the contents of |ST0| to an integer, according to the
+current rounding mode set in the FPU control word, and stores the result
+back in |ST0|.
+
+
+ A.58 |FSAVE|, |FRSTOR|: Save/Restore Floating-Point State
+
+FSAVE mem ; 9B DD /6 [8086,FPU]
+FNSAVE mem ; DD /6 [8086,FPU]
+
+FRSTOR mem ; DD /4 [8086,FPU]
+
+|FSAVE| saves the entire floating-point unit state, including all the
+information saved by |FSTENV| (section A.65 <#section-A.65>) plus the
+contents of all the registers, to a 94 or 108 byte area of memory
+(depending on the CPU mode). |FRSTOR| restores the floating-point state
+from the same area of memory.
+
+|FNSAVE| does the same as |FSAVE|, without first waiting for pending
+floating-point exceptions to clear.
+
+
+ A.59 |FSCALE|: Scale Floating-Point Value by Power of Two
+
+FSCALE ; D9 FD [8086,FPU]
+
+|FSCALE| scales a number by a power of two: it rounds |ST1| towards zero
+to obtain an integer, then multiplies |ST0| by two to the power of that
+integer, and stores the result in |ST0|.
+
+
+ A.60 |FSETPM|: Set Protected Mode
+
+FSETPM ; DB E4 [286,FPU]
+
+This instruction initalises protected mode on the 287 floating-point
+coprocessor. It is only meaningful on that processor: the 387 and above
+treat the instruction as a no-operation.
+
+
+ A.61 |FSIN|, |FSINCOS|: Sine and Cosine
+
+FSIN ; D9 FE [386,FPU]
+FSINCOS ; D9 FB [386,FPU]
+
+|FSIN| calculates the sine of |ST0| (in radians) and stores the result
+in |ST0|. |FSINCOS| does the same, but then pushes the cosine of the
+same value on the register stack, so that the sine ends up in |ST1| and
+the cosine in |ST0|. |FSINCOS| is faster than executing |FSIN| and
+|FCOS| (see section A.36 <#section-A.36>) in succession.
+
+
+ A.62 |FSQRT|: Floating-Point Square Root
+
+FSQRT ; D9 FA [8086,FPU]
+
+|FSQRT| calculates the square root of |ST0| and stores the result in |ST0|.
+
+
+ A.63 |FST|, |FSTP|: Floating-Point Store
+
+FST mem32 ; D9 /2 [8086,FPU]
+FST mem64 ; DD /2 [8086,FPU]
+FST fpureg ; DD D0+r [8086,FPU]
+
+FSTP mem32 ; D9 /3 [8086,FPU]
+FSTP mem64 ; DD /3 [8086,FPU]
+FSTP mem80 ; DB /0 [8086,FPU]
+FSTP fpureg ; DD D8+r [8086,FPU]
+
+|FST| stores the value in |ST0| into the given memory location or other
+FPU register. |FSTP| does the same, but then pops the register stack.
+
+
+ A.64 |FSTCW|: Store Floating-Point Control Word
+
+FSTCW mem16 ; 9B D9 /0 [8086,FPU]
+FNSTCW mem16 ; D9 /0 [8086,FPU]
+
+|FSTCW| stores the FPU control word (governing things like the rounding
+mode, the precision, and the exception masks) into a 2-byte memory area.
+See also |FLDCW| (section A.51 <#section-A.51>).
+
+|FNSTCW| does the same thing as |FSTCW|, without first waiting for
+pending floating-point exceptions to clear.
+
+
+ A.65 |FSTENV|: Store Floating-Point Environment
+
+FSTENV mem ; 9B D9 /6 [8086,FPU]
+FNSTENV mem ; D9 /6 [8086,FPU]
+
+|FSTENV| stores the FPU operating environment (control word, status
+word, tag word, instruction pointer, data pointer and last opcode) into
+memory. The memory area is 14 or 28 bytes long, depending on the CPU
+mode at the time. See also |FLDENV| (section A.52 <#section-A.52>).
+
+|FNSTENV| does the same thing as |FSTENV|, without first waiting for
+pending floating-point exceptions to clear.
+
+
+ A.66 |FSTSW|: Store Floating-Point Status Word
+
+FSTSW mem16 ; 9B DD /0 [8086,FPU]
+FSTSW AX ; 9B DF E0 [286,FPU]
+
+FNSTSW mem16 ; DD /0 [8086,FPU]
+FNSTSW AX ; DF E0 [286,FPU]
+
+|FSTSW| stores the FPU status word into |AX| or into a 2-byte memory area.
+
+|FNSTSW| does the same thing as |FSTSW|, without first waiting for
+pending floating-point exceptions to clear.
+
+
+ A.67 |FSUB|, |FSUBP|, |FSUBR|, |FSUBRP|: Floating-Point Subtract
+
+FSUB mem32 ; D8 /4 [8086,FPU]
+FSUB mem64 ; DC /4 [8086,FPU]
+
+FSUB fpureg ; D8 E0+r [8086,FPU]
+FSUB ST0,fpureg ; D8 E0+r [8086,FPU]
+
+FSUB TO fpureg ; DC E8+r [8086,FPU]
+FSUB fpureg,ST0 ; DC E8+r [8086,FPU]
+
+FSUBR mem32 ; D8 /5 [8086,FPU]
+FSUBR mem64 ; DC /5 [8086,FPU]
+
+FSUBR fpureg ; D8 E8+r [8086,FPU]
+FSUBR ST0,fpureg ; D8 E8+r [8086,FPU]
+
+FSUBR TO fpureg ; DC E0+r [8086,FPU]
+FSUBR fpureg,ST0 ; DC E0+r [8086,FPU]
+
+FSUBP fpureg ; DE E8+r [8086,FPU]
+FSUBP fpureg,ST0 ; DE E8+r [8086,FPU]
+
+FSUBRP fpureg ; DE E0+r [8086,FPU]
+FSUBRP fpureg,ST0 ; DE E0+r [8086,FPU]
+
+|FSUB| subtracts the given operand from |ST0| and stores the result back
+in |ST0|, unless the |TO| qualifier is given, in which case it subtracts
+|ST0| from the given operand and stores the result in the operand.
+
+|FSUBR| does the same thing, but does the subtraction the other way up:
+so if |TO| is not given, it subtracts |ST0| from the given operand and
+stores the result in |ST0|, whereas if |TO| is given it subtracts its
+operand from |ST0| and stores the result in the operand.
+
+|FSUBP| operates like |FSUB TO|, but pops the register stack once it has
+finished. |FSUBRP| operates like |FSUBR TO|, but pops the register stack
+once it has finished.
+
+
+ A.68 |FTST|: Test |ST0| Against Zero
+
+FTST ; D9 E4 [8086,FPU]
+
+|FTST| compares |ST0| with zero and sets the FPU flags accordingly.
+|ST0| is treated as the left-hand side of the comparison, so that a
+`less-than' result is generated if |ST0| is negative.
+
+
+ A.69 |FUCOMxx|: Floating-Point Unordered Compare
+
+FUCOM fpureg ; DD E0+r [386,FPU]
+FUCOM ST0,fpureg ; DD E0+r [386,FPU]
+
+FUCOMP fpureg ; DD E8+r [386,FPU]
+FUCOMP ST0,fpureg ; DD E8+r [386,FPU]
+
+FUCOMPP ; DA E9 [386,FPU]
+
+FUCOMI fpureg ; DB E8+r [P6,FPU]
+FUCOMI ST0,fpureg ; DB E8+r [P6,FPU]
+
+FUCOMIP fpureg ; DF E8+r [P6,FPU]
+FUCOMIP ST0,fpureg ; DF E8+r [P6,FPU]
+
+|FUCOM| compares |ST0| with the given operand, and sets the FPU flags
+accordingly. |ST0| is treated as the left-hand side of the comparison,
+so that the carry flag is set (for a `less-than' result) if |ST0| is
+less than the given operand.
+
+|FUCOMP| does the same as |FUCOM|, but pops the register stack
+afterwards. |FUCOMPP| compares |ST0| with |ST1| and then pops the
+register stack twice.
+
+|FUCOMI| and |FUCOMIP| work like the corresponding forms of |FUCOM| and
+|FUCOMP|, but write their results directly to the CPU flags register
+rather than the FPU status word, so they can be immediately followed by
+conditional jump or conditional move instructions.
+
+The |FUCOM| instructions differ from the |FCOM| instructions (section
+A.35 <#section-A.35>) only in the way they handle quiet NaNs: |FUCOM|
+will handle them silently and set the condition code flags to an
+`unordered' result, whereas |FCOM| will generate an exception.
+
+
+ A.70 |FXAM|: Examine Class of Value in |ST0|
+
+FXAM ; D9 E5 [8086,FPU]
+
+|FXAM| sets the FPU flags C3, C2 and C0 depending on the type of value
+stored in |ST0|: 000 (respectively) for an unsupported format, 001 for a
+NaN, 010 for a normal finite number, 011 for an infinity, 100 for a
+zero, 101 for an empty register, and 110 for a denormal. It also sets
+the C1 flag to the sign of the number.
+
+
+ A.71 |FXCH|: Floating-Point Exchange
+
+FXCH ; D9 C9 [8086,FPU]
+FXCH fpureg ; D9 C8+r [8086,FPU]
+FXCH fpureg,ST0 ; D9 C8+r [8086,FPU]
+FXCH ST0,fpureg ; D9 C8+r [8086,FPU]
+
+|FXCH| exchanges |ST0| with a given FPU register. The no-operand form
+exchanges |ST0| with |ST1|.
+
+
+ A.72 |FXTRACT|: Extract Exponent and Significand
+
+FXTRACT ; D9 F4 [8086,FPU]
+
+|FXTRACT| separates the number in |ST0| into its exponent and
+significand (mantissa), stores the exponent back into |ST0|, and then
+pushes the significand on the register stack (so that the significand
+ends up in |ST0|, and the exponent in |ST1|).
+
+
+ A.73 |FYL2X|, |FYL2XP1|: Compute Y times Log2(X) or Log2(X+1)
+
+FYL2X ; D9 F1 [8086,FPU]
+FYL2XP1 ; D9 F9 [8086,FPU]
+
+|FYL2X| multiplies |ST1| by the base-2 logarithm of |ST0|, stores the
+result in |ST1|, and pops the register stack (so that the result ends up
+in |ST0|). |ST0| must be non-zero and positive.
+
+|FYL2XP1| works the same way, but replacing the base-2 log of |ST0| with
+that of |ST0| plus one. This time, |ST0| must have magnitude no greater
+than 1 minus half the square root of two.
+
+
+ A.74 |HLT|: Halt Processor
+
+HLT ; F4 [8086]
+
+|HLT| puts the processor into a halted state, where it will perform no
+more operations until restarted by an interrupt or a reset.
+
+
+ A.75 |IBTS|: Insert Bit String
+
+IBTS r/m16,reg16 ; o16 0F A7 /r [386,UNDOC]
+IBTS r/m32,reg32 ; o32 0F A7 /r [386,UNDOC]
+
+No clear documentation seems to be available for this instruction: the
+best I've been able to find reads `Takes a string of bits from the
+second operand and puts them in the first operand'. It is present only
+in early 386 processors, and conflicts with the opcodes for
+|CMPXCHG486|. NASM supports it only for completeness. Its counterpart is
+|XBTS| (see section A.167 <#section-A.167>).
+
+
+ A.76 |IDIV|: Signed Integer Divide
+
+IDIV r/m8 ; F6 /7 [8086]
+IDIV r/m16 ; o16 F7 /7 [8086]
+IDIV r/m32 ; o32 F7 /7 [386]
+
+|IDIV| performs signed integer division. The explicit operand provided
+is the divisor; the dividend and destination operands are implicit, in
+the following way:
+
+ * For |IDIV r/m8|, |AX| is divided by the given operand; the
+ quotient is stored in |AL| and the remainder in |AH|.
+ * For |IDIV r/m16|, |DX:AX| is divided by the given operand; the
+ quotient is stored in |AX| and the remainder in |DX|.
+ * For |IDIV r/m32|, |EDX:EAX| is divided by the given operand; the
+ quotient is stored in |EAX| and the remainder in |EDX|.
+
+Unsigned integer division is performed by the |DIV| instruction: see
+section A.25 <#section-A.25>.
+
+
+ A.77 |IMUL|: Signed Integer Multiply
+
+IMUL r/m8 ; F6 /5 [8086]
+IMUL r/m16 ; o16 F7 /5 [8086]
+IMUL r/m32 ; o32 F7 /5 [386]
+
+IMUL reg16,r/m16 ; o16 0F AF /r [386]
+IMUL reg32,r/m32 ; o32 0F AF /r [386]
+
+IMUL reg16,imm8 ; o16 6B /r ib [286]
+IMUL reg16,imm16 ; o16 69 /r iw [286]
+IMUL reg32,imm8 ; o32 6B /r ib [386]
+IMUL reg32,imm32 ; o32 69 /r id [386]
+
+IMUL reg16,r/m16,imm8 ; o16 6B /r ib [286]
+IMUL reg16,r/m16,imm16 ; o16 69 /r iw [286]
+IMUL reg32,r/m32,imm8 ; o32 6B /r ib [386]
+IMUL reg32,r/m32,imm32 ; o32 69 /r id [386]
+
+|IMUL| performs signed integer multiplication. For the single-operand
+form, the other operand and destination are implicit, in the following way:
+
+ * For |IMUL r/m8|, |AL| is multiplied by the given operand; the
+ product is stored in |AX|.
+ * For |IMUL r/m16|, |AX| is multiplied by the given operand; the
+ product is stored in |DX:AX|.
+ * For |IMUL r/m32|, |EAX| is multiplied by the given operand; the
+ product is stored in |EDX:EAX|.
+
+The two-operand form multiplies its two operands and stores the result
+in the destination (first) operand. The three-operand form multiplies
+its last two operands and stores the result in the first operand.
+
+The two-operand form is in fact a shorthand for the three-operand form,
+as can be seen by examining the opcode descriptions: in the two-operand
+form, the code |/r| takes both its register and |r/m| parts from the
+same operand (the first one).
+
+In the forms with an 8-bit immediate operand and another longer source
+operand, the immediate operand is considered to be signed, and is
+sign-extended to the length of the other source operand. In these cases,
+the |BYTE| qualifier is necessary to force NASM to generate this form of
+the instruction.
+
+Unsigned integer multiplication is performed by the |MUL| instruction:
+see section A.107 <#section-A.107>.
+
+
+ A.78 |IN|: Input from I/O Port
+
+IN AL,imm8 ; E4 ib [8086]
+IN AX,imm8 ; o16 E5 ib [8086]
+IN EAX,imm8 ; o32 E5 ib [386]
+IN AL,DX ; EC [8086]
+IN AX,DX ; o16 ED [8086]
+IN EAX,DX ; o32 ED [386]
+
+|IN| reads a byte, word or doubleword from the specified I/O port, and
+stores it in the given destination register. The port number may be
+specified as an immediate value if it is between 0 and 255, and
+otherwise must be stored in |DX|. See also |OUT| (section A.111
+<#section-A.111>).
+
+
+ A.79 |INC|: Increment Integer
+
+INC reg16 ; o16 40+r [8086]
+INC reg32 ; o32 40+r [386]
+INC r/m8 ; FE /0 [8086]
+INC r/m16 ; o16 FF /0 [8086]
+INC r/m32 ; o32 FF /0 [386]
+
+|INC| adds 1 to its operand. It does /not/ affect the carry flag: to
+affect the carry flag, use |ADD something,1| (see section A.6
+<#section-A.6>). See also |DEC| (section A.24 <#section-A.24>).
+
+
+ A.80 |INSB|, |INSW|, |INSD|: Input String from I/O Port
+
+INSB ; 6C [186]
+INSW ; o16 6D [186]
+INSD ; o32 6D [386]
+
+|INSB| inputs a byte from the I/O port specified in |DX| and stores it
+at |[ES:DI]| or |[ES:EDI]|. It then increments or decrements (depending
+on the direction flag: increments if the flag is clear, decrements if it
+is set) |DI| or |EDI|.
+
+The register used is |DI| if the address size is 16 bits, and |EDI| if
+it is 32 bits. If you need to use an address size not equal to the
+current |BITS| setting, you can use an explicit |a16| or |a32| prefix.
+
+Segment override prefixes have no effect for this instruction: the use
+of |ES| for the load from |[DI]| or |[EDI]| cannot be overridden.
+
+|INSW| and |INSD| work in the same way, but they input a word or a
+doubleword instead of a byte, and increment or decrement the addressing
+register by 2 or 4 instead of 1.
+
+The |REP| prefix may be used to repeat the instruction |CX| (or |ECX| -
+again, the address size chooses which) times.
+
+See also |OUTSB|, |OUTSW| and |OUTSD| (section A.112 <#section-A.112>).
+
+
+ A.81 |INT|: Software Interrupt
+
+INT imm8 ; CD ib [8086]
+
+|INT| causes a software interrupt through a specified vector number from
+0 to 255.
+
+The code generated by the |INT| instruction is always two bytes long:
+although there are short forms for some |INT| instructions, NASM does
+not generate them when it sees the |INT| mnemonic. In order to generate
+single-byte breakpoint instructions, use the |INT3| or |INT1|
+instructions (see section A.82 <#section-A.82>) instead.
+
+
+ A.82 |INT3|, |INT1|, |ICEBP|, |INT01|: Breakpoints
+
+INT1 ; F1 [P6]
+ICEBP ; F1 [P6]
+INT01 ; F1 [P6]
+
+INT3 ; CC [8086]
+
+|INT1| and |INT3| are short one-byte forms of the instructions |INT 1|
+and |INT 3| (see section A.81 <#section-A.81>). They perform a similar
+function to their longer counterparts, but take up less code space. They
+are used as breakpoints by debuggers.
+
+|INT1|, and its alternative synonyms |INT01| and |ICEBP|, is an
+instruction used by in-circuit emulators (ICEs). It is present, though
+not documented, on some processors down to the 286, but is only
+documented for the Pentium Pro. |INT3| is the instruction normally used
+as a breakpoint by debuggers.
+
+|INT3| is not precisely equivalent to |INT 3|: the short form, since it
+is designed to be used as a breakpoint, bypasses the normal IOPL checks
+in virtual-8086 mode, and also does not go through interrupt redirection.
+
+
+ A.83 |INTO|: Interrupt if Overflow
+
+INTO ; CE [8086]
+
+|INTO| performs an |INT 4| software interrupt (see section A.81
+<#section-A.81>) if and only if the overflow flag is set.
+
+
+ A.84 |INVD|: Invalidate Internal Caches
+
+INVD ; 0F 08 [486]
+
+|INVD| invalidates and empties the processor's internal caches, and
+causes the processor to instruct external caches to do the same. It does
+not write the contents of the caches back to memory first: any modified
+data held in the caches will be lost. To write the data back first, use
+|WBINVD| (section A.164 <#section-A.164>).
+
+
+ A.85 |INVLPG|: Invalidate TLB Entry
+
+INVLPG mem ; 0F 01 /0 [486]
+
+|INVLPG| invalidates the translation lookahead buffer (TLB) entry
+associated with the supplied memory address.
+
+
+ A.86 |IRET|, |IRETW|, |IRETD|: Return from Interrupt
+
+IRET ; CF [8086]
+IRETW ; o16 CF [8086]
+IRETD ; o32 CF [386]
+
+|IRET| returns from an interrupt (hardware or software) by means of
+popping |IP| (or |EIP|), |CS| and the flags off the stack and then
+continuing execution from the new |CS:IP|.
+
+|IRETW| pops |IP|, |CS| and the flags as 2 bytes each, taking 6 bytes
+off the stack in total. |IRETD| pops |EIP| as 4 bytes, pops a further 4
+bytes of which the top two are discarded and the bottom two go into
+|CS|, and pops the flags as 4 bytes as well, taking 12 bytes off the stack.
+
+|IRET| is a shorthand for either |IRETW| or |IRETD|, depending on the
+default |BITS| setting at the time.
+
+
+ A.87 |JCXZ|, |JECXZ|: Jump if CX/ECX Zero
+
+JCXZ imm ; o16 E3 rb [8086]
+JECXZ imm ; o32 E3 rb [386]
+
+|JCXZ| performs a short jump (with maximum range 128 bytes) if and only
+if the contents of the |CX| register is 0. |JECXZ| does the same thing,
+but with |ECX|.
+
+
+ A.88 |JMP|: Jump
+
+JMP imm ; E9 rw/rd [8086]
+
+JMP SHORT imm ; EB rb [8086]
+JMP imm:imm16 ; o16 EA iw iw [8086]
+JMP imm:imm32 ; o32 EA id iw [386]
+
+JMP FAR mem ; o16 FF /5 [8086]
+JMP FAR mem ; o32 FF /5 [386]
+JMP r/m16 ; o16 FF /4 [8086]
+JMP r/m32 ; o32 FF /4 [386]
+
+|JMP| jumps to a given address. The address may be specified as an
+absolute segment and offset, or as a relative jump within the current
+segment.
+
+|JMP SHORT imm| has a maximum range of 128 bytes, since the displacement
+is specified as only 8 bits, but takes up less code space. NASM does not
+choose when to generate |JMP SHORT| for you: you must explicitly code
+|SHORT| every time you want a short jump.
+
+You can choose between the two immediate far jump forms (|JMP imm:imm|)
+by the use of the |WORD| and |DWORD| keywords: |JMP WORD 0x1234:0x5678|)
+or |JMP DWORD 0x1234:0x56789abc|.
+
+The |JMP FAR mem| forms execute a far jump by loading the destination
+address out of memory. The address loaded consists of 16 or 32 bits of
+offset (depending on the operand size), and 16 bits of segment. The
+operand size may be overridden using |JMP WORD FAR mem| or |JMP DWORD
+FAR mem|.
+
+The |JMP r/m| forms execute a near jump (within the same segment),
+loading the destination address out of memory or out of a register. The
+keyword |NEAR| may be specified, for clarity, in these forms, but is not
+necessary. Again, operand size can be overridden using |JMP WORD mem| or
+|JMP DWORD mem|.
+
+As a convenience, NASM does not require you to jump to a far symbol by
+coding the cumbersome |JMP SEG routine:routine|, but instead allows the
+easier synonym |JMP FAR routine|.
+
+The |CALL r/m| forms given above are near calls; NASM will accept the
+|NEAR| keyword (e.g. |CALL NEAR [address]|), even though it is not
+strictly necessary.
+
+
+ A.89 |Jcc|: Conditional Branch
+
+Jcc imm ; 70+cc rb [8086]
+Jcc NEAR imm ; 0F 80+cc rw/rd [386]
+
+The conditional jump instructions execute a near (same segment) jump if
+and only if their conditions are satisfied. For example, |JNZ| jumps
+only if the zero flag is not set.
+
+The ordinary form of the instructions has only a 128-byte range; the
+|NEAR| form is a 386 extension to the instruction set, and can span the
+full size of a segment. NASM will not override your choice of jump
+instruction: if you want |Jcc NEAR|, you have to use the |NEAR| keyword.
+
+The |SHORT| keyword is allowed on the first form of the instruction, for
+clarity, but is not necessary.
+
+
+ A.90 |LAHF|: Load AH from Flags
+
+LAHF ; 9F [8086]
+
+|LAHF| sets the |AH| register according to the contents of the low byte
+of the flags word. See also |SAHF| (section A.145 <#section-A.145>).
+
+
+ A.91 |LAR|: Load Access Rights
+
+LAR reg16,r/m16 ; o16 0F 02 /r [286,PRIV]
+LAR reg32,r/m32 ; o32 0F 02 /r [286,PRIV]
+
+|LAR| takes the segment selector specified by its source (second)
+operand, finds the corresponding segment descriptor in the GDT or LDT,
+and loads the access-rights byte of the descriptor into its destination
+(first) operand.
+
+
+ A.92 |LDS|, |LES|, |LFS|, |LGS|, |LSS|: Load Far Pointer
+
+LDS reg16,mem ; o16 C5 /r [8086]
+LDS reg32,mem ; o32 C5 /r [8086]
+
+LES reg16,mem ; o16 C4 /r [8086]
+LES reg32,mem ; o32 C4 /r [8086]
+
+LFS reg16,mem ; o16 0F B4 /r [386]
+LFS reg32,mem ; o32 0F B4 /r [386]
+
+LGS reg16,mem ; o16 0F B5 /r [386]
+LGS reg32,mem ; o32 0F B5 /r [386]
+
+LSS reg16,mem ; o16 0F B2 /r [386]
+LSS reg32,mem ; o32 0F B2 /r [386]
+
+These instructions load an entire far pointer (16 or 32 bits of offset,
+plus 16 bits of segment) out of memory in one go. |LDS|, for example,
+loads 16 or 32 bits from the given memory address into the given
+register (depending on the size of the register), then loads the /next/
+16 bits from memory into |DS|. |LES|, |LFS|, |LGS| and |LSS| work in the
+same way but use the other segment registers.
+
+
+ A.93 |LEA|: Load Effective Address
+
+LEA reg16,mem ; o16 8D /r [8086]
+LEA reg32,mem ; o32 8D /r [8086]
+
+|LEA|, despite its syntax, does not access memory. It calculates the
+effective address specified by its second operand as if it were going to
+load or store data from it, but instead it stores the calculated address
+into the register specified by its first operand. This can be used to
+perform quite complex calculations (e.g. |LEA EAX,[EBX+ECX*4+100]|) in
+one instruction.
+
+|LEA|, despite being a purely arithmetic instruction which accesses no
+memory, still requires square brackets around its second operand, as if
+it were a memory reference.
+
+
+ A.94 |LEAVE|: Destroy Stack Frame
+
+LEAVE ; C9 [186]
+
+|LEAVE| destroys a stack frame of the form created by the |ENTER|
+instruction (see section A.27 <#section-A.27>). It is functionally
+equivalent to |MOV ESP,EBP| followed by |POP EBP| (or |MOV SP,BP|
+followed by |POP BP| in 16-bit mode).
+
+
+ A.95 |LGDT|, |LIDT|, |LLDT|: Load Descriptor Tables
+
+LGDT mem ; 0F 01 /2 [286,PRIV]
+LIDT mem ; 0F 01 /3 [286,PRIV]
+LLDT r/m16 ; 0F 00 /2 [286,PRIV]
+
+|LGDT| and |LIDT| both take a 6-byte memory area as an operand: they
+load a 32-bit linear address and a 16-bit size limit from that area (in
+the opposite order) into the GDTR (global descriptor table register) or
+IDTR (interrupt descriptor table register). These are the only
+instructions which directly use /linear/ addresses, rather than
+segment/offset pairs.
+
+|LLDT| takes a segment selector as an operand. The processor looks up
+that selector in the GDT and stores the limit and base address given
+there into the LDTR (local descriptor table register).
+
+See also |SGDT|, |SIDT| and |SLDT| (section A.151 <#section-A.151>).
+
+
+ A.96 |LMSW|: Load/Store Machine Status Word
+
+LMSW r/m16 ; 0F 01 /6 [286,PRIV]
+
+|LMSW| loads the bottom four bits of the source operand into the bottom
+four bits of the |CR0| control register (or the Machine Status Word, on
+286 processors). See also |SMSW| (section A.155 <#section-A.155>).
+
+
+ A.97 |LOADALL|, |LOADALL286|: Load Processor State
+
+LOADALL ; 0F 07 [386,UNDOC]
+LOADALL286 ; 0F 05 [286,UNDOC]
+
+This instruction, in its two different-opcode forms, is apparently
+supported on most 286 processors, some 386 and possibly some 486. The
+opcode differs between the 286 and the 386.
+
+The function of the instruction is to load all information relating to
+the state of the processor out of a block of memory: on the 286, this
+block is located implicitly at absolute address |0x800|, and on the 386
+and 486 it is at |[ES:EDI]|.
+
+
+ A.98 |LODSB|, |LODSW|, |LODSD|: Load from String
+
+LODSB ; AC [8086]
+LODSW ; o16 AD [8086]
+LODSD ; o32 AD [386]
+
+|LODSB| loads a byte from |[DS:SI]| or |[DS:ESI]| into |AL|. It then
+increments or decrements (depending on the direction flag: increments if
+the flag is clear, decrements if it is set) |SI| or |ESI|.
+
+The register used is |SI| if the address size is 16 bits, and |ESI| if
+it is 32 bits. If you need to use an address size not equal to the
+current |BITS| setting, you can use an explicit |a16| or |a32| prefix.
+
+The segment register used to load from |[SI]| or |[ESI]| can be
+overridden by using a segment register name as a prefix (for example,
+|es lodsb|).
+
+|LODSW| and |LODSD| work in the same way, but they load a word or a
+doubleword instead of a byte, and increment or decrement the addressing
+registers by 2 or 4 instead of 1.
+
+
+ A.99 |LOOP|, |LOOPE|, |LOOPZ|, |LOOPNE|, |LOOPNZ|: Loop with Counter
+
+LOOP imm ; E2 rb [8086]
+LOOP imm,CX ; a16 E2 rb [8086]
+LOOP imm,ECX ; a32 E2 rb [386]
+
+LOOPE imm ; E1 rb [8086]
+LOOPE imm,CX ; a16 E1 rb [8086]
+LOOPE imm,ECX ; a32 E1 rb [386]
+LOOPZ imm ; E1 rb [8086]
+LOOPZ imm,CX ; a16 E1 rb [8086]
+LOOPZ imm,ECX ; a32 E1 rb [386]
+
+LOOPNE imm ; E0 rb [8086]
+LOOPNE imm,CX ; a16 E0 rb [8086]
+LOOPNE imm,ECX ; a32 E0 rb [386]
+LOOPNZ imm ; E0 rb [8086]
+LOOPNZ imm,CX ; a16 E0 rb [8086]
+LOOPNZ imm,ECX ; a32 E0 rb [386]
+
+|LOOP| decrements its counter register (either |CX| or |ECX| - if one is
+not specified explicitly, the |BITS| setting dictates which is used) by
+one, and if the counter does not become zero as a result of this
+operation, it jumps to the given label. The jump has a range of 128 bytes.
+
+|LOOPE| (or its synonym |LOOPZ|) adds the additional condition that it
+only jumps if the counter is nonzero /and/ the zero flag is set.
+Similarly, |LOOPNE| (and |LOOPNZ|) jumps only if the counter is nonzero
+and the zero flag is clear.
+
+
+ A.100 |LSL|: Load Segment Limit
+
+LSL reg16,r/m16 ; o16 0F 03 /r [286,PRIV]
+LSL reg32,r/m32 ; o32 0F 03 /r [286,PRIV]
+
+|LSL| is given a segment selector in its source (second) operand; it
+computes the segment limit value by loading the segment limit field from
+the associated segment descriptor in the GDT or LDT. (This involves
+shifting left by 12 bits if the segment limit is page-granular, and not
+if it is byte-granular; so you end up with a byte limit in either case.)
+The segment limit obtained is then loaded into the destination (first)
+operand.
+
+
+ A.101 |LTR|: Load Task Register
+
+LTR r/m16 ; 0F 00 /3 [286,PRIV]
+
+|LTR| looks up the segment base and limit in the GDT or LDT descriptor
+specified by the segment selector given as its operand, and loads them
+into the Task Register.
+
+
+ A.102 |MOV|: Move Data
+
+MOV r/m8,reg8 ; 88 /r [8086]
+MOV r/m16,reg16 ; o16 89 /r [8086]
+MOV r/m32,reg32 ; o32 89 /r [386]
+MOV reg8,r/m8 ; 8A /r [8086]
+MOV reg16,r/m16 ; o16 8B /r [8086]
+MOV reg32,r/m32 ; o32 8B /r [386]
+
+MOV reg8,imm8 ; B0+r ib [8086]
+MOV reg16,imm16 ; o16 B8+r iw [8086]
+MOV reg32,imm32 ; o32 B8+r id [386]
+MOV r/m8,imm8 ; C6 /0 ib [8086]
+MOV r/m16,imm16 ; o16 C7 /0 iw [8086]
+MOV r/m32,imm32 ; o32 C7 /0 id [386]
+
+MOV AL,memoffs8 ; A0 ow/od [8086]
+MOV AX,memoffs16 ; o16 A1 ow/od [8086]
+MOV EAX,memoffs32 ; o32 A1 ow/od [386]
+MOV memoffs8,AL ; A2 ow/od [8086]
+MOV memoffs16,AX ; o16 A3 ow/od [8086]
+MOV memoffs32,EAX ; o32 A3 ow/od [386]
+
+MOV r/m16,segreg ; o16 8C /r [8086]
+MOV r/m32,segreg ; o32 8C /r [386]
+MOV segreg,r/m16 ; o16 8E /r [8086]
+MOV segreg,r/m32 ; o32 8E /r [386]
+
+MOV reg32,CR0/2/3/4 ; 0F 20 /r [386]
+MOV reg32,DR0/1/2/3/6/7 ; 0F 21 /r [386]
+MOV reg32,TR3/4/5/6/7 ; 0F 24 /r [386]
+MOV CR0/2/3/4,reg32 ; 0F 22 /r [386]
+MOV DR0/1/2/3/6/7,reg32 ; 0F 23 /r [386]
+MOV TR3/4/5/6/7,reg32 ; 0F 26 /r [386]
+
+|MOV| copies the contents of its source (second) operand into its
+destination (first) operand.
+
+In all forms of the |MOV| instruction, the two operands are the same
+size, except for moving between a segment register and an |r/m32|
+operand. These instructions are treated exactly like the corresponding
+16-bit equivalent (so that, for example, |MOV DS,EAX| functions
+identically to |MOV DS,AX| but saves a prefix when in 32-bit mode),
+except that when a segment register is moved into a 32-bit destination,
+the top two bytes of the result are undefined.
+
+|MOV| may not use |CS| as a destination.
+
+|CR4| is only a supported register on the Pentium and above.
+
+
+ A.103 |MOVD|: Move Doubleword to/from MMX Register
+
+MOVD mmxreg,r/m32 ; 0F 6E /r [PENT,MMX]
+MOVD r/m32,mmxreg ; 0F 7E /r [PENT,MMX]
+
+|MOVD| copies 32 bits from its source (second) operand into its
+destination (first) operand. When the destination is a 64-bit MMX
+register, the top 32 bits are set to zero.
+
+
+ A.104 |MOVQ|: Move Quadword to/from MMX Register
+
+MOVQ mmxreg,r/m64 ; 0F 6F /r [PENT,MMX]
+MOVQ r/m64,mmxreg ; 0F 7F /r [PENT,MMX]
+
+|MOVQ| copies 64 bits from its source (second) operand into its
+destination (first) operand.
+
+
+ A.105 |MOVSB|, |MOVSW|, |MOVSD|: Move String
+
+MOVSB ; A4 [8086]
+MOVSW ; o16 A5 [8086]
+MOVSD ; o32 A5 [386]
+
+|MOVSB| copies the byte at |[ES:DI]| or |[ES:EDI]| to |[DS:SI]| or
+|[DS:ESI]|. It then increments or decrements (depending on the direction
+flag: increments if the flag is clear, decrements if it is set) |SI| and
+|DI| (or |ESI| and |EDI|).
+
+The registers used are |SI| and |DI| if the address size is 16 bits, and
+|ESI| and |EDI| if it is 32 bits. If you need to use an address size not
+equal to the current |BITS| setting, you can use an explicit |a16| or
+|a32| prefix.
+
+The segment register used to load from |[SI]| or |[ESI]| can be
+overridden by using a segment register name as a prefix (for example,
+|es movsb|). The use of |ES| for the store to |[DI]| or |[EDI]| cannot
+be overridden.
+
+|MOVSW| and |MOVSD| work in the same way, but they copy a word or a
+doubleword instead of a byte, and increment or decrement the addressing
+registers by 2 or 4 instead of 1.
+
+The |REP| prefix may be used to repeat the instruction |CX| (or |ECX| -
+again, the address size chooses which) times.
+
+
+ A.106 |MOVSX|, |MOVZX|: Move Data with Sign or Zero Extend
+
+MOVSX reg16,r/m8 ; o16 0F BE /r [386]
+MOVSX reg32,r/m8 ; o32 0F BE /r [386]
+MOVSX reg32,r/m16 ; o32 0F BF /r [386]
+
+MOVZX reg16,r/m8 ; o16 0F B6 /r [386]
+MOVZX reg32,r/m8 ; o32 0F B6 /r [386]
+MOVZX reg32,r/m16 ; o32 0F B7 /r [386]
+
+|MOVSX| sign-extends its source (second) operand to the length of its
+destination (first) operand, and copies the result into the destination
+operand. |MOVZX| does the same, but zero-extends rather than
+sign-extending.
+
+
+ A.107 |MUL|: Unsigned Integer Multiply
+
+MUL r/m8 ; F6 /4 [8086]
+MUL r/m16 ; o16 F7 /4 [8086]
+MUL r/m32 ; o32 F7 /4 [386]
+
+|MUL| performs unsigned integer multiplication. The other operand to the
+multiplication, and the destination operand, are implicit, in the
+following way:
+
+ * For |MUL r/m8|, |AL| is multiplied by the given operand; the
+ product is stored in |AX|.
+ * For |MUL r/m16|, |AX| is multiplied by the given operand; the
+ product is stored in |DX:AX|.
+ * For |MUL r/m32|, |EAX| is multiplied by the given operand; the
+ product is stored in |EDX:EAX|.
+
+Signed integer multiplication is performed by the |IMUL| instruction:
+see section A.77 <#section-A.77>.
+
+
+ A.108 |NEG|, |NOT|: Two's and One's Complement
+
+NEG r/m8 ; F6 /3 [8086]
+NEG r/m16 ; o16 F7 /3 [8086]
+NEG r/m32 ; o32 F7 /3 [386]
+
+NOT r/m8 ; F6 /2 [8086]
+NOT r/m16 ; o16 F7 /2 [8086]
+NOT r/m32 ; o32 F7 /2 [386]
+
+|NEG| replaces the contents of its operand by the two's complement
+negation (invert all the bits and then add one) of the original value.
+|NOT|, similarly, performs one's complement (inverts all the bits).
+
+
+ A.109 |NOP|: No Operation
+
+NOP ; 90 [8086]
+
+|NOP| performs no operation. Its opcode is the same as that generated by
+|XCHG AX,AX| or |XCHG EAX,EAX| (depending on the processor mode; see
+section A.168 <#section-A.168>).
+
+
+ A.110 |OR|: Bitwise OR
+
+OR r/m8,reg8 ; 08 /r [8086]
+OR r/m16,reg16 ; o16 09 /r [8086]
+OR r/m32,reg32 ; o32 09 /r [386]
+
+OR reg8,r/m8 ; 0A /r [8086]
+OR reg16,r/m16 ; o16 0B /r [8086]
+OR reg32,r/m32 ; o32 0B /r [386]
+
+OR r/m8,imm8 ; 80 /1 ib [8086]
+OR r/m16,imm16 ; o16 81 /1 iw [8086]
+OR r/m32,imm32 ; o32 81 /1 id [386]
+
+OR r/m16,imm8 ; o16 83 /1 ib [8086]
+OR r/m32,imm8 ; o32 83 /1 ib [386]
+
+OR AL,imm8 ; 0C ib [8086]
+OR AX,imm16 ; o16 0D iw [8086]
+OR EAX,imm32 ; o32 0D id [386]
+
+|OR| performs a bitwise OR operation between its two operands (i.e. each
+bit of the result is 1 if and only if at least one of the corresponding
+bits of the two inputs was 1), and stores the result in the destination
+(first) operand.
+
+In the forms with an 8-bit immediate second operand and a longer first
+operand, the second operand is considered to be signed, and is
+sign-extended to the length of the first operand. In these cases, the
+|BYTE| qualifier is necessary to force NASM to generate this form of the
+instruction.
+
+The MMX instruction |POR| (see section A.129 <#section-A.129>) performs
+the same operation on the 64-bit MMX registers.
+
+
+ A.111 |OUT|: Output Data to I/O Port
+
+OUT imm8,AL ; E6 ib [8086]
+OUT imm8,AX ; o16 E7 ib [8086]
+OUT imm8,EAX ; o32 E7 ib [386]
+OUT DX,AL ; EE [8086]
+OUT DX,AX ; o16 EF [8086]
+OUT DX,EAX ; o32 EF [386]
+
+|IN| writes the contents of the given source register to the specified
+I/O port. The port number may be specified as an immediate value if it
+is between 0 and 255, and otherwise must be stored in |DX|. See also
+|IN| (section A.78 <#section-A.78>).
+
+
+ A.112 |OUTSB|, |OUTSW|, |OUTSD|: Output String to I/O Port
+
+OUTSB ; 6E [186]
+
+OUTSW ; o16 6F [186]
+
+OUTSD ; o32 6F [386]
+
+|OUTSB| loads a byte from |[DS:SI]| or |[DS:ESI]| and writes it to the
+I/O port specified in |DX|. It then increments or decrements (depending
+on the direction flag: increments if the flag is clear, decrements if it
+is set) |SI| or |ESI|.
+
+The register used is |SI| if the address size is 16 bits, and |ESI| if
+it is 32 bits. If you need to use an address size not equal to the
+current |BITS| setting, you can use an explicit |a16| or |a32| prefix.
+
+The segment register used to load from |[SI]| or |[ESI]| can be
+overridden by using a segment register name as a prefix (for example,
+|es outsb|).
+
+|OUTSW| and |OUTSD| work in the same way, but they output a word or a
+doubleword instead of a byte, and increment or decrement the addressing
+registers by 2 or 4 instead of 1.
+
+The |REP| prefix may be used to repeat the instruction |CX| (or |ECX| -
+again, the address size chooses which) times.
+
+
+ A.113 |PACKSSDW|, |PACKSSWB|, |PACKUSWB|: Pack Data
+
+PACKSSDW mmxreg,r/m64 ; 0F 6B /r [PENT,MMX]
+PACKSSWB mmxreg,r/m64 ; 0F 63 /r [PENT,MMX]
+PACKUSWB mmxreg,r/m64 ; 0F 67 /r [PENT,MMX]
+
+All these instructions start by forming a notional 128-bit word by
+placing the source (second) operand on the left of the destination
+(first) operand. |PACKSSDW| then splits this 128-bit word into four
+doublewords, converts each to a word, and loads them side by side into
+the destination register; |PACKSSWB| and |PACKUSWB| both split the
+128-bit word into eight words, converts each to a byte, and loads
+/those/ side by side into the destination register.
+
+|PACKSSDW| and |PACKSSWB| perform signed saturation when reducing the
+length of numbers: if the number is too large to fit into the reduced
+space, they replace it by the largest signed number (|7FFFh| or |7Fh|)
+that /will/ fit, and if it is too small then they replace it by the
+smallest signed number (|8000h| or |80h|) that will fit. |PACKUSWB|
+performs unsigned saturation: it treats its input as unsigned, and
+replaces it by the largest unsigned number that will fit.
+
+
+ A.114 |PADDxx|: MMX Packed Addition
+
+PADDB mmxreg,r/m64 ; 0F FC /r [PENT,MMX]
+PADDW mmxreg,r/m64 ; 0F FD /r [PENT,MMX]
+PADDD mmxreg,r/m64 ; 0F FE /r [PENT,MMX]
+
+PADDSB mmxreg,r/m64 ; 0F EC /r [PENT,MMX]
+PADDSW mmxreg,r/m64 ; 0F ED /r [PENT,MMX]
+
+PADDUSB mmxreg,r/m64 ; 0F DC /r [PENT,MMX]
+PADDUSW mmxreg,r/m64 ; 0F DD /r [PENT,MMX]
+
+|PADDxx| all perform packed addition between their two 64-bit operands,
+storing the result in the destination (first) operand. The |PADDxB|
+forms treat the 64-bit operands as vectors of eight bytes, and add each
+byte individually; |PADDxW| treat the operands as vectors of four words;
+and |PADDD| treats its operands as vectors of two doublewords.
+
+|PADDSB| and |PADDSW| perform signed saturation on the sum of each pair
+of bytes or words: if the result of an addition is too large or too
+small to fit into a signed byte or word result, it is clipped
+(saturated) to the largest or smallest value which /will/ fit. |PADDUSB|
+and |PADDUSW| similarly perform unsigned saturation, clipping to |0FFh|
+or |0FFFFh| if the result is larger than that.
+
+
+ A.115 |PADDSIW|: MMX Packed Addition to Implicit Destination
+
+PADDSIW mmxreg,r/m64 ; 0F 51 /r [CYRIX,MMX]
+
+|PADDSIW|, specific to the Cyrix extensions to the MMX instruction set,
+performs the same function as |PADDSW|, except that the result is not
+placed in the register specified by the first operand, but instead in
+the register whose number differs from the first operand only in the
+last bit. So |PADDSIW MM0,MM2| would put the result in |MM1|, but
+|PADDSIW MM1,MM2| would put the result in |MM0|.
+
+
+ A.116 |PAND|, |PANDN|: MMX Bitwise AND and AND-NOT
+
+PAND mmxreg,r/m64 ; 0F DB /r [PENT,MMX]
+PANDN mmxreg,r/m64 ; 0F DF /r [PENT,MMX]
+
+|PAND| performs a bitwise AND operation between its two operands (i.e.
+each bit of the result is 1 if and only if the corresponding bits of the
+two inputs were both 1), and stores the result in the destination
+(first) operand.
+
+|PANDN| performs the same operation, but performs a one's complement
+operation on the destination (first) operand first.
+
+
+ A.117 |PAVEB|: MMX Packed Average
+
+PAVEB mmxreg,r/m64 ; 0F 50 /r [CYRIX,MMX]
+
+|PAVEB|, specific to the Cyrix MMX extensions, treats its two operands
+as vectors of eight unsigned bytes, and calculates the average of the
+corresponding bytes in the operands. The resulting vector of eight
+averages is stored in the first operand.
+
+
+ A.118 |PCMPxx|: MMX Packed Comparison
+
+PCMPEQB mmxreg,r/m64 ; 0F 74 /r [PENT,MMX]
+PCMPEQW mmxreg,r/m64 ; 0F 75 /r [PENT,MMX]
+PCMPEQD mmxreg,r/m64 ; 0F 76 /r [PENT,MMX]
+
+PCMPGTB mmxreg,r/m64 ; 0F 64 /r [PENT,MMX]
+PCMPGTW mmxreg,r/m64 ; 0F 65 /r [PENT,MMX]
+PCMPGTD mmxreg,r/m64 ; 0F 66 /r [PENT,MMX]
+
+The |PCMPxx| instructions all treat their operands as vectors of bytes,
+words, or doublewords; corresponding elements of the source and
+destination are compared, and the corresponding element of the
+destination (first) operand is set to all zeros or all ones depending on
+the result of the comparison.
+
+|PCMPxxB| treats the operands as vectors of eight bytes, |PCMPxxW|
+treats them as vectors of four words, and |PCMPxxD| as two doublewords.
+
+|PCMPEQx| sets the corresponding element of the destination operand to
+all ones if the two elements compared are equal; |PCMPGTx| sets the
+destination element to all ones if the element of the first
+(destination) operand is greater (treated as a signed integer) than that
+of the second (source) operand.
+
+
+ A.119 |PDISTIB|: MMX Packed Distance and Accumulate with Implied
+ Register
+
+PDISTIB mmxreg,mem64 ; 0F 54 /r [CYRIX,MMX]
+
+|PDISTIB|, specific to the Cyrix MMX extensions, treats its two input
+operands as vectors of eight unsigned bytes. For each byte position, it
+finds the absolute difference between the bytes in that position in the
+two input operands, and adds that value to the byte in the same position
+in the implied output register. The addition is saturated to an unsigned
+byte in the same way as |PADDUSB|.
+
+The implied output register is found in the same way as |PADDSIW|
+(section A.115 <#section-A.115>).
+
+Note that |PDISTIB| cannot take a register as its second source operand.
+
+
+ A.120 |PMACHRIW|: MMX Packed Multiply and Accumulate with Rounding
+
+PMACHRIW mmxreg,mem64 ; 0F 5E /r [CYRIX,MMX]
+
+|PMACHRIW| acts almost identically to |PMULHRIW| (section A.123
+<#section-A.123>), but instead of /storing/ its result in the implied
+destination register, it /adds/ its result, as four packed words, to the
+implied destination register. No saturation is done: the addition can
+wrap around.
+
+Note that |PMACHRIW| cannot take a register as its second source operand.
+
+
+ A.121 |PMADDWD|: MMX Packed Multiply and Add
+
+PMADDWD mmxreg,r/m64 ; 0F F5 /r [PENT,MMX]
+
+|PMADDWD| treats its two inputs as vectors of four signed words. It
+multiplies corresponding elements of the two operands, giving four
+signed doubleword results. The top two of these are added and placed in
+the top 32 bits of the destination (first) operand; the bottom two are
+added and placed in the bottom 32 bits.
+
+
+ A.122 |PMAGW|: MMX Packed Magnitude
+
+PMAGW mmxreg,r/m64 ; 0F 52 /r [CYRIX,MMX]
+
+|PMAGW|, specific to the Cyrix MMX extensions, treats both its operands
+as vectors of four signed words. It compares the absolute values of the
+words in corresponding positions, and sets each word of the destination
+(first) operand to whichever of the two words in that position had the
+larger absolute value.
+
+
+ A.123 |PMULHRW|, |PMULHRIW|: MMX Packed Multiply High with Rounding
+
+PMULHRW mmxreg,r/m64 ; 0F 59 /r [CYRIX,MMX]
+PMULHRIW mmxreg,r/m64 ; 0F 5D /r [CYRIX,MMX]
+
+These instructions, specific to the Cyrix MMX extensions, treat their
+operands as vectors of four signed words. Words in corresponding
+positions are multiplied, to give a 32-bit value in which bits 30 and 31
+are guaranteed equal. Bits 30 to 15 of this value (bit mask
+|0x7FFF8000|) are taken and stored in the corresponding position of the
+destination operand, after first rounding the low bit (equivalent to
+adding |0x4000| before extracting bits 30 to 15).
+
+For |PMULHRW|, the destination operand is the first operand; for
+|PMULHRIW| the destination operand is implied by the first operand in
+the manner of |PADDSIW| (section A.115 <#section-A.115>).
+
+
+ A.124 |PMULHW|, |PMULLW|: MMX Packed Multiply
+
+PMULHW mmxreg,r/m64 ; 0F E5 /r [PENT,MMX]
+PMULLW mmxreg,r/m64 ; 0F D5 /r [PENT,MMX]
+
+|PMULxW| treats its two inputs as vectors of four signed words. It
+multiplies corresponding elements of the two operands, giving four
+signed doubleword results.
+
+|PMULHW| then stores the top 16 bits of each doubleword in the
+destination (first) operand; |PMULLW| stores the bottom 16 bits of each
+doubleword in the destination operand.
+
+
+ A.125 |PMVccZB|: MMX Packed Conditional Move
+
+PMVZB mmxreg,mem64 ; 0F 58 /r [CYRIX,MMX]
+PMVNZB mmxreg,mem64 ; 0F 5A /r [CYRIX,MMX]
+PMVLZB mmxreg,mem64 ; 0F 5B /r [CYRIX,MMX]
+PMVGEZB mmxreg,mem64 ; 0F 5C /r [CYRIX,MMX]
+
+These instructions, specific to the Cyrix MMX extensions, perform
+parallel conditional moves. The two input operands are treated as
+vectors of eight bytes. Each byte of the destination (first) operand is
+either written from the corresponding byte of the source (second)
+operand, or left alone, depending on the value of the byte in the
+/implied/ operand (specified in the same way as |PADDSIW|, in section
+A.115 <#section-A.115>).
+
+|PMVZB| performs each move if the corresponding byte in the implied
+operand is zero. |PMVNZB| moves if the byte is non-zero. |PMVLZB| moves
+if the byte is less than zero, and |PMVGEZB| moves if the byte is
+greater than or equal to zero.
+
+Note that these instructions cannot take a register as their second
+source operand.
+
+
+ A.126 |POP|: Pop Data from Stack
+
+POP reg16 ; o16 58+r [8086]
+POP reg32 ; o32 58+r [386]
+
+POP r/m16 ; o16 8F /0 [8086]
+POP r/m32 ; o32 8F /0 [386]
+
+POP CS ; 0F [8086,UNDOC]
+POP DS ; 1F [8086]
+POP ES ; 07 [8086]
+POP SS ; 17 [8086]
+POP FS ; 0F A1 [386]
+POP GS ; 0F A9 [386]
+
+|POP| loads a value from the stack (from |[SS:SP]| or |[SS:ESP]|) and
+then increments the stack pointer.
+
+The address-size attribute of the instruction determines whether |SP| or
+|ESP| is used as the stack pointer: to deliberately override the default
+given by the |BITS| setting, you can use an |a16| or |a32| prefix.
+
+The operand-size attribute of the instruction determines whether the
+stack pointer is incremented by 2 or 4: this means that segment register
+pops in |BITS 32| mode will pop 4 bytes off the stack and discard the
+upper two of them. If you need to override that, you can use an |o16| or
+|o32| prefix.
+
+The above opcode listings give two forms for general-purpose register
+pop instructions: for example, |POP BX| has the two forms |5B| and |8F
+C3|. NASM will always generate the shorter form when given |POP BX|.
+NDISASM will disassemble both.
+
+|POP CS| is not a documented instruction, and is not supported on any
+processor above the 8086 (since they use |0Fh| as an opcode prefix for
+instruction set extensions). However, at least some 8086 processors do
+support it, and so NASM generates it for completeness.
+
+
+ A.127 |POPAx|: Pop All General-Purpose Registers
+
+POPA ; 61 [186]
+POPAW ; o16 61 [186]
+POPAD ; o32 61 [386]
+
+|POPAW| pops a word from the stack into each of, successively, |DI|,
+|SI|, |BP|, nothing (it discards a word from the stack which was a
+placeholder for |SP|), |BX|, |DX|, |CX| and |AX|. It is intended to
+reverse the operation of |PUSHAW| (see section A.135 <#section-A.135>),
+but it ignores the value for |SP| that was pushed on the stack by |PUSHAW|.
+
+|POPAD| pops twice as much data, and places the results in |EDI|, |ESI|,
+|EBP|, nothing (placeholder for |ESP|), |EBX|, |EDX|, |ECX| and |EAX|.
+It reverses the operation of |PUSHAD|.
+
+|POPA| is an alias mnemonic for either |POPAW| or |POPAD|, depending on
+the current |BITS| setting.
+
+Note that the registers are popped in reverse order of their numeric
+values in opcodes (see section A.2.1 <#section-A.2.1>).
+
+
+ A.128 |POPFx|: Pop Flags Register
+
+POPF ; 9D [186]
+POPFW ; o16 9D [186]
+POPFD ; o32 9D [386]
+
+|POPFW| pops a word from the stack and stores it in the bottom 16 bits
+of the flags register (or the whole flags register, on processors below
+a 386). |POPFD| pops a doubleword and stores it in the entire flags
+register.
+
+|POPF| is an alias mnemonic for either |POPFW| or |POPFD|, depending on
+the current |BITS| setting.
+
+See also |PUSHF| (section A.136 <#section-A.136>).
+
+
+ A.129 |POR|: MMX Bitwise OR
+
+POR mmxreg,r/m64 ; 0F EB /r [PENT,MMX]
+
+|POR| performs a bitwise OR operation between its two operands (i.e.
+each bit of the result is 1 if and only if at least one of the
+corresponding bits of the two inputs was 1), and stores the result in
+the destination (first) operand.
+
+
+ A.130 |PSLLx|, |PSRLx|, |PSRAx|: MMX Bit Shifts
+
+PSLLW mmxreg,r/m64 ; 0F F1 /r [PENT,MMX]
+PSLLW mmxreg,imm8 ; 0F 71 /6 ib [PENT,MMX]
+
+PSLLD mmxreg,r/m64 ; 0F F2 /r [PENT,MMX]
+PSLLD mmxreg,imm8 ; 0F 72 /6 ib [PENT,MMX]
+
+PSLLQ mmxreg,r/m64 ; 0F F3 /r [PENT,MMX]
+PSLLQ mmxreg,imm8 ; 0F 73 /6 ib [PENT,MMX]
+
+PSRAW mmxreg,r/m64 ; 0F E1 /r [PENT,MMX]
+PSRAW mmxreg,imm8 ; 0F 71 /4 ib [PENT,MMX]
+
+PSRAD mmxreg,r/m64 ; 0F E2 /r [PENT,MMX]
+PSRAD mmxreg,imm8 ; 0F 72 /4 ib [PENT,MMX]
+
+PSRLW mmxreg,r/m64 ; 0F D1 /r [PENT,MMX]
+PSRLW mmxreg,imm8 ; 0F 71 /2 ib [PENT,MMX]
+
+PSRLD mmxreg,r/m64 ; 0F D2 /r [PENT,MMX]
+PSRLD mmxreg,imm8 ; 0F 72 /2 ib [PENT,MMX]
+
+PSRLQ mmxreg,r/m64 ; 0F D3 /r [PENT,MMX]
+PSRLQ mmxreg,imm8 ; 0F 73 /2 ib [PENT,MMX]
+
+|PSxxQ| perform simple bit shifts on the 64-bit MMX registers: the
+destination (first) operand is shifted left or right by the number of
+bits given in the source (second) operand, and the vacated bits are
+filled in with zeros (for a logical shift) or copies of the original
+sign bit (for an arithmetic right shift).
+
+|PSxxW| and |PSxxD| perform packed bit shifts: the destination operand
+is treated as a vector of four words or two doublewords, and each
+element is shifted individually, so bits shifted out of one element do
+not interfere with empty bits coming into the next.
+
+|PSLLx| and |PSRLx| perform logical shifts: the vacated bits at one end
+of the shifted number are filled with zeros. |PSRAx| performs an
+arithmetic right shift: the vacated bits at the top of the shifted
+number are filled with copies of the original top (sign) bit.
+
+
+ A.131 |PSUBxx|: MMX Packed Subtraction
+
+PSUBB mmxreg,r/m64 ; 0F F8 /r [PENT,MMX]
+PSUBW mmxreg,r/m64 ; 0F F9 /r [PENT,MMX]
+PSUBD mmxreg,r/m64 ; 0F FA /r [PENT,MMX]
+
+PSUBSB mmxreg,r/m64 ; 0F E8 /r [PENT,MMX]
+PSUBSW mmxreg,r/m64 ; 0F E9 /r [PENT,MMX]
+
+PSUBUSB mmxreg,r/m64 ; 0F D8 /r [PENT,MMX]
+PSUBUSW mmxreg,r/m64 ; 0F D9 /r [PENT,MMX]
+
+|PSUBxx| all perform packed subtraction between their two 64-bit
+operands, storing the result in the destination (first) operand. The
+|PSUBxB| forms treat the 64-bit operands as vectors of eight bytes, and
+subtract each byte individually; |PSUBxW| treat the operands as vectors
+of four words; and |PSUBD| treats its operands as vectors of two
+doublewords.
+
+In all cases, the elements of the operand on the right are subtracted
+from the corresponding elements of the operand on the left, not the
+other way round.
+
+|PSUBSB| and |PSUBSW| perform signed saturation on the sum of each pair
+of bytes or words: if the result of a subtraction is too large or too
+small to fit into a signed byte or word result, it is clipped
+(saturated) to the largest or smallest value which /will/ fit. |PSUBUSB|
+and |PSUBUSW| similarly perform unsigned saturation, clipping to |0FFh|
+or |0FFFFh| if the result is larger than that.
+
+
+ A.132 |PSUBSIW|: MMX Packed Subtract with Saturation to Implied
+ Destination
+
+PSUBSIW mmxreg,r/m64 ; 0F 55 /r [CYRIX,MMX]
+
+|PSUBSIW|, specific to the Cyrix extensions to the MMX instruction set,
+performs the same function as |PSUBSW|, except that the result is not
+placed in the register specified by the first operand, but instead in
+the implied destination register, specified as for |PADDSIW| (section
+A.115 <#section-A.115>).
+
+
+ A.133 |PUNPCKxxx|: Unpack Data
+
+PUNPCKHBW mmxreg,r/m64 ; 0F 68 /r [PENT,MMX]
+PUNPCKHWD mmxreg,r/m64 ; 0F 69 /r [PENT,MMX]
+PUNPCKHDQ mmxreg,r/m64 ; 0F 6A /r [PENT,MMX]
+
+PUNPCKLBW mmxreg,r/m64 ; 0F 60 /r [PENT,MMX]
+PUNPCKLWD mmxreg,r/m64 ; 0F 61 /r [PENT,MMX]
+PUNPCKLDQ mmxreg,r/m64 ; 0F 62 /r [PENT,MMX]
+
+|PUNPCKxx| all treat their operands as vectors, and produce a new vector
+generated by interleaving elements from the two inputs. The |PUNPCKHxx|
+instructions start by throwing away the bottom half of each input
+operand, and the |PUNPCKLxx| instructions throw away the top half.
+
+The remaining elements, totalling 64 bits, are then interleaved into the
+destination, alternating elements from the second (source) operand and
+the first (destination) operand: so the leftmost element in the result
+always comes from the second operand, and the rightmost from the
+destination.
+
+|PUNPCKxBW| works a byte at a time, |PUNPCKxWD| a word at a time, and
+|PUNPCKxDQ| a doubleword at a time.
+
+So, for example, if the first operand held |0x7A6A5A4A3A2A1A0A| and the
+second held |0x7B6B5B4B3B2B1B0B|, then:
+
+ * |PUNPCKHBW| would return |0x7B7A6B6A5B5A4B4A|.
+ * |PUNPCKHWD| would return |0x7B6B7A6A5B4B5A4A|.
+ * |PUNPCKHDQ| would return |0x7B6B5B4B7A6A5A4A|.
+ * |PUNPCKLBW| would return |0x3B3A2B2A1B1A0B0A|.
+ * |PUNPCKLWD| would return |0x3B2B3A2A1B0B1A0A|.
+ * |PUNPCKLDQ| would return |0x3B2B1B0B3A2A1A0A|.
+
+
+ A.134 |PUSH|: Push Data on Stack
+
+PUSH reg16 ; o16 50+r [8086]
+PUSH reg32 ; o32 50+r [386]
+
+PUSH r/m16 ; o16 FF /6 [8086]
+PUSH r/m32 ; o32 FF /6 [386]
+
+PUSH CS ; 0E [8086]
+PUSH DS ; 1E [8086]
+PUSH ES ; 06 [8086]
+PUSH SS ; 16 [8086]
+PUSH FS ; 0F A0 [386]
+PUSH GS ; 0F A8 [386]
+
+PUSH imm8 ; 6A ib [286]
+PUSH imm16 ; o16 68 iw [286]
+PUSH imm32 ; o32 68 id [386]
+
+|PUSH| decrements the stack pointer (|SP| or |ESP|) by 2 or 4, and then
+stores the given value at |[SS:SP]| or |[SS:ESP]|.
+
+The address-size attribute of the instruction determines whether |SP| or
+|ESP| is used as the stack pointer: to deliberately override the default
+given by the |BITS| setting, you can use an |a16| or |a32| prefix.
+
+The operand-size attribute of the instruction determines whether the
+stack pointer is decremented by 2 or 4: this means that segment register
+pushes in |BITS 32| mode will push 4 bytes on the stack, of which the
+upper two are undefined. If you need to override that, you can use an
+|o16| or |o32| prefix.
+
+The above opcode listings give two forms for general-purpose register
+push instructions: for example, |PUSH BX| has the two forms |53| and |FF
+F3|. NASM will always generate the shorter form when given |PUSH BX|.
+NDISASM will disassemble both.
+
+Unlike the undocumented and barely supported |POP CS|, |PUSH CS| is a
+perfectly valid and sensible instruction, supported on all processors.
+
+The instruction |PUSH SP| may be used to distinguish an 8086 from later
+processors: on an 8086, the value of |SP| stored is the value it has
+/after/ the push instruction, whereas on later processors it is the
+value /before/ the push instruction.
+
+
+ A.135 |PUSHAx|: Push All General-Purpose Registers
+
+PUSHA ; 60 [186]
+PUSHAD ; o32 60 [386]
+PUSHAW ; o16 60 [186]
+
+|PUSHAW| pushes, in succession, |AX|, |CX|, |DX|, |BX|, |SP|, |BP|, |SI|
+and |DI| on the stack, decrementing the stack pointer by a total of 16.
+
+|PUSHAD| pushes, in succession, |EAX|, |ECX|, |EDX|, |EBX|, |ESP|,
+|EBP|, |ESI| and |EDI| on the stack, decrementing the stack pointer by a
+total of 32.
+
+In both cases, the value of |SP| or |ESP| pushed is its /original/
+value, as it had before the instruction was executed.
+
+|PUSHA| is an alias mnemonic for either |PUSHAW| or |PUSHAD|, depending
+on the current |BITS| setting.
+
+Note that the registers are pushed in order of their numeric values in
+opcodes (see section A.2.1 <#section-A.2.1>).
+
+See also |POPA| (section A.127 <#section-A.127>).
+
+
+ A.136 |PUSHFx|: Push Flags Register
+
+PUSHF ; 9C [186]
+PUSHFD ; o32 9C [386]
+PUSHFW ; o16 9C [186]
+
+|PUSHFW| pops a word from the stack and stores it in the bottom 16 bits
+of the flags register (or the whole flags register, on processors below
+a 386). |PUSHFD| pops a doubleword and stores it in the entire flags
+register.
+
+|PUSHF| is an alias mnemonic for either |PUSHFW| or |PUSHFD|, depending
+on the current |BITS| setting.
+
+See also |POPF| (section A.128 <#section-A.128>).
+
+
+ A.137 |PXOR|: MMX Bitwise XOR
+
+PXOR mmxreg,r/m64 ; 0F EF /r [PENT,MMX]
+
+|PXOR| performs a bitwise XOR operation between its two operands (i.e.
+each bit of the result is 1 if and only if exactly one of the
+corresponding bits of the two inputs was 1), and stores the result in
+the destination (first) operand.
+
+
+ A.138 |RCL|, |RCR|: Bitwise Rotate through Carry Bit
+
+RCL r/m8,1 ; D0 /2 [8086]
+RCL r/m8,CL ; D2 /2 [8086]
+RCL r/m8,imm8 ; C0 /2 ib [286]
+RCL r/m16,1 ; o16 D1 /2 [8086]
+RCL r/m16,CL ; o16 D3 /2 [8086]
+RCL r/m16,imm8 ; o16 C1 /2 ib [286]
+RCL r/m32,1 ; o32 D1 /2 [386]
+RCL r/m32,CL ; o32 D3 /2 [386]
+RCL r/m32,imm8 ; o32 C1 /2 ib [386]
+
+RCR r/m8,1 ; D0 /3 [8086]
+RCR r/m8,CL ; D2 /3 [8086]
+RCR r/m8,imm8 ; C0 /3 ib [286]
+RCR r/m16,1 ; o16 D1 /3 [8086]
+RCR r/m16,CL ; o16 D3 /3 [8086]
+RCR r/m16,imm8 ; o16 C1 /3 ib [286]
+RCR r/m32,1 ; o32 D1 /3 [386]
+RCR r/m32,CL ; o32 D3 /3 [386]
+RCR r/m32,imm8 ; o32 C1 /3 ib [386]
+
+|RCL| and |RCR| perform a 9-bit, 17-bit or 33-bit bitwise rotation
+operation, involving the given source/destination (first) operand and
+the carry bit. Thus, for example, in the operation |RCR AL,1|, a 9-bit
+rotation is performed in which |AL| is shifted left by 1, the top bit of
+|AL| moves into the carry flag, and the original value of the carry flag
+is placed in the low bit of |AL|.
+
+The number of bits to rotate by is given by the second operand. Only the
+bottom five bits of the rotation count are considered by processors
+above the 8086.
+
+You can force the longer (286 and upwards, beginning with a |C1| byte)
+form of |RCL foo,1| by using a |BYTE| prefix: |RCL foo,BYTE 1|.
+Similarly with |RCR|.
+
+
+ A.139 |RDMSR|: Read Model-Specific Registers
+
+RDMSR ; 0F 32 [PENT]
+
+|RDMSR| reads the processor Model-Specific Register (MSR) whose index is
+stored in |ECX|, and stores the result in |EDX:EAX|. See also |WRMSR|
+(section A.165 <#section-A.165>).
+
+
+ A.140 |RDPMC|: Read Performance-Monitoring Counters
+
+RDPMC ; 0F 33 [P6]
+
+|RDPMC| reads the processor performance-monitoring counter whose index
+is stored in |ECX|, and stores the result in |EDX:EAX|.
+
+
+ A.141 |RDTSC|: Read Time-Stamp Counter
+
+RDTSC ; 0F 31 [PENT]
+
+|RDTSC| reads the processor's time-stamp counter into |EDX:EAX|.
+
+
+ A.142 |RET|, |RETF|, |RETN|: Return from Procedure Call
+
+RET ; C3 [8086]
+RET imm16 ; C2 iw [8086]
+
+RETF ; CB [8086]
+RETF imm16 ; CA iw [8086]
+
+RETN ; C3 [8086]
+RETN imm16 ; C2 iw [8086]
+
+|RET|, and its exact synonym |RETN|, pop |IP| or |EIP| from the stack
+and transfer control to the new address. Optionally, if a numeric second
+operand is provided, they increment the stack pointer by a further
+|imm16| bytes after popping the return address.
+
+|RETF| executes a far return: after popping |IP|/|EIP|, it then pops
+|CS|, and /then/ increments the stack pointer by the optional argument
+if present.
+
+
+ A.143 |ROL|, |ROR|: Bitwise Rotate
+
+ROL r/m8,1 ; D0 /0 [8086]
+ROL r/m8,CL ; D2 /0 [8086]
+ROL r/m8,imm8 ; C0 /0 ib [286]
+ROL r/m16,1 ; o16 D1 /0 [8086]
+ROL r/m16,CL ; o16 D3 /0 [8086]
+ROL r/m16,imm8 ; o16 C1 /0 ib [286]
+ROL r/m32,1 ; o32 D1 /0 [386]
+ROL r/m32,CL ; o32 D3 /0 [386]
+ROL r/m32,imm8 ; o32 C1 /0 ib [386]
+
+ROR r/m8,1 ; D0 /1 [8086]
+ROR r/m8,CL ; D2 /1 [8086]
+ROR r/m8,imm8 ; C0 /1 ib [286]
+ROR r/m16,1 ; o16 D1 /1 [8086]
+ROR r/m16,CL ; o16 D3 /1 [8086]
+ROR r/m16,imm8 ; o16 C1 /1 ib [286]
+ROR r/m32,1 ; o32 D1 /1 [386]
+ROR r/m32,CL ; o32 D3 /1 [386]
+ROR r/m32,imm8 ; o32 C1 /1 ib [386]
+
+|ROL| and |ROR| perform a bitwise rotation operation on the given
+source/destination (first) operand. Thus, for example, in the operation
+|ROR AL,1|, an 8-bit rotation is performed in which |AL| is shifted left
+by 1 and the original top bit of |AL| moves round into the low bit.
+
+The number of bits to rotate by is given by the second operand. Only the
+bottom 3, 4 or 5 bits (depending on the source operand size) of the
+rotation count are considered by processors above the 8086.
+
+You can force the longer (286 and upwards, beginning with a |C1| byte)
+form of |ROL foo,1| by using a |BYTE| prefix: |ROL foo,BYTE 1|.
+Similarly with |ROR|.
+
+
+ A.144 |RSM|: Resume from System-Management Mode
+
+RSM ; 0F AA [PENT]
+
+|RSM| returns the processor to its normal operating mode when it was in
+System-Management Mode.
+
+
+ A.145 |SAHF|: Store AH to Flags
+
+SAHF ; 9E [8086]
+
+|SAHF| sets the low byte of the flags word according to the contents of
+the |AH| register. See also |LAHF| (section A.90 <#section-A.90>).
+
+
+ A.146 |SAL|, |SAR|: Bitwise Arithmetic Shifts
+
+SAL r/m8,1 ; D0 /4 [8086]
+SAL r/m8,CL ; D2 /4 [8086]
+SAL r/m8,imm8 ; C0 /4 ib [286]
+SAL r/m16,1 ; o16 D1 /4 [8086]
+SAL r/m16,CL ; o16 D3 /4 [8086]
+SAL r/m16,imm8 ; o16 C1 /4 ib [286]
+SAL r/m32,1 ; o32 D1 /4 [386]
+SAL r/m32,CL ; o32 D3 /4 [386]
+SAL r/m32,imm8 ; o32 C1 /4 ib [386]
+
+SAR r/m8,1 ; D0 /0 [8086]
+SAR r/m8,CL ; D2 /0 [8086]
+SAR r/m8,imm8 ; C0 /0 ib [286]
+xxSAR r/m16,1 ; o16 D1 /0 [8086]
+SAR r/m16,CL ; o16 D3 /0 [8086]
+SAR r/m16,imm8 ; o16 C1 /0 ib [286]
+xxSAR r/m32,1 ; o32 D1 /0 [386]
+SAR r/m32,CL ; o32 D3 /0 [386]
+SAR r/m32,imm8 ; o32 C1 /0 ib [386]
+
+|SAL| and |SAR| perform an arithmetic shift operation on the given
+source/destination (first) operand. The vacated bits are filled with
+zero for |SAL|, and with copies of the original high bit of the source
+operand for |SAR|.
+
+|SAL| is a synonym for |SHL| (see section A.152 <#section-A.152>). NASM
+will assemble either one to the same code, but NDISASM will always
+disassemble that code as |SHL|.
+
+The number of bits to shift by is given by the second operand. Only the
+bottom 3, 4 or 5 bits (depending on the source operand size) of the
+shift count are considered by processors above the 8086.
+
+You can force the longer (286 and upwards, beginning with a |C1| byte)
+form of |SAL foo,1| by using a |BYTE| prefix: |SAL foo,BYTE 1|.
+Similarly with |SAR|.
+
+
+ A.147 |SALC|: Set AL from Carry Flag
+
+SALC ; D6 [8086,UNDOC]
+
+|SALC| is an early undocumented instruction similar in concept to
+|SETcc| (section A.150 <#section-A.150>). Its function is to set |AL| to
+zero if the carry flag is clear, or to |0xFF| if it is set.
+
+
+ A.148 |SBB|: Subtract with Borrow
+
+SBB r/m8,reg8 ; 18 /r [8086]
+SBB r/m16,reg16 ; o16 19 /r [8086]
+SBB r/m32,reg32 ; o32 19 /r [386]
+
+SBB reg8,r/m8 ; 1A /r [8086]
+SBB reg16,r/m16 ; o16 1B /r [8086]
+SBB reg32,r/m32 ; o32 1B /r [386]
+
+SBB r/m8,imm8 ; 80 /3 ib [8086]
+SBB r/m16,imm16 ; o16 81 /3 iw [8086]
+SBB r/m32,imm32 ; o32 81 /3 id [386]
+
+SBB r/m16,imm8 ; o16 83 /3 ib [8086]
+SBB r/m32,imm8 ; o32 83 /3 ib [8086]
+
+SBB AL,imm8 ; 1C ib [8086]
+SBB AX,imm16 ; o16 1D iw [8086]
+SBB EAX,imm32 ; o32 1D id [386]
+
+|SBB| performs integer subtraction: it subtracts its second operand,
+plus the value of the carry flag, from its first, and leaves the result
+in its destination (first) operand. The flags are set according to the
+result of the operation: in particular, the carry flag is affected and
+can be used by a subsequent |SBB| instruction.
+
+In the forms with an 8-bit immediate second operand and a longer first
+operand, the second operand is considered to be signed, and is
+sign-extended to the length of the first operand. In these cases, the
+|BYTE| qualifier is necessary to force NASM to generate this form of the
+instruction.
+
+To subtract one number from another without also subtracting the
+contents of the carry flag, use |SUB| (section A.159 <#section-A.159>).
+
+
+ A.149 |SCASB|, |SCASW|, |SCASD|: Scan String
+
+SCASB ; AE [8086]
+SCASW ; o16 AF [8086]
+SCASD ; o32 AF [386]
+
+|SCASB| compares the byte in |AL| with the byte at |[ES:DI]| or
+|[ES:EDI]|, and sets the flags accordingly. It then increments or
+decrements (depending on the direction flag: increments if the flag is
+clear, decrements if it is set) |DI| (or |EDI|).
+
+The register used is |DI| if the address size is 16 bits, and |EDI| if
+it is 32 bits. If you need to use an address size not equal to the
+current |BITS| setting, you can use an explicit |a16| or |a32| prefix.
+
+Segment override prefixes have no effect for this instruction: the use
+of |ES| for the load from |[DI]| or |[EDI]| cannot be overridden.
+
+|SCASW| and |SCASD| work in the same way, but they compare a word to
+|AX| or a doubleword to |EAX| instead of a byte to |AL|, and increment
+or decrement the addressing registers by 2 or 4 instead of 1.
+
+The |REPE| and |REPNE| prefixes (equivalently, |REPZ| and |REPNZ|) may
+be used to repeat the instruction up to |CX| (or |ECX| - again, the
+address size chooses which) times until the first unequal or equal byte
+is found.
+
+
+ A.150 |SETcc|: Set Register from Condition
+
+SETcc r/m8 ; 0F 90+cc /2 [386]
+
+|SETcc| sets the given 8-bit operand to zero if its condition is not
+satisfied, and to 1 if it is.
+
+
+ A.151 |SGDT|, |SIDT|, |SLDT|: Store Descriptor Table Pointers
+
+SGDT mem ; 0F 01 /0 [286,PRIV]
+SIDT mem ; 0F 01 /1 [286,PRIV]
+SLDT r/m16 ; 0F 00 /0 [286,PRIV]
+
+|SGDT| and |SIDT| both take a 6-byte memory area as an operand: they
+store the contents of the GDTR (global descriptor table register) or
+IDTR (interrupt descriptor table register) into that area as a 32-bit
+linear address and a 16-bit size limit from that area (in that order).
+These are the only instructions which directly use /linear/ addresses,
+rather than segment/offset pairs.
+
+|SLDT| stores the segment selector corresponding to the LDT (local
+descriptor table) into the given operand.
+
+See also |LGDT|, |LIDT| and |LLDT| (section A.95 <#section-A.95>).
+
+
+ A.152 |SHL|, |SHR|: Bitwise Logical Shifts
+
+SHL r/m8,1 ; D0 /4 [8086]
+SHL r/m8,CL ; D2 /4 [8086]
+SHL r/m8,imm8 ; C0 /4 ib [286]
+SHL r/m16,1 ; o16 D1 /4 [8086]
+SHL r/m16,CL ; o16 D3 /4 [8086]
+SHL r/m16,imm8 ; o16 C1 /4 ib [286]
+SHL r/m32,1 ; o32 D1 /4 [386]
+SHL r/m32,CL ; o32 D3 /4 [386]
+SHL r/m32,imm8 ; o32 C1 /4 ib [386]
+
+SHR r/m8,1 ; D0 /5 [8086]
+SHR r/m8,CL ; D2 /5 [8086]
+SHR r/m8,imm8 ; C0 /5 ib [286]
+SHR r/m16,1 ; o16 D1 /5 [8086]
+SHR r/m16,CL ; o16 D3 /5 [8086]
+SHR r/m16,imm8 ; o16 C1 /5 ib [286]
+SHR r/m32,1 ; o32 D1 /5 [386]
+SHR r/m32,CL ; o32 D3 /5 [386]
+SHR r/m32,imm8 ; o32 C1 /5 ib [386]
+
+|SHL| and |SHR| perform a logical shift operation on the given
+source/destination (first) operand. The vacated bits are filled with zero.
+
+A synonym for |SHL| is |SAL| (see section A.146 <#section-A.146>). NASM
+will assemble either one to the same code, but NDISASM will always
+disassemble that code as |SHL|.
+
+The number of bits to shift by is given by the second operand. Only the
+bottom 3, 4 or 5 bits (depending on the source operand size) of the
+shift count are considered by processors above the 8086.
+
+You can force the longer (286 and upwards, beginning with a |C1| byte)
+form of |SHL foo,1| by using a |BYTE| prefix: |SHL foo,BYTE 1|.
+Similarly with |SHR|.
+
+
+ A.153 |SHLD|, |SHRD|: Bitwise Double-Precision Shifts
+
+SHLD r/m16,reg16,imm8 ; o16 0F A4 /r ib [386]
+SHLD r/m16,reg32,imm8 ; o32 0F A4 /r ib [386]
+SHLD r/m16,reg16,CL ; o16 0F A5 /r [386]
+SHLD r/m16,reg32,CL ; o32 0F A5 /r [386]
+
+SHRD r/m16,reg16,imm8 ; o16 0F AC /r ib [386]
+SHRD r/m32,reg32,imm8 ; o32 0F AC /r ib [386]
+SHRD r/m16,reg16,CL ; o16 0F AD /r [386]
+SHRD r/m32,reg32,CL ; o32 0F AD /r [386]
+
+|SHLD| performs a double-precision left shift. It notionally places its
+second operand to the right of its first, then shifts the entire bit
+string thus generated to the left by a number of bits specified in the
+third operand. It then updates only the /first/ operand according to the
+result of this. The second operand is not modified.
+
+|SHRD| performs the corresponding right shift: it notionally places the
+second operand to the /left/ of the first, shifts the whole bit string
+right, and updates only the first operand.
+
+For example, if |EAX| holds |0x01234567| and |EBX| holds |0x89ABCDEF|,
+then the instruction |SHLD EAX,EBX,4| would update |EAX| to hold
+|0x12345678|. Under the same conditions, |SHRD EAX,EBX,4| would update
+|EAX| to hold |0xF0123456|.
+
+The number of bits to shift by is given by the third operand. Only the
+bottom 5 bits of the shift count are considered.
+
+
+ A.154 |SMI|: System Management Interrupt
+
+SMI ; F1 [386,UNDOC]
+
+This is an opcode apparently supported by some AMD processors (which is
+why it can generate the same opcode as |INT1|), and places the machine
+into system-management mode, a special debugging mode.
+
+
+ A.155 |SMSW|: Store Machine Status Word
+
+SMSW r/m16 ; 0F 01 /4 [286,PRIV]
+
+|SMSW| stores the bottom half of the |CR0| control register (or the
+Machine Status Word, on 286 processors) into the destination operand.
+See also |LMSW| (section A.96 <#section-A.96>).
+
+
+ A.156 |STC|, |STD|, |STI|: Set Flags
+
+STC ; F9 [8086]
+STD ; FD [8086]
+STI ; FB [8086]
+
+These instructions set various flags. |STC| sets the carry flag; |STD|
+sets the direction flag; and |STI| sets the interrupt flag (thus
+enabling interrupts).
+
+To clear the carry, direction, or interrupt flags, use the |CLC|, |CLD|
+and |CLI| instructions (section A.15 <#section-A.15>). To invert the
+carry flag, use |CMC| (section A.16 <#section-A.16>).
+
+
+ A.157 |STOSB|, |STOSW|, |STOSD|: Store Byte to String
+
+STOSB ; AA [8086]
+STOSW ; o16 AB [8086]
+STOSD ; o32 AB [386]
+
+|STOSB| stores the byte in |AL| at |[ES:DI]| or |[ES:EDI]|, and sets the
+flags accordingly. It then increments or decrements (depending on the
+direction flag: increments if the flag is clear, decrements if it is
+set) |DI| (or |EDI|).
+
+The register used is |DI| if the address size is 16 bits, and |EDI| if
+it is 32 bits. If you need to use an address size not equal to the
+current |BITS| setting, you can use an explicit |a16| or |a32| prefix.
+
+Segment override prefixes have no effect for this instruction: the use
+of |ES| for the store to |[DI]| or |[EDI]| cannot be overridden.
+
+|STOSW| and |STOSD| work in the same way, but they store the word in
+|AX| or the doubleword in |EAX| instead of the byte in |AL|, and
+increment or decrement the addressing registers by 2 or 4 instead of 1.
+
+The |REP| prefix may be used to repeat the instruction |CX| (or |ECX| -
+again, the address size chooses which) times.
+
+
+ A.158 |STR|: Store Task Register
+
+STR r/m16 ; 0F 00 /1 [286,PRIV]
+
+|STR| stores the segment selector corresponding to the contents of the
+Task Register into its operand.
+
+
+ A.159 |SUB|: Subtract Integers
+
+SUB r/m8,reg8 ; 28 /r [8086]
+SUB r/m16,reg16 ; o16 29 /r [8086]
+SUB r/m32,reg32 ; o32 29 /r [386]
+
+SUB reg8,r/m8 ; 2A /r [8086]
+SUB reg16,r/m16 ; o16 2B /r [8086]
+SUB reg32,r/m32 ; o32 2B /r [386]
+
+SUB r/m8,imm8 ; 80 /5 ib [8086]
+SUB r/m16,imm16 ; o16 81 /5 iw [8086]
+SUB r/m32,imm32 ; o32 81 /5 id [386]
+
+SUB r/m16,imm8 ; o16 83 /5 ib [8086]
+SUB r/m32,imm8 ; o32 83 /5 ib [386]
+
+SUB AL,imm8 ; 2C ib [8086]
+SUB AX,imm16 ; o16 2D iw [8086]
+SUB EAX,imm32 ; o32 2D id [386]
+
+|SUB| performs integer subtraction: it subtracts its second operand from
+its first, and leaves the result in its destination (first) operand. The
+flags are set according to the result of the operation: in particular,
+the carry flag is affected and can be used by a subsequent |SBB|
+instruction (section A.148 <#section-A.148>).
+
+In the forms with an 8-bit immediate second operand and a longer first
+operand, the second operand is considered to be signed, and is
+sign-extended to the length of the first operand. In these cases, the
+|BYTE| qualifier is necessary to force NASM to generate this form of the
+instruction.
+
+
+ A.160 |TEST|: Test Bits (notional bitwise AND)
+
+TEST r/m8,reg8 ; 84 /r [8086]
+TEST r/m16,reg16 ; o16 85 /r [8086]
+TEST r/m32,reg32 ; o32 85 /r [386]
+
+TEST r/m8,imm8 ; F6 /7 ib [8086]
+TEST r/m16,imm16 ; o16 F7 /7 iw [8086]
+TEST r/m32,imm32 ; o32 F7 /7 id [386]
+
+TEST AL,imm8 ; A8 ib [8086]
+TEST AX,imm16 ; o16 A9 iw [8086]
+TEST EAX,imm32 ; o32 A9 id [386]
+
+|TEST| performs a `mental' bitwise AND of its two operands, and affects
+the flags as if the operation had taken place, but does not store the
+result of the operation anywhere.
+
+
+ A.161 |UMOV|: User Move Data
+
+UMOV r/m8,reg8 ; 0F 10 /r [386,UNDOC]
+UMOV r/m16,reg16 ; o16 0F 11 /r [386,UNDOC]
+UMOV r/m32,reg32 ; o32 0F 11 /r [386,UNDOC]
+
+UMOV reg8,r/m8 ; 0F 12 /r [386,UNDOC]
+UMOV reg16,r/m16 ; o16 0F 13 /r [386,UNDOC]
+UMOV reg32,r/m32 ; o32 0F 13 /r [386,UNDOC]
+
+This undocumented instruction is used by in-circuit emulators to access
+user memory (as opposed to host memory). It is used just like an
+ordinary memory/register or register/register |MOV| instruction, but
+accesses user space.
+
+
+ A.162 |VERR|, |VERW|: Verify Segment Readability/Writability
+
+VERR r/m16 ; 0F 00 /4 [286,PRIV]
+
+VERW r/m16 ; 0F 00 /5 [286,PRIV]
+
+|VERR| sets the zero flag if the segment specified by the selector in
+its operand can be read from at the current privilege level. |VERW| sets
+the zero flag if the segment can be written.
+
+
+ A.163 |WAIT|: Wait for Floating-Point Processor
+
+WAIT ; 9B [8086]
+
+|WAIT|, on 8086 systems with a separate 8087 FPU, waits for the FPU to
+have finished any operation it is engaged in before continuing main
+processor operations, so that (for example) an FPU store to main memory
+can be guaranteed to have completed before the CPU tries to read the
+result back out.
+
+On higher processors, |WAIT| is unnecessary for this purpose, and it has
+the alternative purpose of ensuring that any pending unmasked FPU
+exceptions have happened before execution continues.
+
+
+ A.164 |WBINVD|: Write Back and Invalidate Cache
+
+WBINVD ; 0F 09 [486]
+
+|WBINVD| invalidates and empties the processor's internal caches, and
+causes the processor to instruct external caches to do the same. It
+writes the contents of the caches back to memory first, so no data is
+lost. To flush the caches quickly without bothering to write the data
+back first, use |INVD| (section A.84 <#section-A.84>).
+
+
+ A.165 |WRMSR|: Write Model-Specific Registers
+
+WRMSR ; 0F 30 [PENT]
+
+|WRMSR| writes the value in |EDX:EAX| to the processor Model-Specific
+Register (MSR) whose index is stored in |ECX|. See also |RDMSR| (section
+A.139 <#section-A.139>).
+
+
+ A.166 |XADD|: Exchange and Add
+
+XADD r/m8,reg8 ; 0F C0 /r [486]
+XADD r/m16,reg16 ; o16 0F C1 /r [486]
+XADD r/m32,reg32 ; o32 0F C1 /r [486]
+
+|XADD| exchanges the values in its two operands, and then adds them
+together and writes the result into the destination (first) operand.
+This instruction can be used with a |LOCK| prefix for multi-processor
+synchronisation purposes.
+
+
+ A.167 |XBTS|: Extract Bit String
+
+XBTS reg16,r/m16 ; o16 0F A6 /r [386,UNDOC]
+XBTS reg32,r/m32 ; o32 0F A6 /r [386,UNDOC]
+
+No clear documentation seems to be available for this instruction: the
+best I've been able to find reads `Takes a string of bits from the first
+operand and puts them in the second operand'. It is present only in
+early 386 processors, and conflicts with the opcodes for |CMPXCHG486|.
+NASM supports it only for completeness. Its counterpart is |IBTS| (see
+section A.75 <#section-A.75>).
+
+
+ A.168 |XCHG|: Exchange
+
+XCHG reg8,r/m8 ; 86 /r [8086]
+XCHG reg16,r/m8 ; o16 87 /r [8086]
+XCHG reg32,r/m32 ; o32 87 /r [386]
+
+XCHG r/m8,reg8 ; 86 /r [8086]
+XCHG r/m16,reg16 ; o16 87 /r [8086]
+XCHG r/m32,reg32 ; o32 87 /r [386]
+
+XCHG AX,reg16 ; o16 90+r [8086]
+XCHG EAX,reg32 ; o32 90+r [386]
+XCHG reg16,AX ; o16 90+r [8086]
+XCHG reg32,EAX ; o32 90+r [386]
+
+|XCHG| exchanges the values in its two operands. It can be used with a
+|LOCK| prefix for purposes of multi-processor synchronisation.
+
+|XCHG AX,AX| or |XCHG EAX,EAX| (depending on the |BITS| setting)
+generates the opcode |90h|, and so is a synonym for |NOP| (section A.109
+<#section-A.109>).
+
+
+ A.169 |XLATB|: Translate Byte in Lookup Table
+
+XLATB ; D7 [8086]
+
+|XLATB| adds the value in |AL|, treated as an unsigned byte, to |BX| or
+|EBX|, and loads the byte from the resulting address (in the segment
+specified by |DS|) back into |AL|.
+
+The base register used is |BX| if the address size is 16 bits, and |EBX|
+if it is 32 bits. If you need to use an address size not equal to the
+current |BITS| setting, you can use an explicit |a16| or |a32| prefix.
+
+The segment register used to load from |[BX+AL]| or |[EBX+AL]| can be
+overridden by using a segment register name as a prefix (for example,
+|es xlatb|).
+
+
+ A.170 |XOR|: Bitwise Exclusive OR
+
+XOR r/m8,reg8 ; 30 /r [8086]
+XOR r/m16,reg16 ; o16 31 /r [8086]
+XOR r/m32,reg32 ; o32 31 /r [386]
+
+XOR reg8,r/m8 ; 32 /r [8086]
+XOR reg16,r/m16 ; o16 33 /r [8086]
+XOR reg32,r/m32 ; o32 33 /r [386]
+
+XOR r/m8,imm8 ; 80 /6 ib [8086]
+XOR r/m16,imm16 ; o16 81 /6 iw [8086]
+XOR r/m32,imm32 ; o32 81 /6 id [386]
+
+XOR r/m16,imm8 ; o16 83 /6 ib [8086]
+XOR r/m32,imm8 ; o32 83 /6 ib [386]
+
+XOR AL,imm8 ; 34 ib [8086]
+XOR AX,imm16 ; o16 35 iw [8086]
+XOR EAX,imm32 ; o32 35 id [386]
+
+|XOR| performs a bitwise XOR operation between its two operands (i.e.
+each bit of the result is 1 if and only if exactly one of the
+corresponding bits of the two inputs was 1), and stores the result in
+the destination (first) operand.
+
+In the forms with an 8-bit immediate second operand and a longer first
+operand, the second operand is considered to be signed, and is
+sign-extended to the length of the first operand. In these cases, the
+|BYTE| qualifier is necessary to force NASM to generate this form of the
+instruction.
+
+The MMX instruction |PXOR| (see section A.137 <#section-A.137>) performs
+the same operation on the 64-bit MMX registers.
+
+Previous Chapter <nasmdo10.html> | Contents <nasmdoc0.html> | Index
+<nasmdoci.html>
+
+vim:tw=78:noet:wrap:ts=8:ft=help:norl:
diff --git a/examples/slow_json.rb b/examples/slow_json.rb
index 13d0c46..8e36684 100644
--- a/examples/slow_json.rb
+++ b/examples/slow_json.rb
@@ -40,7 +40,7 @@ class SlowJSON
end
def generate_parser
- string = '"'.r >> chars_parser.star.map(&:join) << '"'
+ string = '"'.r >> chars_parser.star.map{|cs, _| cs.join } << '"'
# -? int frac? exp?
number = prim(:double, allowed_sign: '-')
@value = string | number | lazy{@object} | lazy{@array} |
diff --git a/legacy/shunting_yard.rb b/legacy/shunting_yard.rb
new file mode 100644
index 0000000..afbd810
--- /dev/null
+++ b/legacy/shunting_yard.rb
@@ -0,0 +1,125 @@
+ # infix operator table
+ class ShuntingYard
+ include ::Rsec
+
+ # unify operator table
+ def unify opt, is_left
+ (opt || {}).inject({}) do |h, (k, v)|
+ k = Rsec.make_parser k
+ h[k] = [v.to_i, is_left]
+ h
+ end
+ end
+
+ def initialize term, opts
+ @term = term
+ @ops = unify(opts[:right], false)
+ @ops.merge! unify(opts[:left], true)
+
+ @space_before = opts[:space_before] || opts[:space] || /[\ \t]*/
+ @space_after = opts[:space_after] || opts[:space] || /\s*/
+ if @space_before.is_a?(String)
+ @space_before = /#{Regexp.escape @space_before}/
+ end
+ if @space_after.is_a?(String)
+ @space_after = /#{Regexp.escape @space_after}/
+ end
+
+ @ret_class = opts[:calculate] ? Pushy : Array
+ end
+
+ # TODO give it a better name
+ class Pushy < Array
+ # calculates on <<
+ def << op
+ right = pop()
+ left = pop()
+ push op[left, right]
+ end
+ # get first element
+ def to_a
+ raise 'fuck' if size != 1
+ first
+ end
+ end
+
+ # scan an operator from ctx
+ def scan_op ctx
+ save_point = ctx.pos
+ @ops.each do |parser, (precedent, is_left)|
+ ret = parser._parse ctx
+ if INVALID[ret]
+ ctx.pos = save_point
+ else
+ return ret, precedent, is_left
+ end
+ end
+ nil
+ end
+ private :scan_op
+
+ def _parse ctx
+ stack = []
+ ret = @ret_class.new
+ token = @term._parse ctx
+ return INVALID if INVALID[token]
+ ret.push token
+ loop do
+ save_point = ctx.pos
+
+ # parse operator
+ ctx.skip @space_before
+ # operator-1, precedent-1, is-left-associative
+ op1, pre1, is_left = scan_op ctx
+ break unless op1 # pos restored in scan_op
+ while top = stack.last
+ op2, pre2 = top
+ if (is_left and pre1 <= pre2) or (pre1 < pre2)
+ stack.pop
+ ret << op2 # tricky: Pushy calculates when <<
+ else
+ break
+ end
+ end
+ stack.push [op1, pre1]
+
+ # parse term
+ ctx.skip @space_after
+ token = @term._parse ctx
+ if INVALID[token]
+ ctx.pos = save_point
+ break
+ end
+ ret.push token
+ end # loop
+
+ while top = stack.pop
+ ret << top[0]
+ end
+ ret.to_a # tricky: Pushy get the first thing out
+ end
+ end
+
+ # infix operator table implemented with Shunting-Yard algorithm<br/>
+ # call-seq:
+ # <pre>
+ # /\w+/.r.join_infix_operators \
+ # space: ' ',
+ # left: {'+' => 30, '*' => 40},
+ # right: {'=' => 20}
+ # </pre>
+ # options:
+ # <pre>
+ # space: sets space_before and space_after at the same time
+ # space_before: skip the space before operator
+ # space_after: skip the space after operator
+ # left: left associative operator table, in the form of "{operator => precedence}"
+ # right: right associative operator table
+ # </pre>
+ # NOTE: outputs reverse-polish-notation(RPN)<br/>
+ # NOTE: should put "**" before "*"
+ def join_infix_operators opts={}
+ # TODO: also make AST output available?
+ # TODO: now operator acceps string only, make it parser aware
+ ShuntingYard.new self, opts
+ end
diff --git a/lib/rsec.rb b/lib/rsec.rb
index 7480fc4..10575c6 100644
--- a/lib/rsec.rb
+++ b/lib/rsec.rb
@@ -11,7 +11,7 @@ module Rsec
TO_PARSER_METHOD = :r
end
- VERSION = '0.4.2'
+ VERSION = '1.0.0'
end
require "strscan"
diff --git a/lib/rsec/helpers.rb b/lib/rsec/helpers.rb
index 84735a0..fa55048 100644
--- a/lib/rsec/helpers.rb
+++ b/lib/rsec/helpers.rb
@@ -87,7 +87,7 @@ module Rsec #:nodoc:
raise 'Floating points does not allow :base'
end
base ||= 10
- Rsec.assert_type base, Fixnum
+ Rsec.assert_type base, Integer
unless (2..36).include? base
raise RangeError, ":base should be in 2..36, but got #{base}"
end
diff --git a/lib/rsec/parsers/misc.rb b/lib/rsec/parsers/misc.rb
index 6ff0c85..4f900dc 100644
--- a/lib/rsec/parsers/misc.rb
+++ b/lib/rsec/parsers/misc.rb
@@ -5,7 +5,7 @@ module Rsec #:nodoc
def _parse ctx
res = left()._parse ctx
return INVALID if INVALID[res]
- right()[res]
+ right()[res, ctx]
end
end
diff --git a/rakefile b/rakefile
new file mode 100644
index 0000000..461f607
--- /dev/null
+++ b/rakefile
@@ -0,0 +1,28 @@
+# coding: utf-8
+
+def test
+ Dir.glob "./test/test_*.rb" do |f|
+ require f
+ end
+end
+
+desc 'test all'
+task :test do
+ test
+end
+
+desc 'compare performance with treetop and haskell'
+task 'bench' do
+ require './bench/bench.rb'
+end
+
+desc 'build gems'
+task 'gem' do
+ system 'gem build rsec.gemspec'
+end
+
+desc 'install gems'
+task 'gem:in' => 'gem' do
+ system 'gem in *.gem --no-rdoc --no-ri'
+end
+
diff --git a/readme.rdoc b/readme.rdoc
index b4a1f75..8cd31bf 100644
--- a/readme.rdoc
+++ b/readme.rdoc
@@ -1,17 +1,15 @@
== Parser / Regexp Combinator for Ruby.
-Easier and faster than treetop / rex+racc.
+PEG grammar for Ruby, based on StringScanner. Consistently superior speed: up to 10 times faster than Treetop[https://github.com/nathansobo/treetop], and twice the speed of rex+racc.
-It's ruby1.9 only.
+Compatible with Ruby v1.9 and above.
== License
-As Ruby's
+Same license as for Ruby.
== Install
-The pure Ruby gem is fast enough (about 10+x faster than treetop generated code):
-
gem in rsec
== Doc
diff --git a/rsec.gemspec b/rsec.gemspec
index 080655f..bda685e 100644
--- a/rsec.gemspec
+++ b/rsec.gemspec
@@ -1,22 +1,15 @@
-#########################################################
-# This file has been automatically generated by gem2tgz #
-#########################################################
-# -*- encoding: utf-8 -*-
-# stub: rsec 0.4.2 ruby lib
-
-Gem::Specification.new do |s|
- s.name = "rsec".freeze
- s.version = "0.4.2"
-
- s.required_rubygems_version = Gem::Requirement.new(">= 0".freeze) if s.respond_to? :required_rubygems_version=
- s.require_paths = ["lib".freeze]
- s.authors = ["NS".freeze]
- s.date = "2016-09-25"
- s.description = "Easy and extreme fast dynamic PEG parser combinator.".freeze
- s.extra_rdoc_files = ["readme.rdoc".freeze]
- s.files = ["bench/bench.rb".freeze, "bench/little.rb".freeze, "bench/profile.rb".freeze, "examples/arithmetic.rb".freeze, "examples/bnf.rb".freeze, "examples/c_minus.rb".freeze, "examples/hello.scm".freeze, "examples/little_markdown.rb".freeze, "examples/nasm_manual.rb".freeze, "examples/s_exp.rb".freeze, "examples/scheme.rb".freeze, "examples/slow_json.rb".freeze, "lib/rsec.rb".freeze, "lib/rsec/helpers.rb".freeze, "lib/rsec/parser.rb".freeze, "lib/rsec/parsers/join.rb".freeze, "lib/rsec/parsers/misc.rb".freeze, "lib/rsec/parsers/prim.rb".freeze, "lib/rsec/parsers/repeat.rb".freeze, "lib/rsec/parsers/seq.rb".freeze, "lib/rsec/utils.rb".freeze, "license.txt".freeze, "readme.rdoc".freeze, "test/helpers.rb".freeze, "test/test_branch.rb".freeze, "test/test_examples.rb".freeze, "test/test_join.rb".freeze, "test/test_lookahead.rb".freeze, "test/test_misc.rb".freeze, "test/test_one_of.rb".freeze, "test/test_pattern.rb".freeze, "test/test_prim.rb".freeze, "test/test_repeat.rb".freeze, "test/test_rsec.rb".freeze, "test/test_seq.rb".freeze]
- s.homepage = "http://rsec.herokuapp.com".freeze
- s.required_ruby_version = Gem::Requirement.new(">= 1.9.1".freeze)
- s.rubygems_version = "2.5.2.1".freeze
- s.summary = "Extreme Fast Parser Combinator for Ruby".freeze
-end
+Gem::Specification.new do |s|
+ s.name = "rsec"
+ s.version = "1.0.0"
+ s.author = "NS"
+ s.homepage = "http://rsec.herokuapp.com"
+ s.platform = Gem::Platform::RUBY
+ s.summary = "Extreme Fast Parser Combinator for Ruby"
+ s.description = "Easy and extreme fast dynamic PEG parser combinator."
+ s.required_ruby_version = ">=1.9.1"
+
+ s.files = Dir.glob("{license.txt,readme.rdoc,lib/**/*.rb,examples/*.rb,examples/*.scm,test/*.rb,bench/*.rb}")
+ s.require_paths = ["lib"]
+ # s.has_rdoc = false
+ s.extra_rdoc_files = ["readme.rdoc"]
+end
diff --git a/test/test_misc.rb b/test/test_misc.rb
index d98dbd0..553535b 100644
--- a/test/test_misc.rb
+++ b/test/test_misc.rb
@@ -41,6 +41,18 @@ class TestMisc < TC
ase 'bb', p.parse('b')
ase INVALID, p.parse('.')
end
+
+ def test_seq_map
+ p = seq('"'.r, /\w/.r, '"'.r).map{|(_, n, _)| n*2}
+ ase 'bb', p.parse('"b"')
+ ase INVALID, p.parse('.')
+ end
+
+ def test_seq_map_with_context
+ p = seq('"'.r, /\w/.r, '"'.r).map{|(_, n, _), ctx| n*ctx.pos}
+ ase 'bbb', p.parse('"b"')
+ ase INVALID, p.parse('.')
+ end
def test_fail
p = 'v'.r.fail 'omg!'
diff --git a/website/.gitignore b/website/.gitignore
new file mode 100755
index 0000000..54b04f0
--- /dev/null
+++ b/website/.gitignore
@@ -0,0 +1,3 @@
+blueprint-css
+google-code-prettify
+rakefile
diff --git a/website/Gemfile b/website/Gemfile
new file mode 100644
index 0000000..9b69860
--- /dev/null
+++ b/website/Gemfile
@@ -0,0 +1,6 @@
+source "https://rubygems.org"
+# ruby '2.2.2'
+
+gem 'sinatra'
+gem 'slim'
+gem 'puma'
diff --git a/website/Gemfile.lock b/website/Gemfile.lock
new file mode 100644
index 0000000..d316208
--- /dev/null
+++ b/website/Gemfile.lock
@@ -0,0 +1,29 @@
+GEM
+ remote: https://rubygems.org/
+ specs:
+ mustermann (1.0.0)
+ puma (3.9.1)
+ rack (2.0.3)
+ rack-protection (2.0.0)
+ rack
+ sinatra (2.0.0)
+ mustermann (~> 1.0)
+ rack (~> 2.0)
+ rack-protection (= 2.0.0)
+ tilt (~> 2.0)
+ slim (3.0.8)
+ temple (>= 0.7.6, < 0.9)
+ tilt (>= 1.3.3, < 2.1)
+ temple (0.8.0)
+ tilt (2.0.7)
+
+PLATFORMS
+ ruby
+
+DEPENDENCIES
+ puma
+ sinatra
+ slim
+
+BUNDLED WITH
+ 1.14.6
diff --git a/website/Procfile b/website/Procfile
new file mode 100644
index 0000000..625154b
--- /dev/null
+++ b/website/Procfile
@@ -0,0 +1 @@
+web: bundle exec puma -t 5:5 -p ${PORT:-3000} -e ${RACK_ENV:-production}
diff --git a/website/config.ru b/website/config.ru
new file mode 100644
index 0000000..ddff39c
--- /dev/null
+++ b/website/config.ru
@@ -0,0 +1,2 @@
+require './run'
+run Sinatra::Application
diff --git a/website/public/css/default.css b/website/public/css/default.css
new file mode 100644
index 0000000..f305c21
--- /dev/null
+++ b/website/public/css/default.css
@@ -0,0 +1,54 @@
+/* override global */
+body{
+ font-size: 100%;
+}
+pre,code,tt{
+ font: 1em 'Monaco', monospace; line-height: 1.5;
+}
+
+/* layout */
+#header div a{
+ font-size:4em;
+ text-decoration:none;
+ color:black;
+ margin-left:10px;
+ display:block;
+}
+
+/* specific */
+pre.code{
+ border:1px solid #ccc;
+ padding:6px;
+ -webkit-border-radius:5px;
+ -moz-border-radius:5px;
+ border-radius:5px;
+}
+pre.desc{
+ font-family:'Helvetica Neue', Arial, Helvetica, sans-serif;
+}
+h3{
+ margin-left:-15px;
+ padding:3px;
+ padding-left:15px;
+ background-image:-webkit-gradient(linear,left top,right top,color-stop(0.1, #E4F0E7),color-stop(0.3, #FFFFFF));
+ background-image:-moz-linear-gradient(left center,#E4F0E7 10%,#FFFFFF 30%);
+ -webkit-border-bottom-left-radius:15px;
+ -moz-border-radius-bottomleft:15px;
+ border-bottom-left-radius:15px;
+}
+span.params{
+ color:#888;
+ font-size:0.75em;
+}
+span.constraints{
+ margin-left:50px;
+ background-color:#888;
+ color:#fff;
+ font-size:0.5em;
+ padding:2px;
+}
+i.example{
+ display:block;
+ margin-bottom:-10px;
+ margin-top:-18px;
+}
diff --git a/website/public/js/default.js b/website/public/js/default.js
new file mode 100644
index 0000000..b96a09c
--- /dev/null
+++ b/website/public/js/default.js
@@ -0,0 +1,10 @@
+$(function(){
+ // hilite current
+ var pathMatch = window.location.toString().match(/\/\w+$/)
+ pathMatch = pathMatch ? pathMatch[0] : '/'
+ $('#header a').each(function(){
+ if($(this).attr('href') === pathMatch)
+ $(this).css({'color':'#fff'})
+ })
+ prettyPrint();
+})
diff --git a/website/public/js/jquery-1.5.min.js b/website/public/js/jquery-1.5.min.js
new file mode 100644
index 0000000..9144b8a
--- /dev/null
+++ b/website/public/js/jquery-1.5.min.js
@@ -0,0 +1,16 @@
+/*!
+ * jQuery JavaScript Library v1.5
+ * http://jquery.com/
+ *
+ * Copyright 2011, John Resig
+ * Dual licensed under the MIT or GPL Version 2 licenses.
+ * http://jquery.org/license
+ *
+ * Includes Sizzle.js
+ * http://sizzlejs.com/
+ * Copyright 2011, The Dojo Foundation
+ * Released under the MIT, BSD, and GPL Licenses.
+ *
+ * Date: Mon Jan 31 08:31:29 2011 -0500
+ */
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a=c.body,b=c.createElement("div"),e,f,g,h,i=parseFloat(d.css(a,"marginTop"))||0,j="<div style='position:absolute;top:0;left:0;margin:0;border:5px solid #000;padding:0;width:1px;height:1px;'><div></div></div><table style='position:absolute;top:0;left:0;margin:0;border:5px solid #000;padding:0;width:1px;height:1px;' cellpadding='0' cellspacing='0'><tr><td></td></tr></table>";d.extend(b.style,{position:"absolute",top:0,left:0,margin:0,border:0,width:"1px",height:"1px",visibility:"hidden"}),b.innerHTML=j,a.insertBefore(b,a.firstChild),e=b.firstChild,f=e.firstChild,h=e.nextSibling.firstChild.firstChild,this.doesNotAddBorder=f.offsetTop!==5,this.doesAddBorderForTableAndCells=h.offsetTop===5,f.style.position="fixed",f.style.top="20px",this.supportsFixedPosition=f.offsetTop===20||f.offsetTop===15,f.style.position=f.style.top="",e.style.overflow="hidden",e.style.position="relative",this.subtractsBorderForOverflowNotVisible=f.offsetTop===-5,this.doesNotIncludeMarginInBodyOffset=a.offsetTop!==i,a.removeChild(b),a=b=e=f=g=h=null,d.offset.initialize=d.noop},bodyOffset:function(a){var b=a.offsetTop,c=a.offsetLeft;d.offset.initialize(),d.offset.doesNotIncludeMarginInBodyOffset&&(b+=parseFloat(d.css(a,"marginTop"))||0,c+=parseFloat(d.css(a,"marginLeft"))||0);return{top:b,left:c}},setOffset:function(a,b,c){var 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diff --git a/website/public/prettify/lang-apollo.js b/website/public/prettify/lang-apollo.js
new file mode 100644
index 0000000..c218210
--- /dev/null
+++ b/website/public/prettify/lang-apollo.js
@@ -0,0 +1,51 @@
+// Copyright (C) 2009 Onno Hommes.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/**
+ * @fileoverview
+ * Registers a language handler for the AGC/AEA Assembly Language as described
+ * at http://virtualagc.googlecode.com
+ * <p>
+ * This file could be used by goodle code to allow syntax highlight for
+ * Virtual AGC SVN repository or if you don't want to commonize
+ * the header for the agc/aea html assembly listing.
+ *
+ * @author ohommes@alumni.cmu.edu
+ */
+
+PR.registerLangHandler(
+ PR.createSimpleLexer(
+ [
+ // A line comment that starts with ;
+ [PR.PR_COMMENT, /^#[^\r\n]*/, null, '#'],
+ // Whitespace
+ [PR.PR_PLAIN, /^[\t\n\r \xA0]+/, null, '\t\n\r \xA0'],
+ // A double quoted, possibly multi-line, string.
+ [PR.PR_STRING, /^\"(?:[^\"\\]|\\[\s\S])*(?:\"|$)/, null, '"']
+ ],
+ [
+ [PR.PR_KEYWORD, /^(?:ADS|AD|AUG|BZF|BZMF|CAE|CAF|CA|CCS|COM|CS|DAS|DCA|DCOM|DCS|DDOUBL|DIM|DOUBLE|DTCB|DTCF|DV|DXCH|EDRUPT|EXTEND|INCR|INDEX|NDX|INHINT|LXCH|MASK|MSK|MP|MSU|NOOP|OVSK|QXCH|RAND|READ|RELINT|RESUME|RETURN|ROR|RXOR|SQUARE|SU|TCR|TCAA|OVSK|TCF|TC|TS|WAND|WOR|WRITE|XCH|XLQ|XXALQ|ZL|ZQ|ADD|ADZ|SUB|SUZ|MPY|MPR|MPZ|DVP|COM|ABS|CLA|CLZ|LDQ|STO|STQ|ALS|LLS|LRS|TRA|TSQ|TMI|TOV|AXT|TIX|DLY|INP|OUT)\s/,null],
+ [PR.PR_TYPE, /^(?:-?GENADR|=MINUS|2BCADR|VN|BOF|MM|-?2CADR|-?[1-6]DNADR|ADRES|BBCON|[SE]?BANK\=?|BLOCK|BNKSUM|E?CADR|COUNT\*?|2?DEC\*?|-?DNCHAN|-?DNPTR|EQUALS|ERASE|MEMORY|2?OCT|REMADR|SETLOC|SUBRO|ORG|BSS|BES|SYN|EQU|DEFINE|END)\s/,null],
+ // A single quote possibly followed by a word that optionally ends with
+ // = ! or ?.
+ [PR.PR_LITERAL,
+ /^\'(?:-*(?:\w|\\[\x21-\x7e])(?:[\w-]*|\\[\x21-\x7e])[=!?]?)?/],
+ // Any word including labels that optionally ends with = ! or ?.
+ [PR.PR_PLAIN,
+ /^-*(?:[!-z_]|\\[\x21-\x7e])(?:[\w-]*|\\[\x21-\x7e])[=!?]?/i],
+ // A printable non-space non-special character
+ [PR.PR_PUNCTUATION, /^[^\w\t\n\r \xA0()\"\\\';]+/]
+ ]),
+ ['apollo', 'agc', 'aea']);
diff --git a/website/public/prettify/lang-css.js b/website/public/prettify/lang-css.js
new file mode 100644
index 0000000..44013d2
--- /dev/null
+++ b/website/public/prettify/lang-css.js
@@ -0,0 +1,78 @@
+// Copyright (C) 2009 Google Inc.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+
+/**
+ * @fileoverview
+ * Registers a language handler for CSS.
+ *
+ *
+ * To use, include prettify.js and this file in your HTML page.
+ * Then put your code in an HTML tag like
+ * <pre class="prettyprint lang-css"></pre>
+ *
+ *
+ * http://www.w3.org/TR/CSS21/grammar.html Section G2 defines the lexical
+ * grammar. This scheme does not recognize keywords containing escapes.
+ *
+ * @author mikesamuel@gmail.com
+ */
+
+PR.registerLangHandler(
+ PR.createSimpleLexer(
+ [
+ // The space production <s>
+ [PR.PR_PLAIN, /^[ \t\r\n\f]+/, null, ' \t\r\n\f']
+ ],
+ [
+ // Quoted strings. <string1> and <string2>
+ [PR.PR_STRING,
+ /^\"(?:[^\n\r\f\\\"]|\\(?:\r\n?|\n|\f)|\\[\s\S])*\"/, null],
+ [PR.PR_STRING,
+ /^\'(?:[^\n\r\f\\\']|\\(?:\r\n?|\n|\f)|\\[\s\S])*\'/, null],
+ ['lang-css-str', /^url\(([^\)\"\']*)\)/i],
+ [PR.PR_KEYWORD,
+ /^(?:url|rgb|\!important|@import|@page|@media|@charset|inherit)(?=[^\-\w]|$)/i,
+ null],
+ // A property name -- an identifier followed by a colon.
+ ['lang-css-kw', /^(-?(?:[_a-z]|(?:\\[0-9a-f]+ ?))(?:[_a-z0-9\-]|\\(?:\\[0-9a-f]+ ?))*)\s*:/i],
+ // A C style block comment. The <comment> production.
+ [PR.PR_COMMENT, /^\/\*[^*]*\*+(?:[^\/*][^*]*\*+)*\//],
+ // Escaping text spans
+ [PR.PR_COMMENT, /^(?:<!--|-->)/],
+ // A number possibly containing a suffix.
+ [PR.PR_LITERAL, /^(?:\d+|\d*\.\d+)(?:%|[a-z]+)?/i],
+ // A hex color
+ [PR.PR_LITERAL, /^#(?:[0-9a-f]{3}){1,2}/i],
+ // An identifier
+ [PR.PR_PLAIN,
+ /^-?(?:[_a-z]|(?:\\[\da-f]+ ?))(?:[_a-z\d\-]|\\(?:\\[\da-f]+ ?))*/i],
+ // A run of punctuation
+ [PR.PR_PUNCTUATION, /^[^\s\w\'\"]+/]
+ ]),
+ ['css']);
+PR.registerLangHandler(
+ PR.createSimpleLexer([],
+ [
+ [PR.PR_KEYWORD,
+ /^-?(?:[_a-z]|(?:\\[\da-f]+ ?))(?:[_a-z\d\-]|\\(?:\\[\da-f]+ ?))*/i]
+ ]),
+ ['css-kw']);
+PR.registerLangHandler(
+ PR.createSimpleLexer([],
+ [
+ [PR.PR_STRING, /^[^\)\"\']+/]
+ ]),
+ ['css-str']);
diff --git a/website/public/prettify/lang-hs.js b/website/public/prettify/lang-hs.js
new file mode 100644
index 0000000..91157b9
--- /dev/null
+++ b/website/public/prettify/lang-hs.js
@@ -0,0 +1,101 @@
+// Copyright (C) 2009 Google Inc.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+
+/**
+ * @fileoverview
+ * Registers a language handler for Haskell.
+ *
+ *
+ * To use, include prettify.js and this file in your HTML page.
+ * Then put your code in an HTML tag like
+ * <pre class="prettyprint lang-hs">(my lisp code)</pre>
+ * The lang-cl class identifies the language as common lisp.
+ * This file supports the following language extensions:
+ * lang-cl - Common Lisp
+ * lang-el - Emacs Lisp
+ * lang-lisp - Lisp
+ * lang-scm - Scheme
+ *
+ *
+ * I used http://www.informatik.uni-freiburg.de/~thiemann/haskell/haskell98-report-html/syntax-iso.html
+ * as the basis, but ignore the way the ncomment production nests since this
+ * makes the lexical grammar irregular. It might be possible to support
+ * ncomments using the lookbehind filter.
+ *
+ *
+ * @author mikesamuel@gmail.com
+ */
+
+PR.registerLangHandler(
+ PR.createSimpleLexer(
+ [
+ // Whitespace
+ // whitechar -> newline | vertab | space | tab | uniWhite
+ // newline -> return linefeed | return | linefeed | formfeed
+ [PR.PR_PLAIN, /^[\t\n\x0B\x0C\r ]+/, null, '\t\n\x0B\x0C\r '],
+ // Single line double and single-quoted strings.
+ // char -> ' (graphic<' | \> | space | escape<\&>) '
+ // string -> " {graphic<" | \> | space | escape | gap}"
+ // escape -> \ ( charesc | ascii | decimal | o octal
+ // | x hexadecimal )
+ // charesc -> a | b | f | n | r | t | v | \ | " | ' | &
+ [PR.PR_STRING, /^\"(?:[^\"\\\n\x0C\r]|\\[\s\S])*(?:\"|$)/,
+ null, '"'],
+ [PR.PR_STRING, /^\'(?:[^\'\\\n\x0C\r]|\\[^&])\'?/,
+ null, "'"],
+ // decimal -> digit{digit}
+ // octal -> octit{octit}
+ // hexadecimal -> hexit{hexit}
+ // integer -> decimal
+ // | 0o octal | 0O octal
+ // | 0x hexadecimal | 0X hexadecimal
+ // float -> decimal . decimal [exponent]
+ // | decimal exponent
+ // exponent -> (e | E) [+ | -] decimal
+ [PR.PR_LITERAL,
+ /^(?:0o[0-7]+|0x[\da-f]+|\d+(?:\.\d+)?(?:e[+\-]?\d+)?)/i,
+ null, '0123456789']
+ ],
+ [
+ // Haskell does not have a regular lexical grammar due to the nested
+ // ncomment.
+ // comment -> dashes [ any<symbol> {any}] newline
+ // ncomment -> opencom ANYseq {ncomment ANYseq}closecom
+ // dashes -> '--' {'-'}
+ // opencom -> '{-'
+ // closecom -> '-}'
+ [PR.PR_COMMENT, /^(?:(?:--+(?:[^\r\n\x0C]*)?)|(?:\{-(?:[^-]|-+[^-\}])*-\}))/],
+ // reservedid -> case | class | data | default | deriving | do
+ // | else | if | import | in | infix | infixl | infixr
+ // | instance | let | module | newtype | of | then
+ // | type | where | _
+ [PR.PR_KEYWORD, /^(?:case|class|data|default|deriving|do|else|if|import|in|infix|infixl|infixr|instance|let|module|newtype|of|then|type|where|_)(?=[^a-zA-Z0-9\']|$)/, null],
+ // qvarid -> [ modid . ] varid
+ // qconid -> [ modid . ] conid
+ // varid -> (small {small | large | digit | ' })<reservedid>
+ // conid -> large {small | large | digit | ' }
+ // modid -> conid
+ // small -> ascSmall | uniSmall | _
+ // ascSmall -> a | b | ... | z
+ // uniSmall -> any Unicode lowercase letter
+ // large -> ascLarge | uniLarge
+ // ascLarge -> A | B | ... | Z
+ // uniLarge -> any uppercase or titlecase Unicode letter
+ [PR.PR_PLAIN, /^(?:[A-Z][\w\']*\.)*[a-zA-Z][\w\']*/],
+ // matches the symbol production
+ [PR.PR_PUNCTUATION, /^[^\t\n\x0B\x0C\r a-zA-Z0-9\'\"]+/]
+ ]),
+ ['hs']);
diff --git a/website/public/prettify/lang-lisp.js b/website/public/prettify/lang-lisp.js
new file mode 100644
index 0000000..14e4f3c
--- /dev/null
+++ b/website/public/prettify/lang-lisp.js
@@ -0,0 +1,93 @@
+// Copyright (C) 2008 Google Inc.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+
+/**
+ * @fileoverview
+ * Registers a language handler for Common Lisp and related languages.
+ *
+ *
+ * To use, include prettify.js and this file in your HTML page.
+ * Then put your code in an HTML tag like
+ * <pre class="prettyprint lang-lisp">(my lisp code)</pre>
+ * The lang-cl class identifies the language as common lisp.
+ * This file supports the following language extensions:
+ * lang-cl - Common Lisp
+ * lang-el - Emacs Lisp
+ * lang-lisp - Lisp
+ * lang-scm - Scheme
+ *
+ *
+ * I used http://www.devincook.com/goldparser/doc/meta-language/grammar-LISP.htm
+ * as the basis, but added line comments that start with ; and changed the atom
+ * production to disallow unquoted semicolons.
+ *
+ * "Name" = 'LISP'
+ * "Author" = 'John McCarthy'
+ * "Version" = 'Minimal'
+ * "About" = 'LISP is an abstract language that organizes ALL'
+ * | 'data around "lists".'
+ *
+ * "Start Symbol" = [s-Expression]
+ *
+ * {Atom Char} = {Printable} - {Whitespace} - [()"\'']
+ *
+ * Atom = ( {Atom Char} | '\'{Printable} )+
+ *
+ * [s-Expression] ::= [Quote] Atom
+ * | [Quote] '(' [Series] ')'
+ * | [Quote] '(' [s-Expression] '.' [s-Expression] ')'
+ *
+ * [Series] ::= [s-Expression] [Series]
+ * |
+ *
+ * [Quote] ::= '' !Quote = do not evaluate
+ * |
+ *
+ *
+ * I used <a href="http://gigamonkeys.com/book/">Practical Common Lisp</a> as
+ * the basis for the reserved word list.
+ *
+ *
+ * @author mikesamuel@gmail.com
+ */
+
+PR.registerLangHandler(
+ PR.createSimpleLexer(
+ [
+ ['opn', /^\(/, null, '('],
+ ['clo', /^\)/, null, ')'],
+ // A line comment that starts with ;
+ [PR.PR_COMMENT, /^;[^\r\n]*/, null, ';'],
+ // Whitespace
+ [PR.PR_PLAIN, /^[\t\n\r \xA0]+/, null, '\t\n\r \xA0'],
+ // A double quoted, possibly multi-line, string.
+ [PR.PR_STRING, /^\"(?:[^\"\\]|\\[\s\S])*(?:\"|$)/, null, '"']
+ ],
+ [
+ [PR.PR_KEYWORD, /^(?:block|c[ad]+r|catch|con[ds]|def(?:ine|un)|do|eq|eql|equal|equalp|eval-when|flet|format|go|if|labels|lambda|let|load-time-value|locally|macrolet|multiple-value-call|nil|progn|progv|quote|require|return-from|setq|symbol-macrolet|t|tagbody|the|throw|unwind)\b/, null],
+ [PR.PR_LITERAL,
+ /^[+\-]?(?:0x[0-9a-f]+|\d+\/\d+|(?:\.\d+|\d+(?:\.\d*)?)(?:[ed][+\-]?\d+)?)/i],
+ // A single quote possibly followed by a word that optionally ends with
+ // = ! or ?.
+ [PR.PR_LITERAL,
+ /^\'(?:-*(?:\w|\\[\x21-\x7e])(?:[\w-]*|\\[\x21-\x7e])[=!?]?)?/],
+ // A word that optionally ends with = ! or ?.
+ [PR.PR_PLAIN,
+ /^-*(?:[a-z_]|\\[\x21-\x7e])(?:[\w-]*|\\[\x21-\x7e])[=!?]?/i],
+ // A printable non-space non-special character
+ [PR.PR_PUNCTUATION, /^[^\w\t\n\r \xA0()\"\\\';]+/]
+ ]),
+ ['cl', 'el', 'lisp', 'scm']);
diff --git a/website/public/prettify/lang-lua.js b/website/public/prettify/lang-lua.js
new file mode 100644
index 0000000..68bb30b
--- /dev/null
+++ b/website/public/prettify/lang-lua.js
@@ -0,0 +1,59 @@
+// Copyright (C) 2008 Google Inc.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+
+/**
+ * @fileoverview
+ * Registers a language handler for Lua.
+ *
+ *
+ * To use, include prettify.js and this file in your HTML page.
+ * Then put your code in an HTML tag like
+ * <pre class="prettyprint lang-lua">(my Lua code)</pre>
+ *
+ *
+ * I used http://www.lua.org/manual/5.1/manual.html#2.1
+ * Because of the long-bracket concept used in strings and comments, Lua does
+ * not have a regular lexical grammar, but luckily it fits within the space
+ * of irregular grammars supported by javascript regular expressions.
+ *
+ * @author mikesamuel@gmail.com
+ */
+
+PR.registerLangHandler(
+ PR.createSimpleLexer(
+ [
+ // Whitespace
+ [PR.PR_PLAIN, /^[\t\n\r \xA0]+/, null, '\t\n\r \xA0'],
+ // A double or single quoted, possibly multi-line, string.
+ [PR.PR_STRING, /^(?:\"(?:[^\"\\]|\\[\s\S])*(?:\"|$)|\'(?:[^\'\\]|\\[\s\S])*(?:\'|$))/, null, '"\'']
+ ],
+ [
+ // A comment is either a line comment that starts with two dashes, or
+ // two dashes preceding a long bracketed block.
+ [PR.PR_COMMENT, /^--(?:\[(=*)\[[\s\S]*?(?:\]\1\]|$)|[^\r\n]*)/],
+ // A long bracketed block not preceded by -- is a string.
+ [PR.PR_STRING, /^\[(=*)\[[\s\S]*?(?:\]\1\]|$)/],
+ [PR.PR_KEYWORD, /^(?:and|break|do|else|elseif|end|false|for|function|if|in|local|nil|not|or|repeat|return|then|true|until|while)\b/, null],
+ // A number is a hex integer literal, a decimal real literal, or in
+ // scientific notation.
+ [PR.PR_LITERAL,
+ /^[+-]?(?:0x[\da-f]+|(?:(?:\.\d+|\d+(?:\.\d*)?)(?:e[+\-]?\d+)?))/i],
+ // An identifier
+ [PR.PR_PLAIN, /^[a-z_]\w*/i],
+ // A run of punctuation
+ [PR.PR_PUNCTUATION, /^[^\w\t\n\r \xA0][^\w\t\n\r \xA0\"\'\-\+=]*/]
+ ]),
+ ['lua']);
diff --git a/website/public/prettify/lang-ml.js b/website/public/prettify/lang-ml.js
new file mode 100644
index 0000000..c5a3db7
--- /dev/null
+++ b/website/public/prettify/lang-ml.js
@@ -0,0 +1,56 @@
+// Copyright (C) 2008 Google Inc.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+
+/**
+ * @fileoverview
+ * Registers a language handler for OCaml, SML, F# and similar languages.
+ *
+ * Based on the lexical grammar at
+ * http://research.microsoft.com/fsharp/manual/spec2.aspx#_Toc202383715
+ *
+ * @author mikesamuel@gmail.com
+ */
+
+PR.registerLangHandler(
+ PR.createSimpleLexer(
+ [
+ // Whitespace is made up of spaces, tabs and newline characters.
+ [PR.PR_PLAIN, /^[\t\n\r \xA0]+/, null, '\t\n\r \xA0'],
+ // #if ident/#else/#endif directives delimit conditional compilation
+ // sections
+ [PR.PR_COMMENT,
+ /^#(?:if[\t\n\r \xA0]+(?:[a-z_$][\w\']*|``[^\r\n\t`]*(?:``|$))|else|endif|light)/i,
+ null, '#'],
+ // A double or single quoted, possibly multi-line, string.
+ // F# allows escaped newlines in strings.
+ [PR.PR_STRING, /^(?:\"(?:[^\"\\]|\\[\s\S])*(?:\"|$)|\'(?:[^\'\\]|\\[\s\S])*(?:\'|$))/, null, '"\'']
+ ],
+ [
+ // Block comments are delimited by (* and *) and may be
+ // nested. Single-line comments begin with // and extend to
+ // the end of a line.
+ // TODO: (*...*) comments can be nested. This does not handle that.
+ [PR.PR_COMMENT, /^(?:\/\/[^\r\n]*|\(\*[\s\S]*?\*\))/],
+ [PR.PR_KEYWORD, /^(?:abstract|and|as|assert|begin|class|default|delegate|do|done|downcast|downto|elif|else|end|exception|extern|false|finally|for|fun|function|if|in|inherit|inline|interface|internal|lazy|let|match|member|module|mutable|namespace|new|null|of|open|or|override|private|public|rec|return|static|struct|then|to|true|try|type|upcast|use|val|void|when|while|with|yield|asr|land|lor|lsl|lsr|lxor|mod|sig|atomic|break|checked|component|const|constraint|constructor|continue|eager|event|external|fixed|functor|global|include|method|mixin|object|parallel|process|protected|pure|sealed|trait|virtual|volatile)\b/],
+ // A number is a hex integer literal, a decimal real literal, or in
+ // scientific notation.
+ [PR.PR_LITERAL,
+ /^[+\-]?(?:0x[\da-f]+|(?:(?:\.\d+|\d+(?:\.\d*)?)(?:e[+\-]?\d+)?))/i],
+ [PR.PR_PLAIN, /^(?:[a-z_]\w*[!?#]?|``[^\r\n\t`]*(?:``|$))/i],
+ // A printable non-space non-special character
+ [PR.PR_PUNCTUATION, /^[^\t\n\r \xA0\"\'\w]+/]
+ ]),
+ ['fs', 'ml']);
diff --git a/website/public/prettify/lang-proto.js b/website/public/prettify/lang-proto.js
new file mode 100644
index 0000000..d6531fd
--- /dev/null
+++ b/website/public/prettify/lang-proto.js
@@ -0,0 +1,35 @@
+// Copyright (C) 2006 Google Inc.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/**
+ * @fileoverview
+ * Registers a language handler for Protocol Buffers as described at
+ * http://code.google.com/p/protobuf/.
+ *
+ * Based on the lexical grammar at
+ * http://research.microsoft.com/fsharp/manual/spec2.aspx#_Toc202383715
+ *
+ * @author mikesamuel@gmail.com
+ */
+
+PR.registerLangHandler(PR.sourceDecorator({
+ keywords: (
+ 'bool bytes default double enum extend extensions false fixed32 '
+ + 'fixed64 float group import int32 int64 max message option '
+ + 'optional package repeated required returns rpc service '
+ + 'sfixed32 sfixed64 sint32 sint64 string syntax to true uint32 '
+ + 'uint64'),
+ cStyleComments: true
+ }), ['proto']);
diff --git a/website/public/prettify/lang-scala.js b/website/public/prettify/lang-scala.js
new file mode 100644
index 0000000..e0d675a
--- /dev/null
+++ b/website/public/prettify/lang-scala.js
@@ -0,0 +1,54 @@
+// Copyright (C) 2010 Google Inc.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/**
+ * @fileoverview
+ * Registers a language handler for Scala.
+ *
+ * Derived from http://lampsvn.epfl.ch/svn-repos/scala/scala-documentation/trunk/src/reference/SyntaxSummary.tex
+ *
+ * @author mikesamuel@gmail.com
+ */
+
+PR.registerLangHandler(
+ PR.createSimpleLexer(
+ [
+ // Whitespace
+ [PR.PR_PLAIN, /^[\t\n\r \xA0]+/, null, '\t\n\r \xA0'],
+ // A double or single quoted string
+ // or a triple double-quoted multi-line string.
+ [PR.PR_STRING,
+ /^(?:"(?:(?:""(?:""?(?!")|[^\\"]|\\.)*"{0,3})|(?:[^"\r\n\\]|\\.)*"?))/,
+ null, '"'],
+ [PR.PR_LITERAL, /^`(?:[^\r\n\\`]|\\.)*`?/, null, '`'],
+ [PR.PR_PUNCTUATION, /^[!#%&()*+,\-:;<=>?@\[\\\]^{|}~]+/, null,
+ '!#%&()*+,-:;<=>?@[\\]^{|}~']
+ ],
+ [
+ // A symbol literal is a single quote followed by an identifier with no
+ // single quote following
+ // A character literal has single quotes on either side
+ [PR.PR_STRING, /^'(?:[^\r\n\\']|\\(?:'|[^\r\n']+))'/],
+ [PR.PR_LITERAL, /^'[a-zA-Z_$][\w$]*(?!['$\w])/],
+ [PR.PR_KEYWORD, /^(?:abstract|case|catch|class|def|do|else|extends|final|finally|for|forSome|if|implicit|import|lazy|match|new|object|override|package|private|protected|requires|return|sealed|super|throw|trait|try|type|val|var|while|with|yield)\b/],
+ [PR.PR_LITERAL, /^(?:true|false|null|this)\b/],
+ [PR.PR_LITERAL, /^(?:(?:0(?:[0-7]+|X[0-9A-F]+))L?|(?:(?:0|[1-9][0-9]*)(?:(?:\.[0-9]+)?(?:E[+\-]?[0-9]+)?F?|L?))|\\.[0-9]+(?:E[+\-]?[0-9]+)?F?)/i],
+ // Treat upper camel case identifiers as types.
+ [PR.PR_TYPE, /^[$_]*[A-Z][_$A-Z0-9]*[a-z][\w$]*/],
+ [PR.PR_PLAIN, /^[$a-zA-Z_][\w$]*/],
+ [PR.PR_COMMENT, /^\/(?:\/.*|\*(?:\/|\**[^*/])*(?:\*+\/?)?)/],
+ [PR.PR_PUNCTUATION, /^(?:\.+|\/)/]
+ ]),
+ ['scala']);
diff --git a/website/public/prettify/lang-sql.js b/website/public/prettify/lang-sql.js
new file mode 100644
index 0000000..7a58097
--- /dev/null
+++ b/website/public/prettify/lang-sql.js
@@ -0,0 +1,57 @@
+// Copyright (C) 2008 Google Inc.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+
+/**
+ * @fileoverview
+ * Registers a language handler for SQL.
+ *
+ *
+ * To use, include prettify.js and this file in your HTML page.
+ * Then put your code in an HTML tag like
+ * <pre class="prettyprint lang-sql">(my SQL code)</pre>
+ *
+ *
+ * http://savage.net.au/SQL/sql-99.bnf.html is the basis for the grammar, and
+ * http://msdn.microsoft.com/en-us/library/aa238507(SQL.80).aspx as the basis
+ * for the keyword list.
+ *
+ * @author mikesamuel@gmail.com
+ */
+
+PR.registerLangHandler(
+ PR.createSimpleLexer(
+ [
+ // Whitespace
+ [PR.PR_PLAIN, /^[\t\n\r \xA0]+/, null, '\t\n\r \xA0'],
+ // A double or single quoted, possibly multi-line, string.
+ [PR.PR_STRING, /^(?:"(?:[^\"\\]|\\.)*"|'(?:[^\'\\]|\\.)*')/, null,
+ '"\'']
+ ],
+ [
+ // A comment is either a line comment that starts with two dashes, or
+ // two dashes preceding a long bracketed block.
+ [PR.PR_COMMENT, /^(?:--[^\r\n]*|\/\*[\s\S]*?(?:\*\/|$))/],
+ [PR.PR_KEYWORD, /^(?:ADD|ALL|ALTER|AND|ANY|AS|ASC|AUTHORIZATION|BACKUP|BEGIN|BETWEEN|BREAK|BROWSE|BULK|BY|CASCADE|CASE|CHECK|CHECKPOINT|CLOSE|CLUSTERED|COALESCE|COLLATE|COLUMN|COMMIT|COMPUTE|CONSTRAINT|CONTAINS|CONTAINSTABLE|CONTINUE|CONVERT|CREATE|CROSS|CURRENT|CURRENT_DATE|CURRENT_TIME|CURRENT_TIMESTAMP|CURRENT_USER|CURSOR|DATABASE|DBCC|DEALLOCATE|DECLARE|DEFAULT|DELETE|DENY|DESC|DISK|DISTINCT|DISTRIBUTED|DOUBLE|DROP|DUMMY|DUMP|ELSE|END|ERRLVL|ESCAPE|EXCEPT|EXEC|EXECUTE|EXISTS|EXIT|FETCH|FILE|FILLFACTOR|FOR|FOREIGN|FREETEXT|FREETEXTTABLE|FROM|FULL|FUNCTION|GOTO|GRANT|GROUP|HAVING|HOLDLOCK|IDENTITY|IDENTITYCOL|IDENTITY_INSERT|IF|IN|INDEX|INNER|INSERT|INTERSECT|INTO|IS|JOIN|KEY|KILL|LEFT|LIKE|LINENO|LOAD|NATIONAL|NOCHECK|NONCLUSTERED|NOT|NULL|NULLIF|OF|OFF|OFFSETS|ON|OPEN|OPENDATASOURCE|OPENQUERY|OPENROWSET|OPENXML|OPTION|OR|ORDER|OUTER|OVER|PERCENT|PLAN|PRECISION|PRIMARY|PRINT|PROC|PROCEDURE|PUBLIC|RAISERROR|READ|READTEXT|RECONFIGURE|REFERENCES|REPLICATION|RESTORE|RESTRICT|RETURN|REVOKE|RIGHT|ROLLBACK|ROWCOUNT|ROWGUIDCOL|RULE|SAVE|SCHEMA|SELECT|SESSION_USER|SET|SETUSER|SHUTDOWN|SOME|STATISTICS|SYSTEM_USER|TABLE|TEXTSIZE|THEN|TO|TOP|TRAN|TRANSACTION|TRIGGER|TRUNCATE|TSEQUAL|UNION|UNIQUE|UPDATE|UPDATETEXT|USE|USER|VALUES|VARYING|VIEW|WAITFOR|WHEN|WHERE|WHILE|WITH|WRITETEXT)(?=[^\w-]|$)/i, null],
+ // A number is a hex integer literal, a decimal real literal, or in
+ // scientific notation.
+ [PR.PR_LITERAL,
+ /^[+-]?(?:0x[\da-f]+|(?:(?:\.\d+|\d+(?:\.\d*)?)(?:e[+\-]?\d+)?))/i],
+ // An identifier
+ [PR.PR_PLAIN, /^[a-z_][\w-]*/i],
+ // A run of punctuation
+ [PR.PR_PUNCTUATION, /^[^\w\t\n\r \xA0\"\'][^\w\t\n\r \xA0+\-\"\']*/]
+ ]),
+ ['sql']);
diff --git a/website/public/prettify/lang-vb.js b/website/public/prettify/lang-vb.js
new file mode 100644
index 0000000..a38db45
--- /dev/null
+++ b/website/public/prettify/lang-vb.js
@@ -0,0 +1,61 @@
+// Copyright (C) 2009 Google Inc.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+
+/**
+ * @fileoverview
+ * Registers a language handler for various flavors of basic.
+ *
+ *
+ * To use, include prettify.js and this file in your HTML page.
+ * Then put your code in an HTML tag like
+ * <pre class="prettyprint lang-vb"></pre>
+ *
+ *
+ * http://msdn.microsoft.com/en-us/library/aa711638(VS.71).aspx defines the
+ * visual basic grammar lexical grammar.
+ *
+ * @author mikesamuel@gmail.com
+ */
+
+PR.registerLangHandler(
+ PR.createSimpleLexer(
+ [
+ // Whitespace
+ [PR.PR_PLAIN, /^[\t\n\r \xA0\u2028\u2029]+/, null, '\t\n\r \xA0\u2028\u2029'],
+ // A double quoted string with quotes escaped by doubling them.
+ // A single character can be suffixed with C.
+ [PR.PR_STRING, /^(?:[\"\u201C\u201D](?:[^\"\u201C\u201D]|[\"\u201C\u201D]{2})(?:[\"\u201C\u201D]c|$)|[\"\u201C\u201D](?:[^\"\u201C\u201D]|[\"\u201C\u201D]{2})*(?:[\"\u201C\u201D]|$))/i, null,
+ '"\u201C\u201D'],
+ // A comment starts with a single quote and runs until the end of the
+ // line.
+ [PR.PR_COMMENT, /^[\'\u2018\u2019][^\r\n\u2028\u2029]*/, null, '\'\u2018\u2019']
+ ],
+ [
+ [PR.PR_KEYWORD, /^(?:AddHandler|AddressOf|Alias|And|AndAlso|Ansi|As|Assembly|Auto|Boolean|ByRef|Byte|ByVal|Call|Case|Catch|CBool|CByte|CChar|CDate|CDbl|CDec|Char|CInt|Class|CLng|CObj|Const|CShort|CSng|CStr|CType|Date|Decimal|Declare|Default|Delegate|Dim|DirectCast|Do|Double|Each|Else|ElseIf|End|EndIf|Enum|Erase|Error|Event|Exit|Finally|For|Friend|Function|Get|GetType|GoSub|GoTo|Handles|If|Implements|Imports|In|Inherits|Integer|Interface|Is|Let|Lib|Like|Long|Loop|Me|Mod|Module|MustInherit|MustOverride|MyBase|MyClass|Namespace|New|Next|Not|NotInheritable|NotOverridable|Object|On|Option|Optional|Or|OrElse|Overloads|Overridable|Overrides|ParamArray|Preserve|Private|Property|Protected|Public|RaiseEvent|ReadOnly|ReDim|RemoveHandler|Resume|Return|Select|Set|Shadows|Shared|Short|Single|Static|Step|Stop|String|Structure|Sub|SyncLock|Then|Throw|To|Try|TypeOf|Unicode|Until|Variant|Wend|When|While|With|WithEvents|WriteOnly|Xor|EndIf|GoSub|Let|Variant|Wend)\b/i, null],
+ // A second comment form
+ [PR.PR_COMMENT, /^REM[^\r\n\u2028\u2029]*/i],
+ // A boolean, numeric, or date literal.
+ [PR.PR_LITERAL,
+ /^(?:True\b|False\b|Nothing\b|\d+(?:E[+\-]?\d+[FRD]?|[FRDSIL])?|(?:&H[0-9A-F]+|&O[0-7]+)[SIL]?|\d*\.\d+(?:E[+\-]?\d+)?[FRD]?|#\s+(?:\d+[\-\/]\d+[\-\/]\d+(?:\s+\d+:\d+(?::\d+)?(\s*(?:AM|PM))?)?|\d+:\d+(?::\d+)?(\s*(?:AM|PM))?)\s+#)/i],
+ // An identifier?
+ [PR.PR_PLAIN, /^(?:(?:[a-z]|_\w)\w*|\[(?:[a-z]|_\w)\w*\])/i],
+ // A run of punctuation
+ [PR.PR_PUNCTUATION,
+ /^[^\w\t\n\r \"\'\[\]\xA0\u2018\u2019\u201C\u201D\u2028\u2029]+/],
+ // Square brackets
+ [PR.PR_PUNCTUATION, /^(?:\[|\])/]
+ ]),
+ ['vb', 'vbs']);
diff --git a/website/public/prettify/lang-vhdl.js b/website/public/prettify/lang-vhdl.js
new file mode 100644
index 0000000..9c4921c
--- /dev/null
+++ b/website/public/prettify/lang-vhdl.js
@@ -0,0 +1,34 @@
+/**
+ * @fileoverview
+ * Registers a language handler for VHDL '93.
+ *
+ * Based on the lexical grammar and keywords at
+ * http://www.iis.ee.ethz.ch/~zimmi/download/vhdl93_syntax.html
+ *
+ * @author benoit@ryder.fr
+ */
+
+PR.registerLangHandler(
+ PR.createSimpleLexer(
+ [
+ // Whitespace
+ [PR.PR_PLAIN, /^[\t\n\r \xA0]+/, null, '\t\n\r \xA0']
+ ],
+ [
+ // String, character or bit string
+ [PR.PR_STRING, /^(?:[BOX]?"(?:[^\"]|"")*"|'.')/i],
+ // Comment, from two dashes until end of line.
+ [PR.PR_COMMENT, /^--[^\r\n]*/],
+ [PR.PR_KEYWORD, /^(?:abs|access|after|alias|all|and|architecture|array|assert|attribute|begin|block|body|buffer|bus|case|component|configuration|constant|disconnect|downto|else|elsif|end|entity|exit|file|for|function|generate|generic|group|guarded|if|impure|in|inertial|inout|is|label|library|linkage|literal|loop|map|mod|nand|new|next|nor|not|null|of|on|open|or|others|out|package|port|postponed|procedure|process|pure|range|record|register|reject|rem|report|return|rol|ror|select|severity|shared|signal|sla|sll|sra|srl|subtype|then|to|transport|type|unaffected|units|until|use|variable|wait|when|while|with|xnor|xor)(?=[^\w-]|$)/i, null],
+ // Type, predefined or standard
+ [PR.PR_TYPE, /^(?:bit|bit_vector|character|boolean|integer|real|time|string|severity_level|positive|natural|signed|unsigned|line|text|std_u?logic(?:_vector)?)(?=[^\w-]|$)/i, null],
+ // Predefined attributes
+ [PR.PR_TYPE, /^\'(?:ACTIVE|ASCENDING|BASE|DELAYED|DRIVING|DRIVING_VALUE|EVENT|HIGH|IMAGE|INSTANCE_NAME|LAST_ACTIVE|LAST_EVENT|LAST_VALUE|LEFT|LEFTOF|LENGTH|LOW|PATH_NAME|POS|PRED|QUIET|RANGE|REVERSE_RANGE|RIGHT|RIGHTOF|SIMPLE_NAME|STABLE|SUCC|TRANSACTION|VAL|VALUE)(?=[^\w-]|$)/i, null],
+ // Number, decimal or based literal
+ [PR.PR_LITERAL, /^\d+(?:_\d+)*(?:#[\w\\.]+#(?:[+\-]?\d+(?:_\d+)*)?|(?:\.\d+(?:_\d+)*)?(?:E[+\-]?\d+(?:_\d+)*)?)/i],
+ // Identifier, basic or extended
+ [PR.PR_PLAIN, /^(?:[a-z]\w*|\\[^\\]*\\)/i],
+ // Punctuation
+ [PR.PR_PUNCTUATION, /^[^\w\t\n\r \xA0\"\'][^\w\t\n\r \xA0\-\"\']*/]
+ ]),
+ ['vhdl', 'vhd']);
diff --git a/website/public/prettify/lang-wiki.js b/website/public/prettify/lang-wiki.js
new file mode 100644
index 0000000..d4aa350
--- /dev/null
+++ b/website/public/prettify/lang-wiki.js
@@ -0,0 +1,53 @@
+// Copyright (C) 2009 Google Inc.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/**
+ * @fileoverview
+ * Registers a language handler for Wiki pages.
+ *
+ * Based on WikiSyntax at http://code.google.com/p/support/wiki/WikiSyntax
+ *
+ * @author mikesamuel@gmail.com
+ */
+
+PR.registerLangHandler(
+ PR.createSimpleLexer(
+ [
+ // Whitespace
+ [PR.PR_PLAIN, /^[\t \xA0a-gi-z0-9]+/, null,
+ '\t \xA0abcdefgijklmnopqrstuvwxyz0123456789'],
+ // Wiki formatting
+ [PR.PR_PUNCTUATION, /^[=*~\^\[\]]+/, null, '=*~^[]']
+ ],
+ [
+ // Meta-info like #summary, #labels, etc.
+ ['lang-wiki.meta', /(?:^^|\r\n?|\n)(#[a-z]+)\b/],
+ // A WikiWord
+ [PR.PR_LITERAL, /^(?:[A-Z][a-z][a-z0-9]+[A-Z][a-z][a-zA-Z0-9]+)\b/
+ ],
+ // A preformatted block in an unknown language
+ ['lang-', /^\{\{\{([\s\S]+?)\}\}\}/],
+ // A block of source code in an unknown language
+ ['lang-', /^`([^\r\n`]+)`/],
+ // An inline URL.
+ [PR.PR_STRING,
+ /^https?:\/\/[^\/?#\s]*(?:\/[^?#\s]*)?(?:\?[^#\s]*)?(?:#\S*)?/i],
+ [PR.PR_PLAIN, /^(?:\r\n|[\s\S])[^#=*~^A-Zh\{`\[\r\n]*/]
+ ]),
+ ['wiki']);
+
+PR.registerLangHandler(
+ PR.createSimpleLexer([[PR.PR_KEYWORD, /^#[a-z]+/i, null, '#']], []),
+ ['wiki.meta']);
diff --git a/website/public/prettify/lang-yaml.js b/website/public/prettify/lang-yaml.js
new file mode 100644
index 0000000..271139f
--- /dev/null
+++ b/website/public/prettify/lang-yaml.js
@@ -0,0 +1,27 @@
+// Contributed by ribrdb @ code.google.com
+
+/**
+ * @fileoverview
+ * Registers a language handler for YAML.
+ *
+ * @author ribrdb
+ */
+
+PR.registerLangHandler(
+ PR.createSimpleLexer(
+ [
+ [PR.PR_PUNCTUATION, /^[:|>?]+/, null, ':|>?'],
+ [PR.PR_DECLARATION, /^%(?:YAML|TAG)[^#\r\n]+/, null, '%'],
+ [PR.PR_TYPE, /^[&]\S+/, null, '&'],
+ [PR.PR_TYPE, /^!\S*/, null, '!'],
+ [PR.PR_STRING, /^"(?:[^\\"]|\\.)*(?:"|$)/, null, '"'],
+ [PR.PR_STRING, /^'(?:[^']|'')*(?:'|$)/, null, "'"],
+ [PR.PR_COMMENT, /^#[^\r\n]*/, null, '#'],
+ [PR.PR_PLAIN, /^\s+/, null, ' \t\r\n']
+ ],
+ [
+ [PR.PR_DECLARATION, /^(?:---|\.\.\.)(?:[\r\n]|$)/],
+ [PR.PR_PUNCTUATION, /^-/],
+ [PR.PR_KEYWORD, /^\w+:[ \r\n]/],
+ [PR.PR_PLAIN, /^\w+/]
+ ]), ['yaml', 'yml']);
diff --git a/website/public/prettify/prettify.css b/website/public/prettify/prettify.css
new file mode 100644
index 0000000..221bd0c
--- /dev/null
+++ b/website/public/prettify/prettify.css
@@ -0,0 +1,44 @@
+/* Pretty printing styles. Used with prettify.js. */
+
+.str { color: #080; }
+.kwd { color: #008; }
+.com { color: #800; }
+.typ { color: #606; }
+.lit { color: #066; }
+.pun { color: #660; }
+.pln { color: #000; }
+.tag { color: #008; }
+.atn { color: #606; }
+.atv { color: #080; }
+.dec { color: #606; }
+pre.prettyprint { padding: 2px; border: 1px solid #888 }
+
+/* Specify class=linenums on a pre to get line numbering */
+ol.linenums { margin-top: 0; margin-bottom: 0 } /* IE indents via margin-left */
+li.L0,
+li.L1,
+li.L2,
+li.L3,
+li.L5,
+li.L6,
+li.L7,
+li.L8 { list-style-type: none }
+/* Alternate shading for lines */
+li.L1,
+li.L3,
+li.L5,
+li.L7,
+li.L9 { background: #eee }
+
+@media print {
+ .str { color: #060; }
+ .kwd { color: #006; font-weight: bold; }
+ .com { color: #600; font-style: italic; }
+ .typ { color: #404; font-weight: bold; }
+ .lit { color: #044; }
+ .pun { color: #440; }
+ .pln { color: #000; }
+ .tag { color: #006; font-weight: bold; }
+ .atn { color: #404; }
+ .atv { color: #060; }
+}
diff --git a/website/public/prettify/prettify.js b/website/public/prettify/prettify.js
new file mode 100644
index 0000000..75893b9
--- /dev/null
+++ b/website/public/prettify/prettify.js
@@ -0,0 +1,1508 @@
+// Copyright (C) 2006 Google Inc.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+/**
+ * @fileoverview
+ * some functions for browser-side pretty printing of code contained in html.
+ * <p>
+ *
+ * For a fairly comprehensive set of languages see the
+ * <a href="http://google-code-prettify.googlecode.com/svn/trunk/README.html#langs">README</a>
+ * file that came with this source. At a minimum, the lexer should work on a
+ * number of languages including C and friends, Java, Python, Bash, SQL, HTML,
+ * XML, CSS, Javascript, and Makefiles. It works passably on Ruby, PHP and Awk
+ * and a subset of Perl, but, because of commenting conventions, doesn't work on
+ * Smalltalk, Lisp-like, or CAML-like languages without an explicit lang class.
+ * <p>
+ * Usage: <ol>
+ * <li> include this source file in an html page via
+ * {@code <script type="text/javascript" src="/path/to/prettify.js"></script>}
+ * <li> define style rules. See the example page for examples.
+ * <li> mark the {@code <pre>} and {@code <code>} tags in your source with
+ * {@code class=prettyprint.}
+ * You can also use the (html deprecated) {@code <xmp>} tag, but the pretty
+ * printer needs to do more substantial DOM manipulations to support that, so
+ * some css styles may not be preserved.
+ * </ol>
+ * That's it. I wanted to keep the API as simple as possible, so there's no
+ * need to specify which language the code is in, but if you wish, you can add
+ * another class to the {@code <pre>} or {@code <code>} element to specify the
+ * language, as in {@code <pre class="prettyprint lang-java">}. Any class that
+ * starts with "lang-" followed by a file extension, specifies the file type.
+ * See the "lang-*.js" files in this directory for code that implements
+ * per-language file handlers.
+ * <p>
+ * Change log:<br>
+ * cbeust, 2006/08/22
+ * <blockquote>
+ * Java annotations (start with "@") are now captured as literals ("lit")
+ * </blockquote>
+ * @requires console
+ */
+
+// JSLint declarations
+/*global console, document, navigator, setTimeout, window */
+
+/**
+ * Split {@code prettyPrint} into multiple timeouts so as not to interfere with
+ * UI events.
+ * If set to {@code false}, {@code prettyPrint()} is synchronous.
+ */
+window['PR_SHOULD_USE_CONTINUATION'] = true;
+
+/** the number of characters between tab columns */
+window['PR_TAB_WIDTH'] = 8;
+
+/** Walks the DOM returning a properly escaped version of innerHTML.
+ * @param {Node} node
+ * @param {Array.<string>} out output buffer that receives chunks of HTML.
+ */
+window['PR_normalizedHtml']
+
+/** Contains functions for creating and registering new language handlers.
+ * @type {Object}
+ */
+ = window['PR']
+
+/** Pretty print a chunk of code.
+ *
+ * @param {string} sourceCodeHtml code as html
+ * @return {string} code as html, but prettier
+ */
+ = window['prettyPrintOne']
+/** Find all the {@code <pre>} and {@code <code>} tags in the DOM with
+ * {@code class=prettyprint} and prettify them.
+ * @param {Function?} opt_whenDone if specified, called when the last entry
+ * has been finished.
+ */
+ = window['prettyPrint'] = void 0;
+
+/** browser detection. @extern @returns false if not IE, otherwise the major version. */
+window['_pr_isIE6'] = function () {
+ var ieVersion = navigator && navigator.userAgent &&
+ navigator.userAgent.match(/\bMSIE ([678])\./);
+ ieVersion = ieVersion ? +ieVersion[1] : false;
+ window['_pr_isIE6'] = function () { return ieVersion; };
+ return ieVersion;
+};
+
+
+(function () {
+ // Keyword lists for various languages.
+ var FLOW_CONTROL_KEYWORDS =
+ "break continue do else for if return while ";
+ var C_KEYWORDS = FLOW_CONTROL_KEYWORDS + "auto case char const default " +
+ "double enum extern float goto int long register short signed sizeof " +
+ "static struct switch typedef union unsigned void volatile ";
+ var COMMON_KEYWORDS = C_KEYWORDS + "catch class delete false import " +
+ "new operator private protected public this throw true try typeof ";
+ var CPP_KEYWORDS = COMMON_KEYWORDS + "alignof align_union asm axiom bool " +
+ "concept concept_map const_cast constexpr decltype " +
+ "dynamic_cast explicit export friend inline late_check " +
+ "mutable namespace nullptr reinterpret_cast static_assert static_cast " +
+ "template typeid typename using virtual wchar_t where ";
+ var JAVA_KEYWORDS = COMMON_KEYWORDS +
+ "abstract boolean byte extends final finally implements import " +
+ "instanceof null native package strictfp super synchronized throws " +
+ "transient ";
+ var CSHARP_KEYWORDS = JAVA_KEYWORDS +
+ "as base by checked decimal delegate descending event " +
+ "fixed foreach from group implicit in interface internal into is lock " +
+ "object out override orderby params partial readonly ref sbyte sealed " +
+ "stackalloc string select uint ulong unchecked unsafe ushort var ";
+ var JSCRIPT_KEYWORDS = COMMON_KEYWORDS +
+ "debugger eval export function get null set undefined var with " +
+ "Infinity NaN ";
+ var PERL_KEYWORDS = "caller delete die do dump elsif eval exit foreach for " +
+ "goto if import last local my next no our print package redo require " +
+ "sub undef unless until use wantarray while BEGIN END ";
+ var PYTHON_KEYWORDS = FLOW_CONTROL_KEYWORDS + "and as assert class def del " +
+ "elif except exec finally from global import in is lambda " +
+ "nonlocal not or pass print raise try with yield " +
+ "False True None ";
+ var RUBY_KEYWORDS = FLOW_CONTROL_KEYWORDS + "alias and begin case class def" +
+ " defined elsif end ensure false in module next nil not or redo rescue " +
+ "retry self super then true undef unless until when yield BEGIN END ";
+ var SH_KEYWORDS = FLOW_CONTROL_KEYWORDS + "case done elif esac eval fi " +
+ "function in local set then until ";
+ var ALL_KEYWORDS = (
+ CPP_KEYWORDS + CSHARP_KEYWORDS + JSCRIPT_KEYWORDS + PERL_KEYWORDS +
+ PYTHON_KEYWORDS + RUBY_KEYWORDS + SH_KEYWORDS);
+
+ // token style names. correspond to css classes
+ /** token style for a string literal */
+ var PR_STRING = 'str';
+ /** token style for a keyword */
+ var PR_KEYWORD = 'kwd';
+ /** token style for a comment */
+ var PR_COMMENT = 'com';
+ /** token style for a type */
+ var PR_TYPE = 'typ';
+ /** token style for a literal value. e.g. 1, null, true. */
+ var PR_LITERAL = 'lit';
+ /** token style for a punctuation string. */
+ var PR_PUNCTUATION = 'pun';
+ /** token style for a punctuation string. */
+ var PR_PLAIN = 'pln';
+
+ /** token style for an sgml tag. */
+ var PR_TAG = 'tag';
+ /** token style for a markup declaration such as a DOCTYPE. */
+ var PR_DECLARATION = 'dec';
+ /** token style for embedded source. */
+ var PR_SOURCE = 'src';
+ /** token style for an sgml attribute name. */
+ var PR_ATTRIB_NAME = 'atn';
+ /** token style for an sgml attribute value. */
+ var PR_ATTRIB_VALUE = 'atv';
+
+ /**
+ * A class that indicates a section of markup that is not code, e.g. to allow
+ * embedding of line numbers within code listings.
+ */
+ var PR_NOCODE = 'nocode';
+
+ /** A set of tokens that can precede a regular expression literal in
+ * javascript.
+ * http://www.mozilla.org/js/language/js20/rationale/syntax.html has the full
+ * list, but I've removed ones that might be problematic when seen in
+ * languages that don't support regular expression literals.
+ *
+ * <p>Specifically, I've removed any keywords that can't precede a regexp
+ * literal in a syntactically legal javascript program, and I've removed the
+ * "in" keyword since it's not a keyword in many languages, and might be used
+ * as a count of inches.
+ *
+ * <p>The link a above does not accurately describe EcmaScript rules since
+ * it fails to distinguish between (a=++/b/i) and (a++/b/i) but it works
+ * very well in practice.
+ *
+ * @private
+ */
+ var REGEXP_PRECEDER_PATTERN = function () {
+ var preceders = [
+ "!", "!=", "!==", "#", "%", "%=", "&", "&&", "&&=",
+ "&=", "(", "*", "*=", /* "+", */ "+=", ",", /* "-", */ "-=",
+ "->", /*".", "..", "...", handled below */ "/", "/=", ":", "::", ";",
+ "<", "<<", "<<=", "<=", "=", "==", "===", ">",
+ ">=", ">>", ">>=", ">>>", ">>>=", "?", "@", "[",
+ "^", "^=", "^^", "^^=", "{", "|", "|=", "||",
+ "||=", "~" /* handles =~ and !~ */,
+ "break", "case", "continue", "delete",
+ "do", "else", "finally", "instanceof",
+ "return", "throw", "try", "typeof"
+ ];
+ var pattern = '(?:^^|[+-]';
+ for (var i = 0; i < preceders.length; ++i) {
+ pattern += '|' + preceders[i].replace(/([^=<>:&a-z])/g, '\\$1');
+ }
+ pattern += ')\\s*'; // matches at end, and matches empty string
+ return pattern;
+ // CAVEAT: this does not properly handle the case where a regular
+ // expression immediately follows another since a regular expression may
+ // have flags for case-sensitivity and the like. Having regexp tokens
+ // adjacent is not valid in any language I'm aware of, so I'm punting.
+ // TODO: maybe style special characters inside a regexp as punctuation.
+ }();
+
+ // Define regexps here so that the interpreter doesn't have to create an
+ // object each time the function containing them is called.
+ // The language spec requires a new object created even if you don't access
+ // the $1 members.
+ var pr_amp = /&/g;
+ var pr_lt = /</g;
+ var pr_gt = />/g;
+ var pr_quot = /\"/g;
+ /** like textToHtml but escapes double quotes to be attribute safe. */
+ function attribToHtml(str) {
+ return str.replace(pr_amp, '&')
+ .replace(pr_lt, '<')
+ .replace(pr_gt, '>')
+ .replace(pr_quot, '"');
+ }
+
+ /** escapest html special characters to html. */
+ function textToHtml(str) {
+ return str.replace(pr_amp, '&')
+ .replace(pr_lt, '<')
+ .replace(pr_gt, '>');
+ }
+
+
+ var pr_ltEnt = /</g;
+ var pr_gtEnt = />/g;
+ var pr_aposEnt = /'/g;
+ var pr_quotEnt = /"/g;
+ var pr_ampEnt = /&/g;
+ var pr_nbspEnt = / /g;
+ /** unescapes html to plain text. */
+ function htmlToText(html) {
+ var pos = html.indexOf('&');
+ if (pos < 0) { return html; }
+ // Handle numeric entities specially. We can't use functional substitution
+ // since that doesn't work in older versions of Safari.
+ // These should be rare since most browsers convert them to normal chars.
+ for (--pos; (pos = html.indexOf('&#', pos + 1)) >= 0;) {
+ var end = html.indexOf(';', pos);
+ if (end >= 0) {
+ var num = html.substring(pos + 3, end);
+ var radix = 10;
+ if (num && num.charAt(0) === 'x') {
+ num = num.substring(1);
+ radix = 16;
+ }
+ var codePoint = parseInt(num, radix);
+ if (!isNaN(codePoint)) {
+ html = (html.substring(0, pos) + String.fromCharCode(codePoint) +
+ html.substring(end + 1));
+ }
+ }
+ }
+
+ return html.replace(pr_ltEnt, '<')
+ .replace(pr_gtEnt, '>')
+ .replace(pr_aposEnt, "'")
+ .replace(pr_quotEnt, '"')
+ .replace(pr_nbspEnt, ' ')
+ .replace(pr_ampEnt, '&');
+ }
+
+ /** is the given node's innerHTML normally unescaped? */
+ function isRawContent(node) {
+ return 'XMP' === node.tagName;
+ }
+
+ var newlineRe = /[\r\n]/g;
+ /**
+ * Are newlines and adjacent spaces significant in the given node's innerHTML?
+ */
+ function isPreformatted(node, content) {
+ // PRE means preformatted, and is a very common case, so don't create
+ // unnecessary computed style objects.
+ if ('PRE' === node.tagName) { return true; }
+ if (!newlineRe.test(content)) { return true; } // Don't care
+ var whitespace = '';
+ // For disconnected nodes, IE has no currentStyle.
+ if (node.currentStyle) {
+ whitespace = node.currentStyle.whiteSpace;
+ } else if (window.getComputedStyle) {
+ // Firefox makes a best guess if node is disconnected whereas Safari
+ // returns the empty string.
+ whitespace = window.getComputedStyle(node, null).whiteSpace;
+ }
+ return !whitespace || whitespace === 'pre';
+ }
+
+ function normalizedHtml(node, out, opt_sortAttrs) {
+ switch (node.nodeType) {
+ case 1: // an element
+ var name = node.tagName.toLowerCase();
+
+ out.push('<', name);
+ var attrs = node.attributes;
+ var n = attrs.length;
+ if (n) {
+ if (opt_sortAttrs) {
+ var sortedAttrs = [];
+ for (var i = n; --i >= 0;) { sortedAttrs[i] = attrs[i]; }
+ sortedAttrs.sort(function (a, b) {
+ return (a.name < b.name) ? -1 : a.name === b.name ? 0 : 1;
+ });
+ attrs = sortedAttrs;
+ }
+ for (var i = 0; i < n; ++i) {
+ var attr = attrs[i];
+ if (!attr.specified) { continue; }
+ out.push(' ', attr.name.toLowerCase(),
+ '="', attribToHtml(attr.value), '"');
+ }
+ }
+ out.push('>');
+ for (var child = node.firstChild; child; child = child.nextSibling) {
+ normalizedHtml(child, out, opt_sortAttrs);
+ }
+ if (node.firstChild || !/^(?:br|link|img)$/.test(name)) {
+ out.push('<\/', name, '>');
+ }
+ break;
+ case 3: case 4: // text
+ out.push(textToHtml(node.nodeValue));
+ break;
+ }
+ }
+
+ /**
+ * Given a group of {@link RegExp}s, returns a {@code RegExp} that globally
+ * matches the union o the sets o strings matched d by the input RegExp.
+ * Since it matches globally, if the input strings have a start-of-input
+ * anchor (/^.../), it is ignored for the purposes of unioning.
+ * @param {Array.<RegExp>} regexs non multiline, non-global regexs.
+ * @return {RegExp} a global regex.
+ */
+ function combinePrefixPatterns(regexs) {
+ var capturedGroupIndex = 0;
+
+ var needToFoldCase = false;
+ var ignoreCase = false;
+ for (var i = 0, n = regexs.length; i < n; ++i) {
+ var regex = regexs[i];
+ if (regex.ignoreCase) {
+ ignoreCase = true;
+ } else if (/[a-z]/i.test(regex.source.replace(
+ /\\u[0-9a-f]{4}|\\x[0-9a-f]{2}|\\[^ux]/gi, ''))) {
+ needToFoldCase = true;
+ ignoreCase = false;
+ break;
+ }
+ }
+
+ function decodeEscape(charsetPart) {
+ if (charsetPart.charAt(0) !== '\\') { return charsetPart.charCodeAt(0); }
+ switch (charsetPart.charAt(1)) {
+ case 'b': return 8;
+ case 't': return 9;
+ case 'n': return 0xa;
+ case 'v': return 0xb;
+ case 'f': return 0xc;
+ case 'r': return 0xd;
+ case 'u': case 'x':
+ return parseInt(charsetPart.substring(2), 16)
+ || charsetPart.charCodeAt(1);
+ case '0': case '1': case '2': case '3': case '4':
+ case '5': case '6': case '7':
+ return parseInt(charsetPart.substring(1), 8);
+ default: return charsetPart.charCodeAt(1);
+ }
+ }
+
+ function encodeEscape(charCode) {
+ if (charCode < 0x20) {
+ return (charCode < 0x10 ? '\\x0' : '\\x') + charCode.toString(16);
+ }
+ var ch = String.fromCharCode(charCode);
+ if (ch === '\\' || ch === '-' || ch === '[' || ch === ']') {
+ ch = '\\' + ch;
+ }
+ return ch;
+ }
+
+ function caseFoldCharset(charSet) {
+ var charsetParts = charSet.substring(1, charSet.length - 1).match(
+ new RegExp(
+ '\\\\u[0-9A-Fa-f]{4}'
+ + '|\\\\x[0-9A-Fa-f]{2}'
+ + '|\\\\[0-3][0-7]{0,2}'
+ + '|\\\\[0-7]{1,2}'
+ + '|\\\\[\\s\\S]'
+ + '|-'
+ + '|[^-\\\\]',
+ 'g'));
+ var groups = [];
+ var ranges = [];
+ var inverse = charsetParts[0] === '^';
+ for (var i = inverse ? 1 : 0, n = charsetParts.length; i < n; ++i) {
+ var p = charsetParts[i];
+ switch (p) {
+ case '\\B': case '\\b':
+ case '\\D': case '\\d':
+ case '\\S': case '\\s':
+ case '\\W': case '\\w':
+ groups.push(p);
+ continue;
+ }
+ var start = decodeEscape(p);
+ var end;
+ if (i + 2 < n && '-' === charsetParts[i + 1]) {
+ end = decodeEscape(charsetParts[i + 2]);
+ i += 2;
+ } else {
+ end = start;
+ }
+ ranges.push([start, end]);
+ // If the range might intersect letters, then expand it.
+ if (!(end < 65 || start > 122)) {
+ if (!(end < 65 || start > 90)) {
+ ranges.push([Math.max(65, start) | 32, Math.min(end, 90) | 32]);
+ }
+ if (!(end < 97 || start > 122)) {
+ ranges.push([Math.max(97, start) & ~32, Math.min(end, 122) & ~32]);
+ }
+ }
+ }
+
+ // [[1, 10], [3, 4], [8, 12], [14, 14], [16, 16], [17, 17]]
+ // -> [[1, 12], [14, 14], [16, 17]]
+ ranges.sort(function (a, b) { return (a[0] - b[0]) || (b[1] - a[1]); });
+ var consolidatedRanges = [];
+ var lastRange = [NaN, NaN];
+ for (var i = 0; i < ranges.length; ++i) {
+ var range = ranges[i];
+ if (range[0] <= lastRange[1] + 1) {
+ lastRange[1] = Math.max(lastRange[1], range[1]);
+ } else {
+ consolidatedRanges.push(lastRange = range);
+ }
+ }
+
+ var out = ['['];
+ if (inverse) { out.push('^'); }
+ out.push.apply(out, groups);
+ for (var i = 0; i < consolidatedRanges.length; ++i) {
+ var range = consolidatedRanges[i];
+ out.push(encodeEscape(range[0]));
+ if (range[1] > range[0]) {
+ if (range[1] + 1 > range[0]) { out.push('-'); }
+ out.push(encodeEscape(range[1]));
+ }
+ }
+ out.push(']');
+ return out.join('');
+ }
+
+ function allowAnywhereFoldCaseAndRenumberGroups(regex) {
+ // Split into character sets, escape sequences, punctuation strings
+ // like ('(', '(?:', ')', '^'), and runs of characters that do not
+ // include any of the above.
+ var parts = regex.source.match(
+ new RegExp(
+ '(?:'
+ + '\\[(?:[^\\x5C\\x5D]|\\\\[\\s\\S])*\\]' // a character set
+ + '|\\\\u[A-Fa-f0-9]{4}' // a unicode escape
+ + '|\\\\x[A-Fa-f0-9]{2}' // a hex escape
+ + '|\\\\[0-9]+' // a back-reference or octal escape
+ + '|\\\\[^ux0-9]' // other escape sequence
+ + '|\\(\\?[:!=]' // start of a non-capturing group
+ + '|[\\(\\)\\^]' // start/emd of a group, or line start
+ + '|[^\\x5B\\x5C\\(\\)\\^]+' // run of other characters
+ + ')',
+ 'g'));
+ var n = parts.length;
+
+ // Maps captured group numbers to the number they will occupy in
+ // the output or to -1 if that has not been determined, or to
+ // undefined if they need not be capturing in the output.
+ var capturedGroups = [];
+
+ // Walk over and identify back references to build the capturedGroups
+ // mapping.
+ for (var i = 0, groupIndex = 0; i < n; ++i) {
+ var p = parts[i];
+ if (p === '(') {
+ // groups are 1-indexed, so max group index is count of '('
+ ++groupIndex;
+ } else if ('\\' === p.charAt(0)) {
+ var decimalValue = +p.substring(1);
+ if (decimalValue && decimalValue <= groupIndex) {
+ capturedGroups[decimalValue] = -1;
+ }
+ }
+ }
+
+ // Renumber groups and reduce capturing groups to non-capturing groups
+ // where possible.
+ for (var i = 1; i < capturedGroups.length; ++i) {
+ if (-1 === capturedGroups[i]) {
+ capturedGroups[i] = ++capturedGroupIndex;
+ }
+ }
+ for (var i = 0, groupIndex = 0; i < n; ++i) {
+ var p = parts[i];
+ if (p === '(') {
+ ++groupIndex;
+ if (capturedGroups[groupIndex] === undefined) {
+ parts[i] = '(?:';
+ }
+ } else if ('\\' === p.charAt(0)) {
+ var decimalValue = +p.substring(1);
+ if (decimalValue && decimalValue <= groupIndex) {
+ parts[i] = '\\' + capturedGroups[groupIndex];
+ }
+ }
+ }
+
+ // Remove any prefix anchors so that the output will match anywhere.
+ // ^^ really does mean an anchored match though.
+ for (var i = 0, groupIndex = 0; i < n; ++i) {
+ if ('^' === parts[i] && '^' !== parts[i + 1]) { parts[i] = ''; }
+ }
+
+ // Expand letters to groupts to handle mixing of case-sensitive and
+ // case-insensitive patterns if necessary.
+ if (regex.ignoreCase && needToFoldCase) {
+ for (var i = 0; i < n; ++i) {
+ var p = parts[i];
+ var ch0 = p.charAt(0);
+ if (p.length >= 2 && ch0 === '[') {
+ parts[i] = caseFoldCharset(p);
+ } else if (ch0 !== '\\') {
+ // TODO: handle letters in numeric escapes.
+ parts[i] = p.replace(
+ /[a-zA-Z]/g,
+ function (ch) {
+ var cc = ch.charCodeAt(0);
+ return '[' + String.fromCharCode(cc & ~32, cc | 32) + ']';
+ });
+ }
+ }
+ }
+
+ return parts.join('');
+ }
+
+ var rewritten = [];
+ for (var i = 0, n = regexs.length; i < n; ++i) {
+ var regex = regexs[i];
+ if (regex.global || regex.multiline) { throw new Error('' + regex); }
+ rewritten.push(
+ '(?:' + allowAnywhereFoldCaseAndRenumberGroups(regex) + ')');
+ }
+
+ return new RegExp(rewritten.join('|'), ignoreCase ? 'gi' : 'g');
+ }
+
+ var PR_innerHtmlWorks = null;
+ function getInnerHtml(node) {
+ // inner html is hopelessly broken in Safari 2.0.4 when the content is
+ // an html description of well formed XML and the containing tag is a PRE
+ // tag, so we detect that case and emulate innerHTML.
+ if (null === PR_innerHtmlWorks) {
+ var testNode = document.createElement('PRE');
+ testNode.appendChild(
+ document.createTextNode('<!DOCTYPE foo PUBLIC "foo bar">\n<foo />'));
+ PR_innerHtmlWorks = !/</.test(testNode.innerHTML);
+ }
+
+ if (PR_innerHtmlWorks) {
+ var content = node.innerHTML;
+ // XMP tags contain unescaped entities so require special handling.
+ if (isRawContent(node)) {
+ content = textToHtml(content);
+ } else if (!isPreformatted(node, content)) {
+ content = content.replace(/(<br\s*\/?>)[\r\n]+/g, '$1')
+ .replace(/(?:[\r\n]+[ \t]*)+/g, ' ');
+ }
+ return content;
+ }
+
+ var out = [];
+ for (var child = node.firstChild; child; child = child.nextSibling) {
+ normalizedHtml(child, out);
+ }
+ return out.join('');
+ }
+
+ /** returns a function that expand tabs to spaces. This function can be fed
+ * successive chunks of text, and will maintain its own internal state to
+ * keep track of how tabs are expanded.
+ * @return {function (string) : string} a function that takes
+ * plain text and return the text with tabs expanded.
+ * @private
+ */
+ function makeTabExpander(tabWidth) {
+ var SPACES = ' ';
+ var charInLine = 0;
+
+ return function (plainText) {
+ // walk over each character looking for tabs and newlines.
+ // On tabs, expand them. On newlines, reset charInLine.
+ // Otherwise increment charInLine
+ var out = null;
+ var pos = 0;
+ for (var i = 0, n = plainText.length; i < n; ++i) {
+ var ch = plainText.charAt(i);
+
+ switch (ch) {
+ case '\t':
+ if (!out) { out = []; }
+ out.push(plainText.substring(pos, i));
+ // calculate how much space we need in front of this part
+ // nSpaces is the amount of padding -- the number of spaces needed
+ // to move us to the next column, where columns occur at factors of
+ // tabWidth.
+ var nSpaces = tabWidth - (charInLine % tabWidth);
+ charInLine += nSpaces;
+ for (; nSpaces >= 0; nSpaces -= SPACES.length) {
+ out.push(SPACES.substring(0, nSpaces));
+ }
+ pos = i + 1;
+ break;
+ case '\n':
+ charInLine = 0;
+ break;
+ default:
+ ++charInLine;
+ }
+ }
+ if (!out) { return plainText; }
+ out.push(plainText.substring(pos));
+ return out.join('');
+ };
+ }
+
+ var pr_chunkPattern = new RegExp(
+ '[^<]+' // A run of characters other than '<'
+ + '|<\!--[\\s\\S]*?--\>' // an HTML comment
+ + '|<!\\[CDATA\\[[\\s\\S]*?\\]\\]>' // a CDATA section
+ // a probable tag that should not be highlighted
+ + '|<\/?[a-zA-Z](?:[^>\"\']|\'[^\']*\'|\"[^\"]*\")*>'
+ + '|<', // A '<' that does not begin a larger chunk
+ 'g');
+ var pr_commentPrefix = /^<\!--/;
+ var pr_cdataPrefix = /^<!\[CDATA\[/;
+ var pr_brPrefix = /^<br\b/i;
+ var pr_tagNameRe = /^<(\/?)([a-zA-Z][a-zA-Z0-9]*)/;
+
+ /** split markup into chunks of html tags (style null) and
+ * plain text (style {@link #PR_PLAIN}), converting tags which are
+ * significant for tokenization (<br>) into their textual equivalent.
+ *
+ * @param {string} s html where whitespace is considered significant.
+ * @return {Object} source code and extracted tags.
+ * @private
+ */
+ function extractTags(s) {
+ // since the pattern has the 'g' modifier and defines no capturing groups,
+ // this will return a list of all chunks which we then classify and wrap as
+ // PR_Tokens
+ var matches = s.match(pr_chunkPattern);
+ var sourceBuf = [];
+ var sourceBufLen = 0;
+ var extractedTags = [];
+ if (matches) {
+ for (var i = 0, n = matches.length; i < n; ++i) {
+ var match = matches[i];
+ if (match.length > 1 && match.charAt(0) === '<') {
+ if (pr_commentPrefix.test(match)) { continue; }
+ if (pr_cdataPrefix.test(match)) {
+ // strip CDATA prefix and suffix. Don't unescape since it's CDATA
+ sourceBuf.push(match.substring(9, match.length - 3));
+ sourceBufLen += match.length - 12;
+ } else if (pr_brPrefix.test(match)) {
+ // <br> tags are lexically significant so convert them to text.
+ // This is undone later.
+ sourceBuf.push('\n');
+ ++sourceBufLen;
+ } else {
+ if (match.indexOf(PR_NOCODE) >= 0 && isNoCodeTag(match)) {
+ // A <span class="nocode"> will start a section that should be
+ // ignored. Continue walking the list until we see a matching end
+ // tag.
+ var name = match.match(pr_tagNameRe)[2];
+ var depth = 1;
+ var j;
+ end_tag_loop:
+ for (j = i + 1; j < n; ++j) {
+ var name2 = matches[j].match(pr_tagNameRe);
+ if (name2 && name2[2] === name) {
+ if (name2[1] === '/') {
+ if (--depth === 0) { break end_tag_loop; }
+ } else {
+ ++depth;
+ }
+ }
+ }
+ if (j < n) {
+ extractedTags.push(
+ sourceBufLen, matches.slice(i, j + 1).join(''));
+ i = j;
+ } else { // Ignore unclosed sections.
+ extractedTags.push(sourceBufLen, match);
+ }
+ } else {
+ extractedTags.push(sourceBufLen, match);
+ }
+ }
+ } else {
+ var literalText = htmlToText(match);
+ sourceBuf.push(literalText);
+ sourceBufLen += literalText.length;
+ }
+ }
+ }
+ return { source: sourceBuf.join(''), tags: extractedTags };
+ }
+
+ /** True if the given tag contains a class attribute with the nocode class. */
+ function isNoCodeTag(tag) {
+ return !!tag
+ // First canonicalize the representation of attributes
+ .replace(/\s(\w+)\s*=\s*(?:\"([^\"]*)\"|'([^\']*)'|(\S+))/g,
+ ' $1="$2$3$4"')
+ // Then look for the attribute we want.
+ .match(/[cC][lL][aA][sS][sS]=\"[^\"]*\bnocode\b/);
+ }
+
+ /**
+ * Apply the given language handler to sourceCode and add the resulting
+ * decorations to out.
+ * @param {number} basePos the index of sourceCode within the chunk of source
+ * whose decorations are already present on out.
+ */
+ function appendDecorations(basePos, sourceCode, langHandler, out) {
+ if (!sourceCode) { return; }
+ var job = {
+ source: sourceCode,
+ basePos: basePos
+ };
+ langHandler(job);
+ out.push.apply(out, job.decorations);
+ }
+
+ /** Given triples of [style, pattern, context] returns a lexing function,
+ * The lexing function interprets the patterns to find token boundaries and
+ * returns a decoration list of the form
+ * [index_0, style_0, index_1, style_1, ..., index_n, style_n]
+ * where index_n is an index into the sourceCode, and style_n is a style
+ * constant like PR_PLAIN. index_n-1 <= index_n, and style_n-1 applies to
+ * all characters in sourceCode[index_n-1:index_n].
+ *
+ * The stylePatterns is a list whose elements have the form
+ * [style : string, pattern : RegExp, DEPRECATED, shortcut : string].
+ *
+ * Style is a style constant like PR_PLAIN, or can be a string of the
+ * form 'lang-FOO', where FOO is a language extension describing the
+ * language of the portion of the token in $1 after pattern executes.
+ * E.g., if style is 'lang-lisp', and group 1 contains the text
+ * '(hello (world))', then that portion of the token will be passed to the
+ * registered lisp handler for formatting.
+ * The text before and after group 1 will be restyled using this decorator
+ * so decorators should take care that this doesn't result in infinite
+ * recursion. For example, the HTML lexer rule for SCRIPT elements looks
+ * something like ['lang-js', /<[s]cript>(.+?)<\/script>/]. This may match
+ * '<script>foo()<\/script>', which would cause the current decorator to
+ * be called with '<script>' which would not match the same rule since
+ * group 1 must not be empty, so it would be instead styled as PR_TAG by
+ * the generic tag rule. The handler registered for the 'js' extension would
+ * then be called with 'foo()', and finally, the current decorator would
+ * be called with '<\/script>' which would not match the original rule and
+ * so the generic tag rule would identify it as a tag.
+ *
+ * Pattern must only match prefixes, and if it matches a prefix, then that
+ * match is considered a token with the same style.
+ *
+ * Context is applied to the last non-whitespace, non-comment token
+ * recognized.
+ *
+ * Shortcut is an optional string of characters, any of which, if the first
+ * character, gurantee that this pattern and only this pattern matches.
+ *
+ * @param {Array} shortcutStylePatterns patterns that always start with
+ * a known character. Must have a shortcut string.
+ * @param {Array} fallthroughStylePatterns patterns that will be tried in
+ * order if the shortcut ones fail. May have shortcuts.
+ *
+ * @return {function (Object)} a
+ * function that takes source code and returns a list of decorations.
+ */
+ function createSimpleLexer(shortcutStylePatterns, fallthroughStylePatterns) {
+ var shortcuts = {};
+ var tokenizer;
+ (function () {
+ var allPatterns = shortcutStylePatterns.concat(fallthroughStylePatterns);
+ var allRegexs = [];
+ var regexKeys = {};
+ for (var i = 0, n = allPatterns.length; i < n; ++i) {
+ var patternParts = allPatterns[i];
+ var shortcutChars = patternParts[3];
+ if (shortcutChars) {
+ for (var c = shortcutChars.length; --c >= 0;) {
+ shortcuts[shortcutChars.charAt(c)] = patternParts;
+ }
+ }
+ var regex = patternParts[1];
+ var k = '' + regex;
+ if (!regexKeys.hasOwnProperty(k)) {
+ allRegexs.push(regex);
+ regexKeys[k] = null;
+ }
+ }
+ allRegexs.push(/[\0-\uffff]/);
+ tokenizer = combinePrefixPatterns(allRegexs);
+ })();
+
+ var nPatterns = fallthroughStylePatterns.length;
+ var notWs = /\S/;
+
+ /**
+ * Lexes job.source and produces an output array job.decorations of style
+ * classes preceded by the position at which they start in job.source in
+ * order.
+ *
+ * @param {Object} job an object like {@code
+ * source: {string} sourceText plain text,
+ * basePos: {int} position of job.source in the larger chunk of
+ * sourceCode.
+ * }
+ */
+ var decorate = function (job) {
+ var sourceCode = job.source, basePos = job.basePos;
+ /** Even entries are positions in source in ascending order. Odd enties
+ * are style markers (e.g., PR_COMMENT) that run from that position until
+ * the end.
+ * @type {Array.<number|string>}
+ */
+ var decorations = [basePos, PR_PLAIN];
+ var pos = 0; // index into sourceCode
+ var tokens = sourceCode.match(tokenizer) || [];
+ var styleCache = {};
+
+ for (var ti = 0, nTokens = tokens.length; ti < nTokens; ++ti) {
+ var token = tokens[ti];
+ var style = styleCache[token];
+ var match = void 0;
+
+ var isEmbedded;
+ if (typeof style === 'string') {
+ isEmbedded = false;
+ } else {
+ var patternParts = shortcuts[token.charAt(0)];
+ if (patternParts) {
+ match = token.match(patternParts[1]);
+ style = patternParts[0];
+ } else {
+ for (var i = 0; i < nPatterns; ++i) {
+ patternParts = fallthroughStylePatterns[i];
+ match = token.match(patternParts[1]);
+ if (match) {
+ style = patternParts[0];
+ break;
+ }
+ }
+
+ if (!match) { // make sure that we make progress
+ style = PR_PLAIN;
+ }
+ }
+
+ isEmbedded = style.length >= 5 && 'lang-' === style.substring(0, 5);
+ if (isEmbedded && !(match && typeof match[1] === 'string')) {
+ isEmbedded = false;
+ style = PR_SOURCE;
+ }
+
+ if (!isEmbedded) { styleCache[token] = style; }
+ }
+
+ var tokenStart = pos;
+ pos += token.length;
+
+ if (!isEmbedded) {
+ decorations.push(basePos + tokenStart, style);
+ } else { // Treat group 1 as an embedded block of source code.
+ var embeddedSource = match[1];
+ var embeddedSourceStart = token.indexOf(embeddedSource);
+ var embeddedSourceEnd = embeddedSourceStart + embeddedSource.length;
+ if (match[2]) {
+ // If embeddedSource can be blank, then it would match at the
+ // beginning which would cause us to infinitely recurse on the
+ // entire token, so we catch the right context in match[2].
+ embeddedSourceEnd = token.length - match[2].length;
+ embeddedSourceStart = embeddedSourceEnd - embeddedSource.length;
+ }
+ var lang = style.substring(5);
+ // Decorate the left of the embedded source
+ appendDecorations(
+ basePos + tokenStart,
+ token.substring(0, embeddedSourceStart),
+ decorate, decorations);
+ // Decorate the embedded source
+ appendDecorations(
+ basePos + tokenStart + embeddedSourceStart,
+ embeddedSource,
+ langHandlerForExtension(lang, embeddedSource),
+ decorations);
+ // Decorate the right of the embedded section
+ appendDecorations(
+ basePos + tokenStart + embeddedSourceEnd,
+ token.substring(embeddedSourceEnd),
+ decorate, decorations);
+ }
+ }
+ job.decorations = decorations;
+ };
+ return decorate;
+ }
+
+ /** returns a function that produces a list of decorations from source text.
+ *
+ * This code treats ", ', and ` as string delimiters, and \ as a string
+ * escape. It does not recognize perl's qq() style strings.
+ * It has no special handling for double delimiter escapes as in basic, or
+ * the tripled delimiters used in python, but should work on those regardless
+ * although in those cases a single string literal may be broken up into
+ * multiple adjacent string literals.
+ *
+ * It recognizes C, C++, and shell style comments.
+ *
+ * @param {Object} options a set of optional parameters.
+ * @return {function (Object)} a function that examines the source code
+ * in the input job and builds the decoration list.
+ */
+ function sourceDecorator(options) {
+ var shortcutStylePatterns = [], fallthroughStylePatterns = [];
+ if (options['tripleQuotedStrings']) {
+ // '''multi-line-string''', 'single-line-string', and double-quoted
+ shortcutStylePatterns.push(
+ [PR_STRING, /^(?:\'\'\'(?:[^\'\\]|\\[\s\S]|\'{1,2}(?=[^\']))*(?:\'\'\'|$)|\"\"\"(?:[^\"\\]|\\[\s\S]|\"{1,2}(?=[^\"]))*(?:\"\"\"|$)|\'(?:[^\\\']|\\[\s\S])*(?:\'|$)|\"(?:[^\\\"]|\\[\s\S])*(?:\"|$))/,
+ null, '\'"']);
+ } else if (options['multiLineStrings']) {
+ // 'multi-line-string', "multi-line-string"
+ shortcutStylePatterns.push(
+ [PR_STRING, /^(?:\'(?:[^\\\']|\\[\s\S])*(?:\'|$)|\"(?:[^\\\"]|\\[\s\S])*(?:\"|$)|\`(?:[^\\\`]|\\[\s\S])*(?:\`|$))/,
+ null, '\'"`']);
+ } else {
+ // 'single-line-string', "single-line-string"
+ shortcutStylePatterns.push(
+ [PR_STRING,
+ /^(?:\'(?:[^\\\'\r\n]|\\.)*(?:\'|$)|\"(?:[^\\\"\r\n]|\\.)*(?:\"|$))/,
+ null, '"\'']);
+ }
+ if (options['verbatimStrings']) {
+ // verbatim-string-literal production from the C# grammar. See issue 93.
+ fallthroughStylePatterns.push(
+ [PR_STRING, /^@\"(?:[^\"]|\"\")*(?:\"|$)/, null]);
+ }
+ if (options['hashComments']) {
+ if (options['cStyleComments']) {
+ // Stop C preprocessor declarations at an unclosed open comment
+ shortcutStylePatterns.push(
+ [PR_COMMENT, /^#(?:(?:define|elif|else|endif|error|ifdef|include|ifndef|line|pragma|undef|warning)\b|[^\r\n]*)/,
+ null, '#']);
+ fallthroughStylePatterns.push(
+ [PR_STRING,
+ /^<(?:(?:(?:\.\.\/)*|\/?)(?:[\w-]+(?:\/[\w-]+)+)?[\w-]+\.h|[a-z]\w*)>/,
+ null]);
+ } else {
+ shortcutStylePatterns.push([PR_COMMENT, /^#[^\r\n]*/, null, '#']);
+ }
+ }
+ if (options['cStyleComments']) {
+ fallthroughStylePatterns.push([PR_COMMENT, /^\/\/[^\r\n]*/, null]);
+ fallthroughStylePatterns.push(
+ [PR_COMMENT, /^\/\*[\s\S]*?(?:\*\/|$)/, null]);
+ }
+ if (options['regexLiterals']) {
+ var REGEX_LITERAL = (
+ // A regular expression literal starts with a slash that is
+ // not followed by * or / so that it is not confused with
+ // comments.
+ '/(?=[^/*])'
+ // and then contains any number of raw characters,
+ + '(?:[^/\\x5B\\x5C]'
+ // escape sequences (\x5C),
+ + '|\\x5C[\\s\\S]'
+ // or non-nesting character sets (\x5B\x5D);
+ + '|\\x5B(?:[^\\x5C\\x5D]|\\x5C[\\s\\S])*(?:\\x5D|$))+'
+ // finally closed by a /.
+ + '/');
+ fallthroughStylePatterns.push(
+ ['lang-regex',
+ new RegExp('^' + REGEXP_PRECEDER_PATTERN + '(' + REGEX_LITERAL + ')')
+ ]);
+ }
+
+ var keywords = options['keywords'].replace(/^\s+|\s+$/g, '');
+ if (keywords.length) {
+ fallthroughStylePatterns.push(
+ [PR_KEYWORD,
+ new RegExp('^(?:' + keywords.replace(/\s+/g, '|') + ')\\b'), null]);
+ }
+
+ shortcutStylePatterns.push([PR_PLAIN, /^\s+/, null, ' \r\n\t\xA0']);
+ fallthroughStylePatterns.push(
+ // TODO(mikesamuel): recognize non-latin letters and numerals in idents
+ [PR_LITERAL, /^@[a-z_$][a-z_$@0-9]*/i, null],
+ [PR_TYPE, /^@?[A-Z]+[a-z][A-Za-z_$@0-9]*/, null],
+ [PR_PLAIN, /^[a-z_$][a-z_$@0-9]*/i, null],
+ [PR_LITERAL,
+ new RegExp(
+ '^(?:'
+ // A hex number
+ + '0x[a-f0-9]+'
+ // or an octal or decimal number,
+ + '|(?:\\d(?:_\\d+)*\\d*(?:\\.\\d*)?|\\.\\d\\+)'
+ // possibly in scientific notation
+ + '(?:e[+\\-]?\\d+)?'
+ + ')'
+ // with an optional modifier like UL for unsigned long
+ + '[a-z]*', 'i'),
+ null, '0123456789'],
+ [PR_PUNCTUATION, /^.[^\s\w\.$@\'\"\`\/\#]*/, null]);
+
+ return createSimpleLexer(shortcutStylePatterns, fallthroughStylePatterns);
+ }
+
+ var decorateSource = sourceDecorator({
+ 'keywords': ALL_KEYWORDS,
+ 'hashComments': true,
+ 'cStyleComments': true,
+ 'multiLineStrings': true,
+ 'regexLiterals': true
+ });
+
+ /** Breaks {@code job.source} around style boundaries in
+ * {@code job.decorations} while re-interleaving {@code job.extractedTags},
+ * and leaves the result in {@code job.prettyPrintedHtml}.
+ * @param {Object} job like {
+ * source: {string} source as plain text,
+ * extractedTags: {Array.<number|string>} extractedTags chunks of raw
+ * html preceded by their position in {@code job.source}
+ * in order
+ * decorations: {Array.<number|string} an array of style classes preceded
+ * by the position at which they start in job.source in order
+ * }
+ * @private
+ */
+ function recombineTagsAndDecorations(job) {
+ var sourceText = job.source;
+ var extractedTags = job.extractedTags;
+ var decorations = job.decorations;
+
+ var html = [];
+ // index past the last char in sourceText written to html
+ var outputIdx = 0;
+
+ var openDecoration = null;
+ var currentDecoration = null;
+ var tagPos = 0; // index into extractedTags
+ var decPos = 0; // index into decorations
+ var tabExpander = makeTabExpander(window['PR_TAB_WIDTH']);
+
+ var adjacentSpaceRe = /([\r\n ]) /g;
+ var startOrSpaceRe = /(^| ) /gm;
+ var newlineRe = /\r\n?|\n/g;
+ var trailingSpaceRe = /[ \r\n]$/;
+ var lastWasSpace = true; // the last text chunk emitted ended with a space.
+
+ // See bug 71 and http://stackoverflow.com/questions/136443/why-doesnt-ie7-
+ var isIE678 = window['_pr_isIE6']();
+ var lineBreakHtml = (
+ isIE678
+ ? (job.sourceNode.tagName === 'PRE'
+ // Use line feeds instead of <br>s so that copying and pasting works
+ // on IE.
+ // Doing this on other browsers breaks lots of stuff since \r\n is
+ // treated as two newlines on Firefox.
+ ? (isIE678 === 6 ? ' \r\n' :
+ isIE678 === 7 ? ' <br>\r' : ' \r')
+ // IE collapses multiple adjacent <br>s into 1 line break.
+ // Prefix every newline with ' ' to prevent such behavior.
+ // is the same as   but works in XML as well as HTML.
+ : ' <br />')
+ : '<br />');
+
+ // Look for a class like linenums or linenums:<n> where <n> is the 1-indexed
+ // number of the first line.
+ var numberLines = job.sourceNode.className.match(/\blinenums\b(?::(\d+))?/);
+ var lineBreaker;
+ if (numberLines) {
+ var lineBreaks = [];
+ for (var i = 0; i < 10; ++i) {
+ lineBreaks[i] = lineBreakHtml + '</li><li class="L' + i + '">';
+ }
+ var lineNum = numberLines[1] && numberLines[1].length
+ ? numberLines[1] - 1 : 0; // Lines are 1-indexed
+ html.push('<ol class="linenums"><li class="L', (lineNum) % 10, '"');
+ if (lineNum) {
+ html.push(' value="', lineNum + 1, '"');
+ }
+ html.push('>');
+ lineBreaker = function () {
+ var lb = lineBreaks[++lineNum % 10];
+ // If a decoration is open, we need to close it before closing a list-item
+ // and reopen it on the other side of the list item.
+ return openDecoration
+ ? ('</span>' + lb + '<span class="' + openDecoration + '">') : lb;
+ };
+ } else {
+ lineBreaker = lineBreakHtml;
+ }
+
+ // A helper function that is responsible for opening sections of decoration
+ // and outputing properly escaped chunks of source
+ function emitTextUpTo(sourceIdx) {
+ if (sourceIdx > outputIdx) {
+ if (openDecoration && openDecoration !== currentDecoration) {
+ // Close the current decoration
+ html.push('</span>');
+ openDecoration = null;
+ }
+ if (!openDecoration && currentDecoration) {
+ openDecoration = currentDecoration;
+ html.push('<span class="', openDecoration, '">');
+ }
+ // This interacts badly with some wikis which introduces paragraph tags
+ // into pre blocks for some strange reason.
+ // It's necessary for IE though which seems to lose the preformattedness
+ // of <pre> tags when their innerHTML is assigned.
+ // http://stud3.tuwien.ac.at/~e0226430/innerHtmlQuirk.html
+ // and it serves to undo the conversion of <br>s to newlines done in
+ // chunkify.
+ var htmlChunk = textToHtml(
+ tabExpander(sourceText.substring(outputIdx, sourceIdx)))
+ .replace(lastWasSpace
+ ? startOrSpaceRe
+ : adjacentSpaceRe, '$1 ');
+ // Keep track of whether we need to escape space at the beginning of the
+ // next chunk.
+ lastWasSpace = trailingSpaceRe.test(htmlChunk);
+ html.push(htmlChunk.replace(newlineRe, lineBreaker));
+ outputIdx = sourceIdx;
+ }
+ }
+
+ while (true) {
+ // Determine if we're going to consume a tag this time around. Otherwise
+ // we consume a decoration or exit.
+ var outputTag;
+ if (tagPos < extractedTags.length) {
+ if (decPos < decorations.length) {
+ // Pick one giving preference to extractedTags since we shouldn't open
+ // a new style that we're going to have to immediately close in order
+ // to output a tag.
+ outputTag = extractedTags[tagPos] <= decorations[decPos];
+ } else {
+ outputTag = true;
+ }
+ } else {
+ outputTag = false;
+ }
+ // Consume either a decoration or a tag or exit.
+ if (outputTag) {
+ emitTextUpTo(extractedTags[tagPos]);
+ if (openDecoration) {
+ // Close the current decoration
+ html.push('</span>');
+ openDecoration = null;
+ }
+ html.push(extractedTags[tagPos + 1]);
+ tagPos += 2;
+ } else if (decPos < decorations.length) {
+ emitTextUpTo(decorations[decPos]);
+ currentDecoration = decorations[decPos + 1];
+ decPos += 2;
+ } else {
+ break;
+ }
+ }
+ emitTextUpTo(sourceText.length);
+ if (openDecoration) {
+ html.push('</span>');
+ }
+ if (numberLines) { html.push('</li></ol>'); }
+ job.prettyPrintedHtml = html.join('');
+ }
+
+ /** Maps language-specific file extensions to handlers. */
+ var langHandlerRegistry = {};
+ /** Register a language handler for the given file extensions.
+ * @param {function (Object)} handler a function from source code to a list
+ * of decorations. Takes a single argument job which describes the
+ * state of the computation. The single parameter has the form
+ * {@code {
+ * source: {string} as plain text.
+ * decorations: {Array.<number|string>} an array of style classes
+ * preceded by the position at which they start in
+ * job.source in order.
+ * The language handler should assigned this field.
+ * basePos: {int} the position of source in the larger source chunk.
+ * All positions in the output decorations array are relative
+ * to the larger source chunk.
+ * } }
+ * @param {Array.<string>} fileExtensions
+ */
+ function registerLangHandler(handler, fileExtensions) {
+ for (var i = fileExtensions.length; --i >= 0;) {
+ var ext = fileExtensions[i];
+ if (!langHandlerRegistry.hasOwnProperty(ext)) {
+ langHandlerRegistry[ext] = handler;
+ } else if ('console' in window) {
+ console['warn']('cannot override language handler %s', ext);
+ }
+ }
+ }
+ function langHandlerForExtension(extension, source) {
+ if (!(extension && langHandlerRegistry.hasOwnProperty(extension))) {
+ // Treat it as markup if the first non whitespace character is a < and
+ // the last non-whitespace character is a >.
+ extension = /^\s*</.test(source)
+ ? 'default-markup'
+ : 'default-code';
+ }
+ return langHandlerRegistry[extension];
+ }
+ registerLangHandler(decorateSource, ['default-code']);
+ registerLangHandler(
+ createSimpleLexer(
+ [],
+ [
+ [PR_PLAIN, /^[^<?]+/],
+ [PR_DECLARATION, /^<!\w[^>]*(?:>|$)/],
+ [PR_COMMENT, /^<\!--[\s\S]*?(?:-\->|$)/],
+ // Unescaped content in an unknown language
+ ['lang-', /^<\?([\s\S]+?)(?:\?>|$)/],
+ ['lang-', /^<%([\s\S]+?)(?:%>|$)/],
+ [PR_PUNCTUATION, /^(?:<[%?]|[%?]>)/],
+ ['lang-', /^<xmp\b[^>]*>([\s\S]+?)<\/xmp\b[^>]*>/i],
+ // Unescaped content in javascript. (Or possibly vbscript).
+ ['lang-js', /^<script\b[^>]*>([\s\S]*?)(<\/script\b[^>]*>)/i],
+ // Contains unescaped stylesheet content
+ ['lang-css', /^<style\b[^>]*>([\s\S]*?)(<\/style\b[^>]*>)/i],
+ ['lang-in.tag', /^(<\/?[a-z][^<>]*>)/i]
+ ]),
+ ['default-markup', 'htm', 'html', 'mxml', 'xhtml', 'xml', 'xsl']);
+ registerLangHandler(
+ createSimpleLexer(
+ [
+ [PR_PLAIN, /^[\s]+/, null, ' \t\r\n'],
+ [PR_ATTRIB_VALUE, /^(?:\"[^\"]*\"?|\'[^\']*\'?)/, null, '\"\'']
+ ],
+ [
+ [PR_TAG, /^^<\/?[a-z](?:[\w.:-]*\w)?|\/?>$/i],
+ [PR_ATTRIB_NAME, /^(?!style[\s=]|on)[a-z](?:[\w:-]*\w)?/i],
+ ['lang-uq.val', /^=\s*([^>\'\"\s]*(?:[^>\'\"\s\/]|\/(?=\s)))/],
+ [PR_PUNCTUATION, /^[=<>\/]+/],
+ ['lang-js', /^on\w+\s*=\s*\"([^\"]+)\"/i],
+ ['lang-js', /^on\w+\s*=\s*\'([^\']+)\'/i],
+ ['lang-js', /^on\w+\s*=\s*([^\"\'>\s]+)/i],
+ ['lang-css', /^style\s*=\s*\"([^\"]+)\"/i],
+ ['lang-css', /^style\s*=\s*\'([^\']+)\'/i],
+ ['lang-css', /^style\s*=\s*([^\"\'>\s]+)/i]
+ ]),
+ ['in.tag']);
+ registerLangHandler(
+ createSimpleLexer([], [[PR_ATTRIB_VALUE, /^[\s\S]+/]]), ['uq.val']);
+ registerLangHandler(sourceDecorator({
+ 'keywords': CPP_KEYWORDS,
+ 'hashComments': true,
+ 'cStyleComments': true
+ }), ['c', 'cc', 'cpp', 'cxx', 'cyc', 'm']);
+ registerLangHandler(sourceDecorator({
+ 'keywords': 'null true false'
+ }), ['json']);
+ registerLangHandler(sourceDecorator({
+ 'keywords': CSHARP_KEYWORDS,
+ 'hashComments': true,
+ 'cStyleComments': true,
+ 'verbatimStrings': true
+ }), ['cs']);
+ registerLangHandler(sourceDecorator({
+ 'keywords': JAVA_KEYWORDS,
+ 'cStyleComments': true
+ }), ['java']);
+ registerLangHandler(sourceDecorator({
+ 'keywords': SH_KEYWORDS,
+ 'hashComments': true,
+ 'multiLineStrings': true
+ }), ['bsh', 'csh', 'sh']);
+ registerLangHandler(sourceDecorator({
+ 'keywords': PYTHON_KEYWORDS,
+ 'hashComments': true,
+ 'multiLineStrings': true,
+ 'tripleQuotedStrings': true
+ }), ['cv', 'py']);
+ registerLangHandler(sourceDecorator({
+ 'keywords': PERL_KEYWORDS,
+ 'hashComments': true,
+ 'multiLineStrings': true,
+ 'regexLiterals': true
+ }), ['perl', 'pl', 'pm']);
+ registerLangHandler(sourceDecorator({
+ 'keywords': RUBY_KEYWORDS,
+ 'hashComments': true,
+ 'multiLineStrings': true,
+ 'regexLiterals': true
+ }), ['rb']);
+ registerLangHandler(sourceDecorator({
+ 'keywords': JSCRIPT_KEYWORDS,
+ 'cStyleComments': true,
+ 'regexLiterals': true
+ }), ['js']);
+ registerLangHandler(
+ createSimpleLexer([], [[PR_STRING, /^[\s\S]+/]]), ['regex']);
+
+ function applyDecorator(job) {
+ var sourceCodeHtml = job.sourceCodeHtml;
+ var opt_langExtension = job.langExtension;
+
+ // Prepopulate output in case processing fails with an exception.
+ job.prettyPrintedHtml = sourceCodeHtml;
+
+ try {
+ // Extract tags, and convert the source code to plain text.
+ var sourceAndExtractedTags = extractTags(sourceCodeHtml);
+ /** Plain text. @type {string} */
+ var source = sourceAndExtractedTags.source;
+ job.source = source;
+ job.basePos = 0;
+
+ /** Even entries are positions in source in ascending order. Odd entries
+ * are tags that were extracted at that position.
+ * @type {Array.<number|string>}
+ */
+ job.extractedTags = sourceAndExtractedTags.tags;
+
+ // Apply the appropriate language handler
+ langHandlerForExtension(opt_langExtension, source)(job);
+ // Integrate the decorations and tags back into the source code to produce
+ // a decorated html string which is left in job.prettyPrintedHtml.
+ recombineTagsAndDecorations(job);
+ } catch (e) {
+ if ('console' in window) {
+ console['log'](e && e['stack'] ? e['stack'] : e);
+ }
+ }
+ }
+
+ function prettyPrintOne(sourceCodeHtml, opt_langExtension) {
+ var job = {
+ sourceCodeHtml: sourceCodeHtml,
+ langExtension: opt_langExtension
+ };
+ applyDecorator(job);
+ return job.prettyPrintedHtml;
+ }
+
+ function prettyPrint(opt_whenDone) {
+ function byTagName(tn) { return document.getElementsByTagName(tn); }
+ // fetch a list of nodes to rewrite
+ var codeSegments = [byTagName('pre'), byTagName('code'), byTagName('xmp')];
+ var elements = [];
+ for (var i = 0; i < codeSegments.length; ++i) {
+ for (var j = 0, n = codeSegments[i].length; j < n; ++j) {
+ elements.push(codeSegments[i][j]);
+ }
+ }
+ codeSegments = null;
+
+ var clock = Date;
+ if (!clock['now']) {
+ clock = { 'now': function () { return (new Date).getTime(); } };
+ }
+
+ // The loop is broken into a series of continuations to make sure that we
+ // don't make the browser unresponsive when rewriting a large page.
+ var k = 0;
+ var prettyPrintingJob;
+
+ function doWork() {
+ var endTime = (window['PR_SHOULD_USE_CONTINUATION'] ?
+ clock.now() + 250 /* ms */ :
+ Infinity);
+ for (; k < elements.length && clock.now() < endTime; k++) {
+ var cs = elements[k];
+ if (cs.className && cs.className.indexOf('prettyprint') >= 0) {
+ // If the classes includes a language extensions, use it.
+ // Language extensions can be specified like
+ // <pre class="prettyprint lang-cpp">
+ // the language extension "cpp" is used to find a language handler as
+ // passed to PR_registerLangHandler.
+ var langExtension = cs.className.match(/\blang-(\w+)\b/);
+ if (langExtension) { langExtension = langExtension[1]; }
+
+ // make sure this is not nested in an already prettified element
+ var nested = false;
+ for (var p = cs.parentNode; p; p = p.parentNode) {
+ if ((p.tagName === 'pre' || p.tagName === 'code' ||
+ p.tagName === 'xmp') &&
+ p.className && p.className.indexOf('prettyprint') >= 0) {
+ nested = true;
+ break;
+ }
+ }
+ if (!nested) {
+ // fetch the content as a snippet of properly escaped HTML.
+ // Firefox adds newlines at the end.
+ var content = getInnerHtml(cs);
+ content = content.replace(/(?:\r\n?|\n)$/, '');
+
+ // do the pretty printing
+ prettyPrintingJob = {
+ sourceCodeHtml: content,
+ langExtension: langExtension,
+ sourceNode: cs
+ };
+ applyDecorator(prettyPrintingJob);
+ replaceWithPrettyPrintedHtml();
+ }
+ }
+ }
+ if (k < elements.length) {
+ // finish up in a continuation
+ setTimeout(doWork, 250);
+ } else if (opt_whenDone) {
+ opt_whenDone();
+ }
+ }
+
+ function replaceWithPrettyPrintedHtml() {
+ var newContent = prettyPrintingJob.prettyPrintedHtml;
+ if (!newContent) { return; }
+ var cs = prettyPrintingJob.sourceNode;
+
+ // push the prettified html back into the tag.
+ if (!isRawContent(cs)) {
+ // just replace the old html with the new
+ cs.innerHTML = newContent;
+ } else {
+ // we need to change the tag to a <pre> since <xmp>s do not allow
+ // embedded tags such as the span tags used to attach styles to
+ // sections of source code.
+ var pre = document.createElement('PRE');
+ for (var i = 0; i < cs.attributes.length; ++i) {
+ var a = cs.attributes[i];
+ if (a.specified) {
+ var aname = a.name.toLowerCase();
+ if (aname === 'class') {
+ pre.className = a.value; // For IE 6
+ } else {
+ pre.setAttribute(a.name, a.value);
+ }
+ }
+ }
+ pre.innerHTML = newContent;
+
+ // remove the old
+ cs.parentNode.replaceChild(pre, cs);
+ cs = pre;
+ }
+ }
+
+ doWork();
+ }
+
+ window['PR_normalizedHtml'] = normalizedHtml;
+ window['prettyPrintOne'] = prettyPrintOne;
+ window['prettyPrint'] = prettyPrint;
+ window['PR'] = {
+ 'combinePrefixPatterns': combinePrefixPatterns,
+ 'createSimpleLexer': createSimpleLexer,
+ 'registerLangHandler': registerLangHandler,
+ 'sourceDecorator': sourceDecorator,
+ 'PR_ATTRIB_NAME': PR_ATTRIB_NAME,
+ 'PR_ATTRIB_VALUE': PR_ATTRIB_VALUE,
+ 'PR_COMMENT': PR_COMMENT,
+ 'PR_DECLARATION': PR_DECLARATION,
+ 'PR_KEYWORD': PR_KEYWORD,
+ 'PR_LITERAL': PR_LITERAL,
+ 'PR_NOCODE': PR_NOCODE,
+ 'PR_PLAIN': PR_PLAIN,
+ 'PR_PUNCTUATION': PR_PUNCTUATION,
+ 'PR_SOURCE': PR_SOURCE,
+ 'PR_STRING': PR_STRING,
+ 'PR_TAG': PR_TAG,
+ 'PR_TYPE': PR_TYPE
+ };
+})();
diff --git a/website/rakefile b/website/rakefile
new file mode 100644
index 0000000..9d01327
--- /dev/null
+++ b/website/rakefile
@@ -0,0 +1,139 @@
+require "fileutils"
+require "yaml"
+include FileUtils
+
+def clone_blueprint
+ system 'git clone https://github.com/joshuaclayton/blueprint-css.git'
+end
+
+desc 'generate blueprint css'
+task 'gen:css' do
+ unless File.exist?('blueprint-css')
+ clone_blueprint
+ end
+
+ path = "#{File.expand_path File.dirname(__FILE__)}/public/bp/"
+ puts path
+ rm_rf path
+ mkdir_p path
+
+ # cd
+ cd File.dirname(__FILE__)
+ cd 'blueprint-css'
+ system "bundle install --without test"
+ cd 'lib'
+
+ # prepare config
+ yaml = <<-Y
+ rsec:
+ path: #{path}
+ custom_layout:
+ column_count: 9
+ column_width: 110
+ gutter_width: 10
+ plugins:
+ - fancy-type
+ - buttons
+ - link-icons
+ Y
+ File.open 'settings.yml', 'w' do |f|
+ f << yaml
+ end
+
+ # generate
+ system 'ruby compress.rb -f settings.yml -p rsec'
+end
+
+# output an entry to ref.slim
+def output_entry file, name, params, constraints, desc, example=nil
+ file.puts "h3"
+ file.puts " | #{name}"
+ if params
+ file.puts " span.params title='params'"
+ file.puts " ' (#{params})"
+ end
+ if constraints
+ title = constraints == 'helper' ? 'should include Rsec::Helper' : 'constraints'
+ file.puts " span.constraints title='#{title}' #{constraints}"
+ end
+ file.puts "pre.desc"
+ first = true
+ desc.lines do |line|
+ if first
+ file.puts " | " + line
+ first = false
+ else
+ file.puts " " + line
+ end
+ end
+ return if (example.nil? or example == '')
+ file.puts 'i.example example:'
+ file.puts "pre.code"
+ file.puts " code.prettyprint.lang-rb"
+ first = true
+ example.lines do |line|
+ if first
+ first = false
+ file.puts " | " + line
+ else
+ file.puts " " + line
+ end
+ end
+end
+
+desc 'generate ref for website'
+task 'gen:ref' do
+ src = File.read '../lib/rsec/helpers.rb'
+ lines = src.lines.to_a
+ out = File.open 'views/ref.slim', 'w'
+ out.puts '/GENERATED BY rake gen:ref'
+
+ # process @ desc and @ example
+ i = 0
+ get_line = ->{
+ res = lines[i]
+ i += 1
+ res ? res.sub(/^\s+/, '') : nil
+ }
+ get_block = ->{
+ res = ''
+ while (line = get_line[] and line.start_with?('# '))
+ res << line.sub('# ', '')
+ end
+ i -= 1
+ res
+ }
+ while line = get_line[]
+ if line.start_with? '# @ desc'
+ constraints =
+ if line.index('.')
+ # constraints
+ line = line[(line.index('.') + 1)..-1].strip
+ end
+ desc = get_block[]
+ line = get_line[]
+ example =
+ if line.start_with? '# @ example'
+ get_block[]
+ else
+ i -= 1
+ nil
+ end
+ /def\ (?<name>[^\s]+)\ (?<params>[^\n\&]*)/ =~ get_line[]
+ params.strip!
+ params.sub! /\s*,\s*$/, ''
+ params = nil if params =~ /^\s*$/
+ output_entry out, name, params, constraints, desc, example
+ end
+ end
+
+ # process alias
+ lines.each do |line|
+ if line =~ /alias\ (\w+[\!\?]?)\ (\w+[\!\?]?)/
+ output_entry out, $1, nil, nil, "alias for #$2"
+ end
+ end
+
+ out.close
+end
+
diff --git a/website/run.rb b/website/run.rb
new file mode 100644
index 0000000..df8d4bc
--- /dev/null
+++ b/website/run.rb
@@ -0,0 +1,15 @@
+require "sinatra"
+require "slim"
+
+get '/' do
+ slim :index
+end
+
+get '/ref' do
+ slim :ref
+end
+
+get '/tricks' do
+ slim :tricks
+end
+
diff --git a/website/views/index.slim b/website/views/index.slim
new file mode 100644
index 0000000..4b73d74
--- /dev/null
+++ b/website/views/index.slim
@@ -0,0 +1,82 @@
+h3 What
+p
+ ' Rsec is a dynamic
+ a href="http://en.wikipedia.org/wiki/Parser_generator" parser generator
+ | for Ruby 1.9.
+
+h3 Install
+pre.code
+ code.prettyprint.lang-sh
+ | gem in rsec
+
+h3 Use
+p
+ | Here's a simple arithmetic example:
+pre.code
+ code.prettyprint.lang-rb
+ | require "rsec"
+ include Rsec::Helpers
+ def arithmetic
+
+ # evaluate binary arithmetic series
+ # Apply this procedure to the lists of terms and factors generated in term and expr
+ calculate = proc do |(p, *ps)|
+ ps.each_slice(2).inject(p) do |left, (op, right)|
+ left.send op, right
+ end
+ end
+
+
+ # `num` is a primitive of type double;
+ # if recognition fails, the token should be reported as "number"
+ num = prim(:double).fail 'number'
+
+ # `paren` is a left parenthesis, followed by an expr, followed by a right parenthesis.
+ # The left parenthesis is treated as a token (.r);
+ # this is necessary for the token to be processed by rsec.
+ # The >> and << operators ignore the value of the delimiters they adjoin:
+ # the value of the expression is `expr`.
+ # lazy is used to deal with the forward reference of `expr`, which has not been defined yet.
+ paren = '('.r >> lazy{expr} << ')'
+
+ factor = num | paren
+
+ # `term` is a sequence of factors, delimited with one of the delimites */%,
+ # optionally separated by space (one_of_).
+ # The value of the expression is derived by applying the method calc
+ # to the list generated by join (map).
+ term = factor.join(one_of_('*/%').fail 'operator').map &calculate
+
+ expr = term.join(one_of_('+-').fail 'operator').map &calculate
+
+ # The root non-terminal symbol, assigned to the arithmetic parser, is `expr`;
+ # it can only be followed by End-Of-File.
+ arithmetic = expr.eof
+ end
+
+
+ # test it!
+ print '1+ 2*4 = '
+ p arithmetic.parse! '1+ 2*4' #=> 9
+ print '1+ 2*/4 = '
+ p arithmetic.parse! '1+ 2*/4' #=> should raise syntax error
+ul
+ li
+ a href="/ref" Reference for all combinators
+ li
+ a href="https://github.com/luikore/rsec/wiki" Wiki, with advanced topics
+
+h3 Code
+p
+ a href="http://github.com/luikore/rsec" Hosted on github.
+
+script type="text/javascript"
+ | var _gaq = _gaq || [];
+ _gaq.push(['_setAccount', 'UA-22444794-1']);
+ _gaq.push(['_trackPageview']);
+ (function() {
+ var ga = document.createElement('script'); ga.type = 'text/javascript'; ga.async = true;
+ ga.src = ('https:' == document.location.protocol ? 'https://ssl' : 'http://www') + '.google-analytics.com/ga.js';
+ var s = document.getElementsByTagName('script')[0]; s.parentNode.insertBefore(ga, s);
+ })();
+
diff --git a/website/views/layout.slim b/website/views/layout.slim
new file mode 100644
index 0000000..80ab3b1
--- /dev/null
+++ b/website/views/layout.slim
@@ -0,0 +1,26 @@
+doctype html
+html
+ head
+ title Rsec - Parser Generator for Ruby19
+ meta name="keywords" content="parser generator,parser combibnator"
+ meta http-equiv="content-type" content="text/html; charset=utf-8"
+ script type="text/javascript" src="/js/jquery-1.5.min.js"
+ script type="text/javascript" src="/js/default.js"
+ script type="text/javascript" src="/prettify/prettify.js"
+ link rel="stylesheet" href="/prettify/prettify.css" type="text/css" media="screen"
+ link rel="stylesheet" href="/bp/screen.css" type="text/css" media="screen"
+ link rel="stylesheet" href="/bp/print.css" type="text/css" media="print"
+ link rel="stylesheet" href="/css/default.css" type="text/css" media="screen"
+
+ body
+ .container
+ #header
+ .span-3 style="padding-top:20px;background:#fc7;border-bottom:8px solid #ffd;"
+ a href="/" Rsec
+ .span-3.last style="padding-top:30px;background:#7fc;border-bottom:8px solid #cfc;"
+ a href="/ref" Ref
+ /.span-3.last style="padding-top:50px;background:#a9f;border-bottom:8px solid #ccf;"
+ / a href="/links" Tricks
+ #body style="clear:both;padding:0 10px;"
+ == yield
+
diff --git a/website/views/ref.slim b/website/views/ref.slim
new file mode 100644
index 0000000..ca47e18
--- /dev/null
+++ b/website/views/ref.slim
@@ -0,0 +1,300 @@
+/GENERATED BY rake gen:ref
+h3
+ | parse
+ span.params title='params'
+ ' (str)
+pre.desc
+ | Applied to an Rsec grammar, parses the string str. Any syntax errors are reported as INVALID_TOKEN.
+h3
+ | parse!
+ span.params title='params'
+ ' (str)
+pre.desc
+ | Applied to an Rsec grammar, parses the string str. Any synatx errors are reported in detail.
+h3
+ | r
+pre.desc
+ | Converts a terminal symbol (regex or string) into a token that can be processed by Rsec,
+ e.g. as a value assigned to a non-terminal, or a token that can have any of the following operators
+ applied to it.
+i.example example:
+pre.code
+ code.prettyprint.lang-rb
+ | utf8_tail = /[\u0080-\u00bf]/.r
+ utf8_2 = /[\u00c2-\u00df]/.r | utf8_tail
+h3
+ | lazy
+ span.constraints title='should include Rsec::Helper' helper
+pre.desc
+ | A lazy parser for a rule is constructed when parsing starts. It is useful to reference a rule
+ that has not been defined yet: this applies to forward references (the rule is defined later),
+ and to recursive references
+i.example example:
+pre.code
+ code.prettyprint.lang-rb
+ | parser = lazy{future}
+ future = 'jim'.r
+ recurse = seq( lazy{recurse} , 'a' ) | 'b'
+ assert_equal 'jim', parser.parse '12323'
+ assert_equal 'recurse', parser.parse 'baaaaa'
+h3
+ | one_of
+ span.params title='params'
+ ' (str)
+ span.constraints title='should include Rsec::Helper' helper
+pre.desc
+ | Parses one of the chars in str
+i.example example:
+pre.code
+ code.prettyprint.lang-rb
+ | multiplicative = one_of '*/%'
+ assert_equal '/', multiplicative.parse '/'
+ assert_equal Rsec::INVALID, actualmultiplicative.parse '+'
+h3
+ | one_of_
+ span.params title='params'
+ ' (str)
+ span.constraints title='should include Rsec::Helper' helper
+pre.desc
+ | See also #one_of#, with leading and trailing optional breakable spaces
+i.example example:
+pre.code
+ code.prettyprint.lang-rb
+ | additive = one_of_('+-')
+ assert_equal '+', additive.parse(' +')
+h3
+ | prim
+ span.params title='params'
+ ' (type, options={})
+ span.constraints title='should include Rsec::Helper' helper
+pre.desc
+ | Primitive parser for numbers. The value of the expression is the number, as opposed to the textual value
+ returned by other terminal symbols. Returns nil if overflow or underflow.
+ There can be an optional '+' or '-' at the beginning of string except unsinged_int32 | unsinged_int64.
+ type =
+ :double |
+ :hex_double |
+ :int32 |
+ :int64 |
+ :unsigned_int32 |
+ :unsigned_int64
+ options:
+ :allowed_sign => '+' | '-' | '' | '+-' (default '+-')
+ :allowed_signs => (same as :allowed_sign)
+ :base => integer only (default 10)
+i.example example:
+pre.code
+ code.prettyprint.lang-rb
+ | p = prim :double
+ assert_equal 1.23, p.parse('1.23')
+ p = prim :double, allowed_sign: '-'
+ assert_equal 1.23, p.parse('1.23')
+ assert_equal -1.23, p.parse('-1.23')
+ assert_equal Rsec::INVALID, p.parse('+1.23')
+ p = prim :int32, base: 36
+ assert_equal 49713, p.parse('12cx')
+h3
+ | seq
+ span.params title='params'
+ ' (*xs)
+ span.constraints title='should include Rsec::Helper' helper
+pre.desc
+ | Sequence parser. Processes a sequence of terminal or non-terminal symbols, and returns
+ a list of their values as evaluated by their respective rules. (Textual strings, for terminal symbols.)
+i.example example:
+pre.code
+ code.prettyprint.lang-rb
+ | assert_equal ['a', 'b', 'c'], actualseq('a', 'b', 'c').parse('abc')
+h3
+ | seq_
+ span.params title='params'
+ ' (*xs)
+ span.constraints title='should include Rsec::Helper' helper
+pre.desc
+ | Sequence parser with skippable pattern (or parser)
+ option
+ :skip default= /\s*/
+i.example example:
+pre.code
+ code.prettyprint.lang-rb
+ | assert_equal ['a', 'b', 'c'], actualseq_('a', 'b', 'c', skip: ',').parse('a,b,c')
+h3
+ | symbol
+ span.params title='params'
+ ' (pattern, skip=/\s*/)
+ span.constraints title='should include Rsec::Helper' helper
+pre.desc
+ | A symbol is a token wrapped with optional space
+h3
+ | word
+ span.params title='params'
+ ' (pattern)
+ span.constraints title='should include Rsec::Helper' helper
+pre.desc
+ | A word is a token wrapped with word boundaries
+i.example example:
+pre.code
+ code.prettyprint.lang-rb
+ | assert_equal ['yes', '3'], seq('yes', '3').parse('yes3')
+ assert_equal INVALID, seq(word('yes'), '3').parse('yes3')
+h3
+ | map
+ span.params title='params'
+ ' (lambda_p=nil)
+pre.desc
+ | Transform result. Apply a procedure to the list generated by the rule.
+ Is implicit if a rule is followed by a Ruby block.
+i.example example:
+pre.code
+ code.prettyprint.lang-rb
+ | parser = /\w+/.r.map{|word| word * 2}
+ assert_equal 'hellohello', parser.parse!('hello')
+h3
+ | join
+ span.params title='params'
+ ' (inter)
+pre.desc
+ | "p.join('+')" parses strings like "p+p+p+p+p", and returns
+ a list of 'p' interspersed with '+'.
+ Note that at least 1 instance of p appears in the string.
+ Sometimes it is useful to reverse the joining:
+ /\s*/.r.join('p').odd parses string like " p p p "
+h3
+ | |
+ span.params title='params'
+ ' (y)
+pre.desc
+ | Branch parser. Note that rsec is a
+ PEG parser generator[https://en.wikipedia.org/wiki/Parsing_expression_grammar];
+ beware of the difference between PEG and CFG. Like all PEGs,
+ Rsec selects the first applicable option out of a list of choices,
+ and ignores all others.
+h3
+ | *
+ span.params title='params'
+ ' (n, begin..end)
+pre.desc
+ | Repeat n or in a range.
+ If range.end < 0, repeat at least range.begin
+ (Infinity and -Infinity are considered)
+h3
+ | maybe
+pre.desc
+ | Appears 0 or 1 times, result is wrapped in an array
+i.example example:
+pre.code
+ code.prettyprint.lang-rb
+ | parser = 'a'.r.maybe
+ assert_equal ['a'], parser.parse('a')
+ assert_equal [], parser.parse('')
+h3
+ | star
+pre.desc
+ | Kleene star, 0 or more any times. Note that like other
+ PEGs[https://en.wikipedia.org/wiki/Parsing_expression_grammar], Rsec is greedy:
+ Kleene stars and pluses will behave in counterintuitive ways when followed by
+ another term, and may need to be replaced by recursion (x = y.star z, replaced by
+ x = z | y lazy{x} )
+h3
+ | &
+ span.params title='params'
+ ' (other)
+pre.desc
+ | Lookahead term, note that other can be a very complex parser. Do not confuse this with
+ the semantic lookahead predicates of Treetop (blocks of Ruby code affecting parsing).
+h3
+ | ^
+ span.params title='params'
+ ' (other)
+pre.desc
+ | Negative lookahead predicate. Unlike in Treetop, the negative lookahead term must follow
+ rather than precede another term: x ^ y means "x, not followed by y". The Treetop
+ expression (!x y), which means "y, which we have ruled out as an instance of x",
+ is rendered in Rsec as seq( ''.r ^ x , y): empty string not followed by x, followed by y.
+ Do not confuse this with
+ the semantic lookahead predicates of Treetop (blocks of Ruby code affecting parsing).
+h3
+ | fail
+ span.params title='params'
+ ' (*tokens)
+pre.desc
+ | When parsing fails on the preceding term, show "expect tokens" error for that tokens value.
+h3
+ | >>
+ span.params title='params'
+ ' (other)
+pre.desc
+ | Short for seq_(parser, other)[1]. Used to ignore a preceding delimiter in evaluating the value
+ of the term.
+h3
+ | <<
+ span.params title='params'
+ ' (other)
+pre.desc
+ | Short for seq_(parser, other)[0]. Used to ignore a following delimiter in evaluating the value
+ of the term.
+h3
+ | eof
+pre.desc
+ | Should be end of input after parse. Used to identify the root non-terminal of a grammar; e.g.
+ arithmetic = expr.eof means that the grammar arithmetic has expr as its root, and a parse of
+ expr can only be followed by end-of-file.
+h3
+ | cached
+pre.desc
+ | Packrat parser combinator, returns a parser that caches parse result, may optimize performance
+h3
+ | []
+ span.params title='params'
+ ' (idx)
+ span.constraints title='constraints' seq, seq_
+pre.desc
+ | Given that the result of a sequence parser is a list of all the terms recognised, this
+ returns the parse result for the idx-th value in the list. This computation is shorter
+ and faster than map{|array| array[idx]}
+i.example example:
+pre.code
+ code.prettyprint.lang-rb
+ | assert_equal 'b', seq('a', 'b', 'c')[1].parse('abc')
+h3
+ | unbox
+ span.constraints title='constraints' seq, seq_, join, join.even, join.odd
+pre.desc
+ | If parse result contains only 1 element, return the element instead of the array.
+h3
+ | inner
+pre.desc
+ | Think of "innerHTML"! Ignore the initial and the final values in the list returned
+ by a sequence parser.
+i.example example:
+pre.code
+ code.prettyprint.lang-rb
+ | parser = seq('<b>', /[\w\s]+/, '</b>').inner
+ parser.parse('<b>the inside</b>')
+h3
+ | even
+ span.constraints title='constraints' join
+pre.desc
+ | Operating on the results of join, keeps only the even (left, token) parts.
+ For example, unit.join(/\s+/) creates a list of [unit, \s+, unit, \s+, unit...];
+ unit.join(/\s+/).even only retains [unit, unit, unit...]
+h3
+ | odd
+ span.constraints title='constraints' join
+pre.desc
+ | Operating on the results of join, keeps only the odd (right, inter) parts
+h3
+ | until
+ span.constraints title='constraints' r
+pre.desc
+ | Scan until the pattern happens. (Corresponds to StringScanner.scan_until.) So
+ x.until parses from the current point up to and including the pattern in x;
+ x.until corresponds to a non-greedy .*? x
+h3
+ | _?
+pre.desc
+ | alias for maybe
+h3
+ | expect
+pre.desc
+ | alias for fail
diff --git a/website/views/tricks.slim b/website/views/tricks.slim
new file mode 100644
index 0000000..b2b58eb
--- /dev/null
+++ b/website/views/tricks.slim
@@ -0,0 +1 @@
+' TODO