Codebase list gcc-arm-none-eabi / 921b099
Sync embedded 4.9 branch Agustin Henze 9 years ago
1 changed file(s) with 11948 addition(s) and 376 deletion(s). Raw diff Collapse all Expand all
+11948
-376
debian/patches/0001-Add-GNU-ARM-embedded-toolchain-patches.patch less more
0 diff --git a/gcc/ChangeLog.arm b/gcc/ChangeLog.arm
1 new file mode 100644
2 index 0000000..05532b1
3 --- /dev/null
4 +++ b/gcc/ChangeLog.arm
5 @@ -0,0 +1,251 @@
6 +2014-12-02 Terry Guo <terry.guo@arm.com>
7 +
8 + Backport from mainline r214214
9 + 2014-08-20 Terry Guo <terry.guo@arm.com>
10 +
11 + * config/arm/thumb1.md (64bit splitter): Replace const_double_operand
12 + with immediate_operand.
13 +
14 +2014-12-02 Terry Guo <terry.guo@arm.com>
15 +
16 + Backport from mainline r211817
17 + 2014-06-19 Terry Guo <terry.guo@arm.com>
18 +
19 + * config/arm/thumb1.md (define_split): Split 64bit constant in earlier
20 + stage.
21 +
22 +2014-11-19 Terry Guo <terry.guo@arm.com>
23 +
24 + Backport from mainline r217687
25 + 2014-11-17 Terry Guo <terry.guo@arm.com>
26 +
27 + * config/arm/arm.c (arm_issue_rate): Return 2 for cortex-m7.
28 + * config/arm/arm.md (generic_sched): Exclude cortex-m7.
29 + (generic_vfp): Likewise.
30 + * config/arm/cortex-m7.md: Pipeline description for cortex-m7.
31 +
32 +2014-11-10 Hale Wang <hale.wang@arm.com>
33 +
34 + Backport from mainline r217175
35 + 2014-11-06 Hale Wang <hale.wang@arm.com>
36 +
37 + * config/arm/arm-cores.def: Add support for
38 + -mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
39 + cortex-m1.small-multiply.
40 + * config/arm/arm-tables.opt: Regenerate.
41 + * config/arm/arm-tune.md: Regenerate.
42 + * config/arm/arm.c: Update the rtx-costs for MUL.
43 + * config/arm/bpabi.h: Handle
44 + -mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
45 + cortex-m1.small-multiply.
46 + * doc/invoke.texi: Document
47 + -mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
48 + cortex-m1.small-multiply.
49 +
50 +2014-11-10 Hale Wang <hale.wang@arm.com>
51 +
52 + Backport from mainline r217173
53 + 2014-11-06 Hale Wang <hale.wang@arm.com>
54 +
55 + * config/arm/arm.c: Add cortex-m7 tune.
56 + * config/arm/arm-cores.def: Use cortex-m7 tune.
57 +
58 +2014-11-03 Hale Wang <hale.wang@arm.com>
59 +
60 + * Makefile.in (tree-switch-shortcut): New object file.
61 + * common.opt (-ftree-switch-shortcut): New option.
62 + * opts.c: Likewise.
63 + * params.def: Define the maxinum number of instructions and paths
64 + to duplicate when shortcutting a switch.
65 + * passes.def (pass_tree_switch_shortcut): New pass.
66 + * timevar.def (TV_TREE_SWITCH_SHORTCUT): Define new value.
67 + * tree-pass.h (make_pass_tree_switch_shortcut): New pass.
68 + * tree-switch-shortcut.c: New file.
69 +
70 +2014-10-08 Zhenqiang Chen <zhenqiang.chen@arm.com>
71 +
72 + Backport from mainline r215444
73 + 2014-09-22 Zhenqiang Chen <zhenqiang.chen@arm.com>
74 +
75 + * config/arm/arm.c: #include "tm-constrs.h"
76 + (thumb1_size_rtx_costs): Adjust rtx costs.
77 +
78 +2014-10-08 Zhenqiang Chen <zhenqiang.chen@arm.com>
79 +
80 + Backport from mainline r215540
81 + 2014-09-24 Zhenqiang Chen <zhenqiang.chen@arm.com>
82 +
83 + * ira-color.c (assign_hard_reg): Ignore conflict cost if the
84 + HARD_REGNO is not availabe for CONFLICT_A.
85 +
86 + testsuite/ChangeLog:
87 + 2014-09-24 Zhenqiang Chen <zhenqiang.chen@arm.com>
88 +
89 + * gcc.target/arm/pr63210.c: New test.
90 +
91 +2014-10-08 Zhenqiang Chen <zhenqiang.chen@arm.com>
92 +
93 + Backport from mainline r213691
94 + 2014-08-07 Zhenqiang Chen <zhenqiang.chen@arm.com>
95 +
96 + * tree-ssa-loop-ivopts.c (get_address_cost): Try aligned offset.
97 +
98 + testsuite/ChangeLog
99 + 2014-08-07 Zhenqiang Chen <zhenqiang.chen@arm.com>
100 +
101 + * gcc.target/arm/get_address_cost_aligned_max_offset.c: New test.
102 +
103 +2014-10-06 Terry Guo <terry.guo@arm.com>
104 +
105 + Backport from mainline r215711
106 + 2014-09-30 Terry Guo <terry.guo@arm.com>
107 +
108 + * config/arm/arm-cores.def (cortex-m7): New core name.
109 + * config/arm/arm-fpus.def (fpv5-sp-d16): New fpu name.
110 + (fpv5-d16): Ditto.
111 + * config/arm/arm-tables.opt: Regenerated.
112 + * config/arm/arm-tune.md: Regenerated.
113 + * config/arm/arm.h (TARGET_VFP5): New macro.
114 + * config/arm/bpabi.h (BE8_LINK_SPEC): Include cortex-m7.
115 + * config/arm/vfp.md (<vrint_pattern><SDF:mode>2,
116 + smax<mode>3, smin<mode>3): Enabled for FPU FPv5.
117 + * doc/invoke.texi: Document new cpu and fpu names.
118 +
119 +2014-10-05 Terry Guo <terry.guo@arm.com>
120 +
121 + Backport from mainline r212750
122 + 2014-07-17 Terry Guo <terry.guo@arm.com>
123 +
124 + * config/arm/types.md (alu_reg): Replaced by alu_sreg and alu_dsp_reg.
125 + (alus_reg): Renamed to alus_sreg.
126 + * config/arm/arm-fixed.md: Change type of non-dsp instructions
127 + from alu_reg to alu_sreg. Change type of dsp instructions from
128 + alu_reg to alu_dsp_reg.
129 + * config/arm/thumb1.md: Likewise.
130 + * config/arm/thumb2.md: Likewise.
131 + * config/arm/arm.c (cortexa7_older_only): Use new ALU type names.
132 + * config/arm/arm1020e.md (1020alu_op): Replace alu_reg and alus_reg
133 + with alu_sreg and alus_sreg.
134 + * config/arm/arm1026ejs.md (alu_op): Likewise.
135 + * config/arm/arm1136jfs.md (11_alu_op): Likewise.
136 + * config/arm/arm926ejs.md (9_alu_op): Likewise.
137 + * config/arm/fa526.md (526_alu_op): Likewise.
138 + * config/arm/fa606te.md (606te_alu_op): Likewise.
139 + * config/arm/fa626te.md (626te_alu_op): Likewise.
140 + * config/arm/fa726te.md (726te_alu_op): Likewise.
141 + * config/arm/fmp626.md (mp626_alu_op): Likewise.
142 + * config/arm/arm.md (core_cycles): Replace alu_reg and alus_reg with
143 + alu_sreg, alu_dsp_reg and alus_sreg.
144 + * config/arm/cortex-a15.md (cortex_a15_alu): Likewise.
145 + * config/arm/cortex-a5.md (cortex_a5_alu): Likewise.
146 + * config/arm/cortex-a53.md (cortex_a53_alu): Likewise.
147 + * config/arm/cortex-a7.md (cortex_a7_alu_sreg): Likewise.
148 + * config/arm/cortex-a8.md (cortex_a8_alu): Likewise.
149 + * config/arm/cortex-a9.md (cortex_a9_dp): Likewise.
150 + * config/arm/cortex-m4.md (cortex_m4_alu): Likewise.
151 + * config/arm/cortex-r4.md (cortex_r4_alu): Likewise.
152 + * config/arm/marvell-pj4.md (pj4_alu, pj4_alu_conds): Likewise.
153 + * config/aarch64/aarch64.md (*addsi3_aarch64, *addsi3_aarch64_uxtw,
154 + subsi3, *adddi3_aarch64, *subsi3_uxtw, subdi3, absdi2, neg<mode>2,
155 + *negsi2_uxtw, tlsle_small_<mode>): Rename type alu_reg to alu_sreg.
156 + (add<mode>3_compare0, *addsi3_compare0_uxtw, *add<mode>3nr_compare0,
157 + sub<mode>3_compare0, *compare_neg<mode>, *neg<mode>2_compare0,
158 + subsi3_compare0_uxtw, *negsi2_compare0_uxtw, *cmp<mode>): Rename type
159 + alus_reg to alus_sreg.
160 +
161 +2014-10-05 Terry Guo <terry.guo@arm.com>
162 +
163 + Backport from mainline r211443
164 + 2014-06-11 Terry Guo <terry.guo@arm.com>
165 +
166 + * config/arm/arm.md (*thumb1_adddi3): Move into new file thumb1.md.
167 + (*thumb1_addsi3): Ditto.
168 + (*thumb_subdi3): Ditto.
169 + (thumb1_subsi3_insn): Ditto.
170 + (*thumb_mulsi3): Ditto.
171 + (*thumb_mulsi3_v6): Ditto.
172 + (*thumb1_andsi3_insn): Ditto.
173 + (thumb1_bicsi3): Ditto.
174 + (*thumb1_iorsi3_insn): Ditto.
175 + (*thumb1_xorsi3_insn): Ditto.
176 + (*thumb1_ashlsi3): Ditto.
177 + (*thumb1_ashrsi3): Ditto.
178 + (*thumb1_lshrsi3): Ditto.
179 + (*thumb1_rotrsi3): Ditto.
180 + (*thumb1_negdi2): Ditto.
181 + (*thumb1_negsi2): Ditto.
182 + (*thumb1_abssi2): Ditto.
183 + (*thumb1_neg_abssi2): Ditto.
184 + (*thumb1_one_cmplsi2): Ditto.
185 + (*thumb1_zero_extendhisi2): Ditto.
186 + (*thumb1_zero_extendqisi2): Ditto.
187 + (*thumb1_zero_extendqisi2_v6): Ditto.
188 + (thumb1_extendhisi2): Ditto.
189 + (thumb1_extendqisi2): Ditto.
190 + (*thumb1_movdi_insn): Ditto.
191 + (*thumb1_movsi_insn): Ditto.
192 + (*thumb1_movhi_insn): Ditto.
193 + (thumb_movhi_clobber): Ditto.
194 + (*thumb1_movqi_insn): Ditto.
195 + (*thumb1_movhf): Ditto.
196 + (*thumb1_movsf_insn): Ditto.
197 + (*thumb_movdf_insn): Ditto.
198 + (movmem12b): Ditto.
199 + (movmem8b): Ditto.
200 + (cbranchqi4): Ditto.
201 + (cbranchsi4_insn): Ditto.
202 + (cbranchsi4_scratch): Ditto.
203 + (*negated_cbranchsi4): Ditto.
204 + (*tbit_cbranch): Ditto.
205 + (*tlobits_cbranch): Ditto.
206 + (*tstsi3_cbranch): Ditto.
207 + (*cbranchne_decr1): Ditto.
208 + (*addsi3_cbranch): Ditto.
209 + (*addsi3_cbranch_scratch): Ditto.
210 + (*thumb_cmpdi_zero): Ditto.
211 + (cstoresi_eq0_thumb1): Ditto.
212 + (cstoresi_ne0_thumb1): Ditto.
213 + (*cstoresi_eq0_thumb1_insn): Ditto.
214 + (*cstoresi_ne0_thumb1_insn): Ditto.
215 + (cstoresi_nltu_thumb1): Ditto.
216 + (cstoresi_ltu_thumb1): Ditto.
217 + (thumb1_addsi3_addgeu): Ditto.
218 + (*thumb_jump): Ditto.
219 + (*call_reg_thumb1_v5): Ditto.
220 + (*call_reg_thumb1): Ditto.
221 + (*call_value_reg_thumb1_v5): Ditto.
222 + (*call_value_reg_thumb1): Ditto.
223 + (*call_insn): Ditto.
224 + (*call_value_insn): Ditto.
225 + (thumb1_casesi_internal_pic): Ditto.
226 + (thumb1_casesi_dispatch): Ditto.
227 + (*thumb1_indirect_jump): Ditto.
228 + (prologue_thumb1_interwork): Ditto.
229 + (*epilogue_insns): Ditto.
230 + (consttable_1): Ditto.
231 + (consttable_2): Ditto.
232 + (tablejump): Ditto.
233 + (*thumb1_tablejump): Ditto.
234 + (thumb_eh_return): Ditto.
235 + (define_peephole2): Two of them are thumb1 only and got moved into
236 + new file thumb1.md.
237 + (define_split): Six of them are thumb1 only and got moved into new
238 + file thumb1.md.
239 + * config/arm/thumb1.md: New file comprised of above thumb1 only
240 + patterns.
241 +
242 +2014-09-30 Zhenqiang Chen <zhenqiang.chen@arm.com>
243 +
244 + * config/arm/arm.c (arm_option_override): Disable loop2_invariant
245 + pass when optimize_size and ira-loop-pressure is not enabled.
246 +
247 +2014-05-12 Terry Guo <terry.guo@arm.com>
248 +
249 + * config.gcc (--with-multilib-list): Accept arm embedded cores.
250 + * configure.ac (with_multilib_list): Export for being used in arm
251 + embedded multilib fragment.
252 + * configure: Regenerated.
253 + * Makefile.in (with_multilib_list): Import for being used in
254 + multilib fragment.
255 + * config/arm/t-rmprofile: New multilib fragment for arm embedded
256 + cores.
0 diff --git a/configure b/configure
1 index d9304d9..d769d93 100755
2 --- a/configure
3 +++ b/configure
4 @@ -3868,7 +3868,7 @@ fi
5 *-mingw*)
6 host_makefile_frag="config/mh-mingw"
7 ;;
8 - alpha*-linux*)
9 + alpha*-*-linux*)
10 host_makefile_frag="config/mh-alpha-linux"
11 ;;
12 hppa*-hp-hpux10*)
13 diff --git a/configure.ac b/configure.ac
14 index 41a30dd..2aee14a 100644
15 --- a/configure.ac
16 +++ b/configure.ac
17 @@ -1177,7 +1177,7 @@ case "${host}" in
18 *-mingw*)
19 host_makefile_frag="config/mh-mingw"
20 ;;
21 - alpha*-linux*)
22 + alpha*-*-linux*)
23 host_makefile_frag="config/mh-alpha-linux"
24 ;;
25 hppa*-hp-hpux10*)
25726 diff --git a/gcc/Makefile.in b/gcc/Makefile.in
25827 index b47733c..f9e76ad 100644
25928 --- a/gcc/Makefile.in
27443 tree-ssa-address.o \
27544 tree-ssa-alias.o \
27645 tree-ssa-ccp.o \
46 diff --git a/gcc/ada/gcc-interface/utils2.c b/gcc/ada/gcc-interface/utils2.c
47 index e17cae3..da52f41 100644
48 --- a/gcc/ada/gcc-interface/utils2.c
49 +++ b/gcc/ada/gcc-interface/utils2.c
50 @@ -2792,12 +2792,6 @@ gnat_invariant_expr (tree expr)
51 expr = remove_conversions (expr, false);
52 }
53
54 - /* We are only interested in scalar types at the moment and, even if we may
55 - have gone through padding types in the above loop, we must be back to a
56 - scalar value at this point. */
57 - if (AGGREGATE_TYPE_P (TREE_TYPE (expr)))
58 - return NULL_TREE;
59 -
60 if (TREE_CONSTANT (expr))
61 return fold_convert (type, expr);
62
63 diff --git a/gcc/c-family/c-ada-spec.c b/gcc/c-family/c-ada-spec.c
64 index f23869e..fc21b62 100644
65 --- a/gcc/c-family/c-ada-spec.c
66 +++ b/gcc/c-family/c-ada-spec.c
67 @@ -1392,7 +1392,7 @@ dump_ada_double_name (pretty_printer *buffer, tree t1, tree t2, const char *s)
68
69 pp_underscore (buffer);
70
71 - if (DECL_NAME (t2))
72 + if (DECL_NAME (t1))
73 pp_ada_tree_identifier (buffer, DECL_NAME (t2), t2, false);
74 else
75 {
76 @@ -2538,9 +2538,18 @@ static void
77 print_destructor (pretty_printer *buffer, tree t)
78 {
79 tree decl_name = DECL_NAME (DECL_ORIGIN (t));
80 + const char *s = IDENTIFIER_POINTER (decl_name);
81
82 - pp_string (buffer, "Delete_");
83 - pp_ada_tree_identifier (buffer, decl_name, t, false);
84 + if (*s == '_')
85 + {
86 + for (s += 2; *s != ' '; s++)
87 + pp_character (buffer, *s);
88 + }
89 + else
90 + {
91 + pp_string (buffer, "Delete_");
92 + pp_ada_tree_identifier (buffer, decl_name, t, false);
93 + }
94 }
95
96 /* Return the name of type T. */
97 diff --git a/gcc/cgraphunit.c b/gcc/cgraphunit.c
98 index f189980..8f57607 100644
99 --- a/gcc/cgraphunit.c
100 +++ b/gcc/cgraphunit.c
101 @@ -1532,7 +1532,6 @@ expand_thunk (struct cgraph_node *node, bool output_asm_thunks)
102
103 gimple call;
104 gimple ret;
105 - bool alias_is_noreturn = TREE_THIS_VOLATILE (alias);
106
107 if (in_lto_p)
108 cgraph_get_body (node);
109 @@ -1567,22 +1566,15 @@ expand_thunk (struct cgraph_node *node, bool output_asm_thunks)
110 bsi = gsi_start_bb (bb);
111
112 /* Build call to the function being thunked. */
113 - if (!VOID_TYPE_P (restype) && !alias_is_noreturn)
114 + if (!VOID_TYPE_P (restype))
115 {
116 if (DECL_BY_REFERENCE (resdecl))
117 restmp = gimple_fold_indirect_ref (resdecl);
118 else if (!is_gimple_reg_type (restype))
119 {
120 - if (aggregate_value_p (resdecl, TREE_TYPE (thunk_fndecl)))
121 - {
122 - restmp = resdecl;
123 -
124 - if (TREE_CODE (restmp) == VAR_DECL)
125 - add_local_decl (cfun, restmp);
126 - BLOCK_VARS (DECL_INITIAL (current_function_decl)) = restmp;
127 - }
128 - else
129 - restmp = create_tmp_var (restype, "retval");
130 + restmp = resdecl;
131 + add_local_decl (cfun, restmp);
132 + BLOCK_VARS (DECL_INITIAL (current_function_decl)) = restmp;
133 }
134 else
135 restmp = create_tmp_reg (restype, "retval");
136 @@ -1613,14 +1605,14 @@ expand_thunk (struct cgraph_node *node, bool output_asm_thunks)
137 call = gimple_build_call_vec (build_fold_addr_expr_loc (0, alias), vargs);
138 node->callees->call_stmt = call;
139 gimple_call_set_from_thunk (call, true);
140 - if (restmp && !alias_is_noreturn)
141 + if (restmp)
142 {
143 gimple_call_set_lhs (call, restmp);
144 gcc_assert (useless_type_conversion_p (TREE_TYPE (restmp),
145 TREE_TYPE (TREE_TYPE (alias))));
146 }
147 gsi_insert_after (&bsi, call, GSI_NEW_STMT);
148 - if (!alias_is_noreturn)
149 + if (!(gimple_call_flags (call) & ECF_NORETURN))
150 {
151 if (restmp && !this_adjusting
152 && (fixed_offset || virtual_offset))
153 diff --git a/gcc/collect2.c b/gcc/collect2.c
154 index 7a76a12..2c587a0 100644
155 --- a/gcc/collect2.c
156 +++ b/gcc/collect2.c
157 @@ -848,8 +848,6 @@ maybe_run_lto_and_relink (char **lto_ld_argv, char **object_lst,
158 fork_execute ("ld", lto_ld_argv);
159 post_ld_pass (false);
160 }
161 - else
162 - post_ld_pass (true);
163 }
164
165 /* Main program. */
277166 diff --git a/gcc/common.opt b/gcc/common.opt
278 index 2259f29..8b2c055 100644
167 index 51ddd77..6cba588 100644
279168 --- a/gcc/common.opt
280169 +++ b/gcc/common.opt
281 @@ -2197,6 +2197,10 @@ ftree-sra
170 @@ -2202,6 +2202,10 @@ ftree-sra
282171 Common Report Var(flag_tree_sra) Optimization
283172 Perform scalar replacement of aggregates
284173
290179 Common Report Var(flag_tree_ter) Optimization
291180 Replace temporary expressions in the SSA->normal pass
292181 diff --git a/gcc/config.gcc b/gcc/config.gcc
293 index 90d4f71..1e1d671 100644
182 index d2bb780..1e1d671 100644
294183 --- a/gcc/config.gcc
295184 +++ b/gcc/config.gcc
296 @@ -3619,6 +3619,18 @@ case "${target}" in
185 @@ -2273,32 +2273,28 @@ powerpc-*-rtems*)
186 powerpc*-*-linux*)
187 tm_file="${tm_file} dbxelf.h elfos.h freebsd-spec.h rs6000/sysv4.h"
188 extra_options="${extra_options} rs6000/sysv4.opt"
189 - tmake_file="${tmake_file} rs6000/t-fprules rs6000/t-ppccomm"
190 + tmake_file="rs6000/t-fprules rs6000/t-ppcos ${tmake_file} rs6000/t-ppccomm"
191 extra_objs="$extra_objs rs6000-linux.o"
192 case ${target} in
193 powerpc*le-*-*)
194 tm_file="${tm_file} rs6000/sysv4le.h" ;;
195 esac
196 - case ${target}:${with_cpu} in
197 - powerpc64*: | powerpc64*:native) cpu_is_64bit=yes ;;
198 - esac
199 - maybe_biarch=${cpu_is_64bit}
200 - case ${enable_targets} in
201 - *powerpc64*) maybe_biarch=yes ;;
202 - esac
203 + maybe_biarch=yes
204 case ${target} in
205 powerpc64*-*-linux*spe* | powerpc64*-*-linux*paired*)
206 - echo "*** Configuration ${target} not supported" 1>&2
207 + echo "*** Configuration ${target} not supported" 1>&2
208 exit 1
209 ;;
210 powerpc*-*-linux*spe* | powerpc*-*-linux*paired*)
211 maybe_biarch=
212 ;;
213 + powerpc64*-*-linux*)
214 + test x$with_cpu != x || cpu_is_64bit=yes
215 + maybe_biarch=always
216 + ;;
217 esac
218 - case ${target}:${enable_targets}:${maybe_biarch} in
219 - powerpc64-* | powerpc-*:*:yes | *:*powerpc64-*:yes | *:all:yes \
220 - | powerpc64le*:*powerpcle* | powerpc64le*:*powerpc-* \
221 - | powerpcle-*:*powerpc64le*:yes)
222 + case ${maybe_biarch}:${enable_targets}:${cpu_is_64bit} in
223 + always:* | yes:*powerpc64* | yes:all:* | yes:*:yes)
224 if test x$cpu_is_64bit = xyes; then
225 tm_file="${tm_file} rs6000/default64.h"
226 fi
227 @@ -2319,14 +2315,9 @@ powerpc*-*-linux*)
228 esac
229 extra_options="${extra_options} rs6000/linux64.opt"
230 ;;
231 - powerpc64*)
232 - tm_file="${tm_file} rs6000/default64.h rs6000/linux64.h glibc-stdint.h"
233 - extra_options="${extra_options} rs6000/linux64.opt"
234 - tmake_file="${tmake_file} rs6000/t-linux"
235 - ;;
236 *)
237 tm_file="${tm_file} rs6000/linux.h glibc-stdint.h"
238 - tmake_file="${tmake_file} rs6000/t-ppcos rs6000/t-linux"
239 + tmake_file="$tmake_file rs6000/t-linux"
240 ;;
241 esac
242 case ${target} in
243 @@ -3628,6 +3619,18 @@ case "${target}" in
297244 tmake_file="${tmake_file} arm/t-aprofile"
298245 break
299246 ;;
312259 default)
313260 ;;
314261 *)
262 diff --git a/gcc/config.in b/gcc/config.in
263 index ba3b7fc..de4f090 100644
264 --- a/gcc/config.in
265 +++ b/gcc/config.in
266 @@ -211,12 +211,6 @@
267 #endif
268
269
270 -/* Define if your assembler supports -mrmw option. */
271 -#ifndef USED_FOR_TARGET
272 -#undef HAVE_AS_AVR_MRMW_OPTION
273 -#endif
274 -
275 -
276 /* Define if your assembler supports cmpb. */
277 #ifndef USED_FOR_TARGET
278 #undef HAVE_AS_CMPB
279 @@ -241,12 +235,6 @@
280 #endif
281
282
283 -/* Define if your assembler supports .module. */
284 -#ifndef USED_FOR_TARGET
285 -#undef HAVE_AS_DOT_MODULE
286 -#endif
287 -
288 -
289 /* Define if your assembler supports DSPR1 mult. */
290 #ifndef USED_FOR_TARGET
291 #undef HAVE_AS_DSPR1_MULT
292 @@ -459,6 +447,12 @@
293 #endif
294
295
296 +/* Define if the assembler understands .module. */
297 +#ifndef USED_FOR_TARGET
298 +#undef HAVE_AS_DOT_MODULE
299 +#endif
300 +
301 +
302 /* Define if your assembler supports the -no-mul-bug-abort option. */
303 #ifndef USED_FOR_TARGET
304 #undef HAVE_AS_NO_MUL_BUG_ABORT_OPTION
305 diff --git a/gcc/config/aarch64/aarch64-elf-raw.h b/gcc/config/aarch64/aarch64-elf-raw.h
306 index 48e3dfb..eafdd55 100644
307 --- a/gcc/config/aarch64/aarch64-elf-raw.h
308 +++ b/gcc/config/aarch64/aarch64-elf-raw.h
309 @@ -33,19 +33,10 @@
310 " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
311 #endif
312
313 -#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT
314 -#define CA53_ERR_843419_SPEC \
315 - " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
316 -#else
317 -#define CA53_ERR_843419_SPEC \
318 - " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}"
319 -#endif
320 -
321 #ifndef LINK_SPEC
322 #define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X \
323 -maarch64elf%{mabi=ilp32*:32}%{mbig-endian:b}" \
324 - CA53_ERR_835769_SPEC \
325 - CA53_ERR_843419_SPEC
326 + CA53_ERR_835769_SPEC
327 #endif
328
329 #endif /* GCC_AARCH64_ELF_RAW_H */
330 diff --git a/gcc/config/aarch64/aarch64-linux.h b/gcc/config/aarch64/aarch64-linux.h
331 index b7d2d60..c47fbae 100644
332 --- a/gcc/config/aarch64/aarch64-linux.h
333 +++ b/gcc/config/aarch64/aarch64-linux.h
334 @@ -43,17 +43,8 @@
335 " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
336 #endif
337
338 -#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT
339 -#define CA53_ERR_843419_SPEC \
340 - " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
341 -#else
342 -#define CA53_ERR_843419_SPEC \
343 - " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}"
344 -#endif
345 -
346 #define LINK_SPEC LINUX_TARGET_LINK_SPEC \
347 - CA53_ERR_835769_SPEC \
348 - CA53_ERR_843419_SPEC
349 + CA53_ERR_835769_SPEC
350
351 #define TARGET_OS_CPP_BUILTINS() \
352 do \
353 diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
354 index 1113211..bef58bf 100644
355 --- a/gcc/config/aarch64/aarch64-protos.h
356 +++ b/gcc/config/aarch64/aarch64-protos.h
357 @@ -195,7 +195,7 @@ bool aarch64_uimm12_shift (HOST_WIDE_INT);
358 const char *aarch64_output_casesi (rtx *);
359 const char *aarch64_rewrite_selected_cpu (const char *name);
360
361 -enum aarch64_symbol_type aarch64_classify_symbol (rtx, rtx,
362 +enum aarch64_symbol_type aarch64_classify_symbol (rtx,
363 enum aarch64_symbol_context);
364 enum aarch64_symbol_type aarch64_classify_tls_symbol (rtx);
365 enum reg_class aarch64_regno_regclass (unsigned);
366 diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
367 index c0296fa..408d8cb 100644
368 --- a/gcc/config/aarch64/aarch64.c
369 +++ b/gcc/config/aarch64/aarch64.c
370 @@ -919,7 +919,7 @@ aarch64_expand_mov_immediate (rtx dest, rtx imm)
371 before we start classifying the symbol. */
372 split_const (imm, &base, &offset);
373
374 - sty = aarch64_classify_symbol (base, offset, SYMBOL_CONTEXT_ADR);
375 + sty = aarch64_classify_symbol (base, SYMBOL_CONTEXT_ADR);
376 switch (sty)
377 {
378 case SYMBOL_FORCE_TO_MEM:
379 @@ -2787,7 +2787,7 @@ aarch64_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x)
380 split_const (x, &base, &offset);
381 if (GET_CODE (base) == SYMBOL_REF || GET_CODE (base) == LABEL_REF)
382 {
383 - if (aarch64_classify_symbol (base, offset, SYMBOL_CONTEXT_ADR)
384 + if (aarch64_classify_symbol (base, SYMBOL_CONTEXT_ADR)
385 != SYMBOL_FORCE_TO_MEM)
386 return true;
387 else
388 @@ -3186,7 +3186,7 @@ aarch64_classify_address (struct aarch64_address_info *info,
389 rtx sym, offs;
390 split_const (info->offset, &sym, &offs);
391 if (GET_CODE (sym) == SYMBOL_REF
392 - && (aarch64_classify_symbol (sym, offs, SYMBOL_CONTEXT_MEM)
393 + && (aarch64_classify_symbol (sym, SYMBOL_CONTEXT_MEM)
394 == SYMBOL_SMALL_ABSOLUTE))
395 {
396 /* The symbol and offset must be aligned to the access size. */
397 @@ -3243,7 +3243,7 @@ aarch64_classify_symbolic_expression (rtx x,
398 rtx offset;
399
400 split_const (x, &x, &offset);
401 - return aarch64_classify_symbol (x, offset, context);
402 + return aarch64_classify_symbol (x, context);
403 }
404
405
406 @@ -5374,7 +5374,7 @@ aarch64_classify_tls_symbol (rtx x)
407 LABEL_REF X in context CONTEXT. */
408
409 enum aarch64_symbol_type
410 -aarch64_classify_symbol (rtx x, rtx offset,
411 +aarch64_classify_symbol (rtx x,
412 enum aarch64_symbol_context context ATTRIBUTE_UNUSED)
413 {
414 if (GET_CODE (x) == LABEL_REF)
415 @@ -5408,25 +5408,12 @@ aarch64_classify_symbol (rtx x, rtx offset,
416 switch (aarch64_cmodel)
417 {
418 case AARCH64_CMODEL_TINY:
419 - /* When we retreive symbol + offset address, we have to make sure
420 - the offset does not cause overflow of the final address. But
421 - we have no way of knowing the address of symbol at compile time
422 - so we can't accurately say if the distance between the PC and
423 - symbol + offset is outside the addressible range of +/-1M in the
424 - TINY code model. So we rely on images not being greater than
425 - 1M and cap the offset at 1M and anything beyond 1M will have to
426 - be loaded using an alternative mechanism. */
427 - if (SYMBOL_REF_WEAK (x)
428 - || INTVAL (offset) < -1048575 || INTVAL (offset) > 1048575)
429 + if (SYMBOL_REF_WEAK (x))
430 return SYMBOL_FORCE_TO_MEM;
431 return SYMBOL_TINY_ABSOLUTE;
432
433 case AARCH64_CMODEL_SMALL:
434 - /* Same reasoning as the tiny code model, but the offset cap here is
435 - 4G. */
436 - if (SYMBOL_REF_WEAK (x)
437 - || INTVAL (offset) < (HOST_WIDE_INT) -4294967263
438 - || INTVAL (offset) > (HOST_WIDE_INT) 4294967264)
439 + if (SYMBOL_REF_WEAK (x))
440 return SYMBOL_FORCE_TO_MEM;
441 return SYMBOL_SMALL_ABSOLUTE;
442
315443 diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
316 index 46d9e9f..18f6924 100644
444 index 1085e4d..47c83a7 100644
317445 --- a/gcc/config/aarch64/aarch64.md
318446 +++ b/gcc/config/aarch64/aarch64.md
319447 @@ -1072,7 +1072,7 @@
478606 )
479607
480608 (define_insn "*cmp<mode>"
481 @@ -3521,7 +3521,7 @@
609 @@ -2719,8 +2719,6 @@
610 DONE;
611 }
612 }
613 - else
614 - FAIL;
615 }
616 )
617
618 @@ -2949,6 +2947,15 @@
619 [(set_attr "type" "shift_reg")]
620 )
621
622 +(define_insn "*ashl<mode>3_insn"
623 + [(set (match_operand:SHORT 0 "register_operand" "=r")
624 + (ashift:SHORT (match_operand:SHORT 1 "register_operand" "r")
625 + (match_operand:QI 2 "aarch64_reg_or_shift_imm_si" "rUss")))]
626 + ""
627 + "lsl\\t%<w>0, %<w>1, %<w>2"
628 + [(set_attr "type" "shift_reg")]
629 +)
630 +
631 (define_insn "*<optab><mode>3_insn"
632 [(set (match_operand:SHORT 0 "register_operand" "=r")
633 (ASHIFT:SHORT (match_operand:SHORT 1 "register_operand" "r")
634 @@ -3518,7 +3525,7 @@
482635 (match_operand 2 "aarch64_valid_symref" "S")))]
483636 ""
484637 "add\\t%<w>0, %<w>1, :lo12:%a2"
487640 )
488641
489642 (define_insn "ldr_got_small_<mode>"
490 @@ -3605,7 +3605,7 @@
643 @@ -3602,7 +3609,7 @@
491644 UNSPEC_GOTSMALLTLS))]
492645 ""
493646 "add\\t%0, %1, #%G2\;add\\t%0, %0, #%L2"
496649 (set_attr "length" "8")]
497650 )
498651
652 diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt
653 index 266d873..fc0307e 100644
654 --- a/gcc/config/aarch64/aarch64.opt
655 +++ b/gcc/config/aarch64/aarch64.opt
656 @@ -71,10 +71,6 @@ mfix-cortex-a53-835769
657 Target Report Var(aarch64_fix_a53_err835769) Init(2)
658 Workaround for ARM Cortex-A53 Erratum number 835769
659
660 -mfix-cortex-a53-843419
661 -Target Report
662 -Workaround for ARM Cortex-A53 Erratum number 843419
663 -
664 mlittle-endian
665 Target Report RejectNegative InverseMask(BIG_END)
666 Assume target CPU is configured as little endian
499667 diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
500 index 56041ec..f65771a 100644
668 index 56041ec..c8dbfdd 100644
501669 --- a/gcc/config/arm/arm-cores.def
502670 +++ b/gcc/config/arm/arm-cores.def
503671 @@ -137,6 +137,11 @@ ARM_CORE("cortex-m1", cortexm1, cortexm1, 6M, FL_LDSCHED, v6m)
516684 ARM_CORE("cortex-r4f", cortexr4f, cortexr4f, 7R, FL_LDSCHED, cortex)
517685 ARM_CORE("cortex-r5", cortexr5, cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
518686 ARM_CORE("cortex-r7", cortexr7, cortexr7, 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
519 +ARM_CORE("cortex-m7", cortexm7, cortexm7, 7EM, FL_LDSCHED, cortex_m7)
687 +ARM_CORE("cortex-m7", cortexm7, cortexm7, 7EM, FL_LDSCHED | FL_NO_VOLATILE_CE, cortex_m7)
520688 ARM_CORE("cortex-m4", cortexm4, cortexm4, 7EM, FL_LDSCHED, v7m)
521689 ARM_CORE("cortex-m3", cortexm3, cortexm3, 7M, FL_LDSCHED, v7m)
522690 ARM_CORE("marvell-pj4", marvell_pj4, marvell_pj4, 7A, FL_LDSCHED, 9e)
689857 + cortexa57cortexa53"
690858 (const (symbol_ref "((enum attr_tune) arm_tune)")))
691859 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
692 index 5e2571c..f0da3b3 100644
860 index 4fea1a6..97238e6 100644
693861 --- a/gcc/config/arm/arm.c
694862 +++ b/gcc/config/arm/arm.c
695863 @@ -59,6 +59,7 @@
700868
701869 /* Forward definitions of types. */
702870 typedef struct minipool_node Mnode;
703 @@ -740,6 +741,8 @@ static int thumb_call_reg_needed;
871 @@ -740,6 +741,10 @@ static int thumb_call_reg_needed;
704872 #define FL_ARCH8 (1 << 24) /* Architecture 8. */
705873 #define FL_CRC32 (1 << 25) /* ARMv8 CRC32 instructions. */
706874
707875 +#define FL_SMALLMUL (1 << 26) /* Small multiply supported. */
708876 +
877 +#define FL_NO_VOLATILE_CE (1 << 27) /* No volatile memory in IT block. */
878 +
709879 #define FL_IWMMXT (1 << 29) /* XScale v2 or "Intel Wireless MMX technology". */
710880 #define FL_IWMMXT2 (1 << 30) /* "Intel Wireless MMX2 technology". */
711881
712 @@ -907,6 +910,9 @@ int arm_condexec_masklen = 0;
882 @@ -868,6 +873,9 @@ int arm_arch_thumb2;
883 int arm_arch_arm_hwdiv;
884 int arm_arch_thumb_hwdiv;
885
886 +/* Nonzero if chip disallows volatile memory access in IT block. */
887 +int arm_arch_no_volatile_ce;
888 +
889 /* Nonzero if we should use Neon to handle 64-bits operations rather
890 than core registers. */
891 int prefer_neon_for_64bits = 0;
892 @@ -907,6 +915,9 @@ int arm_condexec_masklen = 0;
713893 /* Nonzero if chip supports the ARMv8 CRC instructions. */
714894 int arm_arch_crc = 0;
715895
719899 /* The condition codes of the ARM, and the inverse function. */
720900 static const char * const arm_condition_codes[] =
721901 {
722 @@ -1724,6 +1730,24 @@ const struct tune_params arm_v7m_tune =
902 @@ -1724,6 +1735,24 @@ const struct tune_params arm_v7m_tune =
723903 false /* Prefer Neon for 64-bits bitops. */
724904 };
725905
744924 /* The arm_v6m_tune is duplicated from arm_cortex_tune, rather than
745925 arm_v6t2_tune. It is used for cortex-m0, cortex-m1 and cortex-m0plus. */
746926 const struct tune_params arm_v6m_tune =
747 @@ -2503,6 +2527,7 @@ arm_option_override (void)
927 @@ -2501,8 +2530,10 @@ arm_option_override (void)
928 arm_arch_iwmmxt2 = (insn_flags & FL_IWMMXT2) != 0;
929 arm_arch_thumb_hwdiv = (insn_flags & FL_THUMB_DIV) != 0;
748930 arm_arch_arm_hwdiv = (insn_flags & FL_ARM_DIV) != 0;
931 + arm_arch_no_volatile_ce = (insn_flags & FL_NO_VOLATILE_CE) != 0;
749932 arm_tune_cortex_a9 = (arm_tune == cortexa9) != 0;
750933 arm_arch_crc = (insn_flags & FL_CRC32) != 0;
751934 + arm_m_profile_small_mul = (insn_flags & FL_SMALLMUL) != 0;
752935 if (arm_restrict_it == 2)
753936 arm_restrict_it = arm_arch8 && TARGET_THUMB2;
754937
755 @@ -2818,6 +2843,13 @@ arm_option_override (void)
938 @@ -2818,6 +2849,13 @@ arm_option_override (void)
756939 if (TARGET_APCS_FRAME)
757940 flag_shrink_wrap = false;
758941
766949 /* We only support -mslow-flash-data on armv7-m targets. */
767950 if (target_slow_flash_data
768951 && ((!(arm_arch7 && !arm_arch_notm) && !arm_arch7em)
769 @@ -8637,7 +8669,13 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer)
952 @@ -8637,7 +8675,13 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer)
770953 /* Thumb1 mul instruction can't operate on const. We must Load it
771954 into a register first. */
772955 int const_size = thumb1_size_rtx_costs (XEXP (x, 1), CONST_INT, SET);
781964 }
782965 return COSTS_N_INSNS (1);
783966
784 @@ -8645,9 +8683,11 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer)
967 @@ -8645,9 +8689,11 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer)
785968 /* A SET doesn't have a mode, so let's look at the SET_DEST to get
786969 the mode. */
787970 words = ARM_NUM_INTS (GET_MODE_SIZE (GET_MODE (SET_DEST (x))));
796979
797980 case CONST_INT:
798981 if (outer == SET)
799 @@ -8700,16 +8740,14 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer)
982 @@ -8700,16 +8746,14 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer)
800983 case AND:
801984 case XOR:
802985 case IOR:
8181001
8191002 case IF_THEN_ELSE:
8201003 /* XXX a guess. */
821 @@ -10969,7 +11007,11 @@ arm_9e_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
1004 @@ -10969,7 +11013,11 @@ arm_9e_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
8221005 switch (code)
8231006 {
8241007 case MULT:
8311014 return true;
8321015
8331016 default:
834 @@ -11385,8 +11427,9 @@ cortexa7_older_only (rtx insn)
1017 @@ -11385,8 +11433,9 @@ cortexa7_older_only (rtx insn)
8351018
8361019 switch (get_attr_type (insn))
8371020 {
8431026 case TYPE_LOGIC_REG:
8441027 case TYPE_LOGICS_REG:
8451028 case TYPE_ADC_REG:
846 @@ -29412,6 +29455,7 @@ arm_issue_rate (void)
1029 @@ -16274,7 +16323,7 @@ dump_minipool (rtx scan)
1030 fputc ('\n', dump_file);
1031 }
1032
1033 - switch (GET_MODE_SIZE (mp->mode))
1034 + switch (mp->fix_size)
1035 {
1036 #ifdef HAVE_consttable_1
1037 case 1:
1038 @@ -27964,8 +28013,9 @@ arm_file_start (void)
1039 fpu_name = arm_fpu_desc->name;
1040 if (arm_fpu_desc->model == ARM_FP_MODEL_VFP)
1041 {
1042 - if (TARGET_HARD_FLOAT)
1043 - arm_emit_eabi_attribute ("Tag_ABI_HardFP_use", 27, 3);
1044 + if (TARGET_HARD_FLOAT && TARGET_VFP_SINGLE)
1045 + arm_emit_eabi_attribute ("Tag_ABI_HardFP_use", 27, 1);
1046 +
1047 if (TARGET_HARD_FLOAT_ABI)
1048 arm_emit_eabi_attribute ("Tag_ABI_VFP_args", 28, 1);
1049 }
1050 @@ -29420,6 +29470,7 @@ arm_issue_rate (void)
8471051 case cortexa57:
8481052 return 3;
8491053
8521056 case cortexr4f:
8531057 case cortexr5:
8541058 diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
855 index c0f2184..6ba1339 100644
1059 index 23333eb..01d485d 100644
8561060 --- a/gcc/config/arm/arm.h
8571061 +++ b/gcc/config/arm/arm.h
8581062 @@ -298,6 +298,9 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
8651069 /* FPU only supports VFP single-precision instructions. */
8661070 #define TARGET_VFP_SINGLE (TARGET_VFP && arm_fpu_desc->regs == VFP_REG_SINGLE)
8671071
1072 @@ -377,6 +380,9 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
1073 #define TARGET_IDIV ((TARGET_ARM && arm_arch_arm_hwdiv) \
1074 || (TARGET_THUMB2 && arm_arch_thumb_hwdiv))
1075
1076 +/* Nonzero if disallow volatile memory access in IT block. */
1077 +#define TARGET_NO_VOLATILE_CE (arm_arch_no_volatile_ce)
1078 +
1079 /* Should NEON be used for 64-bits bitops. */
1080 #define TARGET_PREFER_NEON_64BITS (prefer_neon_for_64bits)
1081
1082 @@ -565,6 +571,9 @@ extern int arm_arch_arm_hwdiv;
1083 /* Nonzero if chip supports integer division instruction in Thumb mode. */
1084 extern int arm_arch_thumb_hwdiv;
1085
1086 +/* Nonzero if chip disallows volatile memory access in IT block. */
1087 +extern int arm_arch_no_volatile_ce;
1088 +
1089 /* Nonzero if we should use Neon to handle 64-bits operations rather
1090 than core registers. */
1091 extern int prefer_neon_for_64bits;
8681092 diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
869 index 8119387..b8586da 100644
1093 index 7ca8162..a2ebfa7 100644
8701094 --- a/gcc/config/arm/arm.md
8711095 +++ b/gcc/config/arm/arm.md
8721096 @@ -320,8 +320,8 @@
30543278
30553279 ;; Misc insns
30563280
3281 @@ -10942,7 +9278,7 @@
3282 enum rtx_code rc = GET_CODE (operands[5]);
3283 operands[6] = gen_rtx_REG (mode, CC_REGNUM);
3284 gcc_assert (!(mode == CCFPmode || mode == CCFPEmode));
3285 - if (!REG_P (operands[2]) || REGNO (operands[2]) != REGNO (operands[0]))
3286 + if (REGNO (operands[2]) != REGNO (operands[0]))
3287 rc = reverse_condition (rc);
3288 else
3289 {
30573290 @@ -11062,10 +9398,10 @@
30583291 (set_attr_alternative "type"
30593292 [(if_then_else (match_operand 3 "const_int_operand" "")
31143347 (define_expand "eh_epilogue"
31153348 [(use (match_operand:SI 0 "register_operand" ""))
31163349 (use (match_operand:SI 1 "register_operand" ""))
3117 @@ -12222,33 +10535,6 @@
3350 @@ -12222,42 +10535,6 @@
31183351 [(set_attr "type" "no_insn")]
31193352 )
31203353
31213354 -(define_insn "consttable_1"
31223355 - [(unspec_volatile [(match_operand 0 "" "")] VUNSPEC_POOL_1)]
3123 - "TARGET_THUMB1"
3356 - "TARGET_EITHER"
31243357 - "*
31253358 - making_const_table = TRUE;
31263359 - assemble_integer (operands[0], 1, BITS_PER_WORD, 1);
31333366 -
31343367 -(define_insn "consttable_2"
31353368 - [(unspec_volatile [(match_operand 0 "" "")] VUNSPEC_POOL_2)]
3136 - "TARGET_THUMB1"
3369 - "TARGET_EITHER"
31373370 - "*
3138 - making_const_table = TRUE;
3139 - gcc_assert (GET_MODE_CLASS (GET_MODE (operands[0])) != MODE_FLOAT);
3140 - assemble_integer (operands[0], 2, BITS_PER_WORD, 1);
3141 - assemble_zeros (2);
3142 - return \"\";
3143 - "
3371 - {
3372 - rtx x = operands[0];
3373 - making_const_table = TRUE;
3374 - switch (GET_MODE_CLASS (GET_MODE (x)))
3375 - {
3376 - case MODE_FLOAT:
3377 - arm_emit_fp16_const (x);
3378 - break;
3379 - default:
3380 - assemble_integer (operands[0], 2, BITS_PER_WORD, 1);
3381 - assemble_zeros (2);
3382 - break;
3383 - }
3384 - return \"\";
3385 - }"
31443386 - [(set_attr "length" "4")
31453387 - (set_attr "type" "no_insn")]
31463388 -)
31483390 (define_insn "consttable_4"
31493391 [(unspec_volatile [(match_operand 0 "" "")] VUNSPEC_POOL_4)]
31503392 "TARGET_EITHER"
3151 @@ -12336,35 +10622,6 @@
3393 @@ -12268,12 +10545,15 @@
3394 switch (GET_MODE_CLASS (GET_MODE (x)))
3395 {
3396 case MODE_FLOAT:
3397 - {
3398 - REAL_VALUE_TYPE r;
3399 - REAL_VALUE_FROM_CONST_DOUBLE (r, x);
3400 - assemble_real (r, GET_MODE (x), BITS_PER_WORD);
3401 - break;
3402 - }
3403 + if (GET_MODE (x) == HFmode)
3404 + arm_emit_fp16_const (x);
3405 + else
3406 + {
3407 + REAL_VALUE_TYPE r;
3408 + REAL_VALUE_FROM_CONST_DOUBLE (r, x);
3409 + assemble_real (r, GET_MODE (x), BITS_PER_WORD);
3410 + }
3411 + break;
3412 default:
3413 /* XXX: Sometimes gcc does something really dumb and ends up with
3414 a HIGH in a constant pool entry, usually because it's trying to
3415 @@ -12342,35 +10622,6 @@
31523416 (set_attr "type" "no_insn")]
31533417 )
31543418
31843448 ;; V5 Instructions,
31853449
31863450 (define_insn "clzsi2"
3187 @@ -12459,22 +10716,6 @@
3451 @@ -12420,7 +10671,8 @@
3452 [(match_operator 0 "arm_comparison_operator"
3453 [(match_operand 1 "cc_register" "")
3454 (const_int 0)])]
3455 - "TARGET_32BIT"
3456 + "TARGET_32BIT
3457 + && (!TARGET_NO_VOLATILE_CE || !volatile_refs_p (PATTERN (insn)))"
3458 ""
3459 [(set_attr "predicated" "yes")]
3460 )
3461 @@ -12465,22 +10717,6 @@
31883462 }"
31893463 )
31903464
32073481
32083482 ;; TLS support
32093483
3210 @@ -12822,6 +11063,8 @@
3484 @@ -12828,6 +11064,8 @@
32113485 (include "iwmmxt.md")
32123486 ;; Load the VFP co-processor patterns
32133487 (include "vfp.md")
37113985 "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)")
37123986 diff --git a/gcc/config/arm/t-rmprofile b/gcc/config/arm/t-rmprofile
37133987 new file mode 100644
3714 index 0000000..2f57f47e
3988 index 0000000..3939461
37153989 --- /dev/null
37163990 +++ b/gcc/config/arm/t-rmprofile
3717 @@ -0,0 +1,89 @@
3991 @@ -0,0 +1,99 @@
37183992 +# A set of predefined MULTILIB which can be used for different ARM targets.
37193993 +# Via the configure option --with-multilib-list, user can customize the
37203994 +# final MULTILIB implementation.
37253999 +
37264000 +MULTILIB_OPTIONS = mthumb/marm
37274001 +MULTILIB_DIRNAMES = thumb arm
3728 +MULTILIB_OPTIONS += march=armv6s-m/march=armv7-m/march=armv7e-m/march=armv7
3729 +MULTILIB_DIRNAMES += armv6-m armv7-m armv7e-m armv7-ar
4002 +MULTILIB_OPTIONS += march=armv6s-m/march=armv7-m/march=armv7e-m/march=armv7/mcpu=cortex-m7
4003 +MULTILIB_DIRNAMES += armv6-m armv7-m armv7e-m armv7-ar cortex-m7
37304004 +MULTILIB_OPTIONS += mfloat-abi=softfp/mfloat-abi=hard
37314005 +MULTILIB_DIRNAMES += softfp fpu
3732 +MULTILIB_OPTIONS += mfpu=fpv4-sp-d16/mfpu=vfpv3-d16
3733 +MULTILIB_DIRNAMES += fpv4-sp-d16 vfpv3-d16
4006 +MULTILIB_OPTIONS += mfpu=fpv4-sp-d16/mfpu=vfpv3-d16/mfpu=fpv5-sp-d16/mfpu=fpv5-d16
4007 +MULTILIB_DIRNAMES += fpv4-sp-d16 vfpv3-d16 fpv5-sp-d16 fpv5-d16
37344008 +
37354009 +MULTILIB_MATCHES = march?armv6s-m=mcpu?cortex-m0
37364010 +MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m0plus
37384012 +MULTILIB_MATCHES += march?armv6s-m=march?armv6-m
37394013 +MULTILIB_MATCHES += march?armv7-m=mcpu?cortex-m3
37404014 +MULTILIB_MATCHES += march?armv7e-m=mcpu?cortex-m4
3741 +MULTILIB_MATCHES += march?armv7e-m=mcpu?cortex-m7
37424015 +MULTILIB_MATCHES += march?armv7=march?armv7-r
37434016 +MULTILIB_MATCHES += march?armv7=march?armv7-a
37444017 +MULTILIB_MATCHES += march?armv7=mcpu?cortex-r4
37604033 +MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?neon
37614034 +MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?neon-fp16
37624035 +MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?neon-vfpv4
3763 +MULTILIB_MATCHES += mfpu?fpv4-sp-d16=mfpu?fpv5-sp-d16
3764 +MULTILIB_MATCHES += mfpu?fpv4-sp-d16=mfpu?fpv5-d16
37654036 +
37664037 +MULTILIB_EXCEPTIONS =
37674038 +MULTILIB_REUSE =
37914062 +MULTILIB_OSDIRNAMES += mthumb/march.armv7e-m=!armv7e-m
37924063 +MULTILIB_OSDIRNAMES += mthumb/march.armv7e-m/mfloat-abi.hard/mfpu.fpv4-sp-d16=!armv7e-m/fpu
37934064 +MULTILIB_OSDIRNAMES += mthumb/march.armv7e-m/mfloat-abi.softfp/mfpu.fpv4-sp-d16=!armv7e-m/softfp
4065 +endif
4066 +
4067 +ifneq (,$(findstring cortex-m7,$(subst $(comma),$(space),$(with_multilib_list))))
4068 +MULTILIB_REQUIRED += mthumb/mcpu=cortex-m7
4069 +MULTILIB_REQUIRED += mthumb/mcpu=cortex-m7/mfloat-abi=softfp/mfpu=fpv5-sp-d16
4070 +MULTILIB_REQUIRED += mthumb/mcpu=cortex-m7/mfloat-abi=hard/mfpu=fpv5-sp-d16
4071 +MULTILIB_REQUIRED += mthumb/mcpu=cortex-m7/mfloat-abi=softfp/mfpu=fpv5-d16
4072 +MULTILIB_REQUIRED += mthumb/mcpu=cortex-m7/mfloat-abi=hard/mfpu=fpv5-d16
4073 +MULTILIB_OSDIRNAMES += mthumb/mcpu.cortex-m7=!cortex-m7
4074 +MULTILIB_OSDIRNAMES += mthumb/mcpu.cortex-m7/mfloat-abi.hard/mfpu.fpv5-sp-d16=!cortex-m7/fpu/fpv5-sp-d16
4075 +MULTILIB_OSDIRNAMES += mthumb/mcpu.cortex-m7/mfloat-abi.softfp/mfpu.fpv5-sp-d16=!cortex-m7/softfp/fpv5-sp-d16
4076 +MULTILIB_OSDIRNAMES += mthumb/mcpu.cortex-m7/mfloat-abi.hard/mfpu.fpv5-d16=!cortex-m7/fpu/fpv5-d16
4077 +MULTILIB_OSDIRNAMES += mthumb/mcpu.cortex-m7/mfloat-abi.softfp/mfpu.fpv5-d16=!cortex-m7/softfp/fpv5-d16
37944078 +endif
37954079 +
37964080 +ifneq (,$(filter armv7 armv7-r armv7-a,$(subst $(comma),$(space),$(with_multilib_list))))
38064090 +endif
38074091 diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
38084092 new file mode 100644
3809 index 0000000..cd399d3
4093 index 0000000..05eafe6
38104094 --- /dev/null
38114095 +++ b/gcc/config/arm/thumb1.md
3812 @@ -0,0 +1,1808 @@
4096 @@ -0,0 +1,1818 @@
38134097 +;; ARM Thumb-1 Machine Description
38144098 +;; Copyright (C) 2007-2014 Free Software Foundation, Inc.
38154099 +;;
55905874 + operands[0] = reg2;
55915875 + }
55925876 + "
5877 +)
5878 +
5879 +(define_insn "*thumb1_movpc_insn"
5880 + [(set (match_operand:SI 0 "s_register_operand" "=l")
5881 + (reg:SI PC_REGNUM))]
5882 + "TARGET_THUMB1"
5883 + "mov\\t%0, pc"
5884 + [(set_attr "length" "2")
5885 + (set_attr "conds" "nocond")
5886 + (set_attr "type" "mov_reg")]
55935887 +)
55945888 +
55955889 +;; NB never uses BX.
57506044 "vminnm.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
57516045 [(set_attr "type" "f_minmax<vfp_type>")
57526046 (set_attr "conds" "unconditional")]
6047 diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c
6048 index 3130c0c..5ee3e1c 100644
6049 --- a/gcc/config/avr/avr.c
6050 +++ b/gcc/config/avr/avr.c
6051 @@ -51,8 +51,6 @@
6052 #include "target-def.h"
6053 #include "params.h"
6054 #include "df.h"
6055 -#include "context.h"
6056 -#include "tree-pass.h"
6057
6058 /* Maximal allowed offset for an address in the LD command */
6059 #define MAX_LD_OFFSET(MODE) (64 - (signed)GET_MODE_SIZE (MODE))
6060 @@ -287,58 +285,6 @@ avr_to_int_mode (rtx x)
6061 }
6062
6063
6064 -static const pass_data avr_pass_data_recompute_notes =
6065 -{
6066 - RTL_PASS, // type
6067 - "", // name (will be patched)
6068 - OPTGROUP_NONE, // optinfo_flags
6069 - false, // has_gate
6070 - true, // has_execute
6071 - TV_DF_SCAN, // tv_id
6072 - 0, // properties_required
6073 - 0, // properties_provided
6074 - 0, // properties_destroyed
6075 - 0, // todo_flags_start
6076 - // todo_flags_finish
6077 - TODO_df_finish | TODO_verify_rtl_sharing | TODO_verify_flow
6078 -};
6079 -
6080 -
6081 -class avr_pass_recompute_notes : public rtl_opt_pass
6082 -{
6083 -public:
6084 - avr_pass_recompute_notes (gcc::context *ctxt, const char *name)
6085 - : rtl_opt_pass (avr_pass_data_recompute_notes, ctxt)
6086 - {
6087 - this->name = name;
6088 - }
6089 -
6090 - unsigned int execute (void)
6091 - {
6092 - df_note_add_problem ();
6093 - df_analyze ();
6094 -
6095 - return 0;
6096 - }
6097 -}; // avr_pass_recompute_notes
6098 -
6099 -
6100 -static void
6101 -avr_register_passes (void)
6102 -{
6103 - /* This avr-specific pass (re)computes insn notes, in particular REG_DEAD
6104 - notes which are used by `avr.c::reg_unused_after' and branch offset
6105 - computations. These notes must be correct, i.e. there must be no
6106 - dangling REG_DEAD notes; otherwise wrong code might result, cf. PR64331.
6107 -
6108 - DF needs (correct) CFG, hence right before free_cfg is the last
6109 - opportunity to rectify notes. */
6110 -
6111 - register_pass (new avr_pass_recompute_notes (g, "avr-notes-free-cfg"),
6112 - PASS_POS_INSERT_BEFORE, "*free_cfg", 1);
6113 -}
6114 -
6115 -
6116 /* Implement `TARGET_OPTION_OVERRIDE'. */
6117
6118 static void
6119 @@ -400,11 +346,6 @@ avr_option_override (void)
6120 init_machine_status = avr_init_machine_status;
6121
6122 avr_log_set_avr_log();
6123 -
6124 - /* Register some avr-specific pass(es). There is no canonical place for
6125 - pass registration. This function is convenient. */
6126 -
6127 - avr_register_passes ();
6128 }
6129
6130 /* Function to set up the backend function structure. */
6131 diff --git a/gcc/config/avr/driver-avr.c b/gcc/config/avr/driver-avr.c
6132 index 2d95f1b..76c8b39 100644
6133 --- a/gcc/config/avr/driver-avr.c
6134 +++ b/gcc/config/avr/driver-avr.c
6135 @@ -60,10 +60,7 @@ avr_device_to_as (int argc, const char **argv)
6136
6137 return concat ("-mmcu=", avr_current_arch->arch_name,
6138 avr_current_device->dev_attribute & AVR_ERRATA_SKIP ? "" : " -mno-skip-bug",
6139 -#ifdef HAVE_AS_AVR_MRMW_OPTION
6140 - avr_current_device->dev_attribute & AVR_ISA_RMW ? " -mrmw" : "",
6141 -#endif // have as -mrmw
6142 - NULL);
6143 + avr_current_device->dev_attribute & AVR_ISA_RMW ? " -mrmw" : "", NULL);
6144 }
6145
6146 /* Returns command line parameters to pass to ld. */
6147 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
6148 index 3948329..2c7c965 100644
6149 --- a/gcc/config/i386/i386.c
6150 +++ b/gcc/config/i386/i386.c
6151 @@ -2934,17 +2934,6 @@ ix86_parse_stringop_strategy_string (char *strategy_str, bool is_memset)
6152 return;
6153 }
6154
6155 - if ((stringop_alg) i == rep_prefix_8_byte
6156 - && !TARGET_64BIT)
6157 - {
6158 - /* rep; movq isn't available in 32-bit code. */
6159 - error ("stringop strategy name %s specified for option %s "
6160 - "not supported for 32-bit code",
6161 - alg_name,
6162 - is_memset ? "-mmemset_strategy=" : "-mmemcpy_strategy=");
6163 - return;
6164 - }
6165 -
6166 input_ranges[n].max = maxs;
6167 input_ranges[n].alg = (stringop_alg) i;
6168 if (!strcmp (align, "align"))
6169 @@ -32759,15 +32748,6 @@ safe_vector_operand (rtx x, enum machine_mode mode)
6170 return x;
6171 }
6172
6173 -/* Fixup modeless constants to fit required mode. */
6174 -static rtx
6175 -fixup_modeless_constant (rtx x, machine_mode mode)
6176 -{
6177 - if (GET_MODE (x) == VOIDmode)
6178 - x = convert_to_mode (mode, x, 1);
6179 - return x;
6180 -}
6181 -
6182 /* Subroutine of ix86_expand_builtin to take care of binop insns. */
6183
6184 static rtx
6185 @@ -34128,8 +34108,6 @@ ix86_expand_args_builtin (const struct builtin_description *d,
6186 if (memory_operand (op, mode))
6187 num_memory++;
6188
6189 - op = fixup_modeless_constant (op, mode);
6190 -
6191 if (GET_MODE (op) == mode || GET_MODE (op) == VOIDmode)
6192 {
6193 if (optimize || !match || num_memory > 1)
6194 @@ -34497,8 +34475,6 @@ ix86_expand_round_builtin (const struct builtin_description *d,
6195 if (VECTOR_MODE_P (mode))
6196 op = safe_vector_operand (op, mode);
6197
6198 - op = fixup_modeless_constant (op, mode);
6199 -
6200 if (GET_MODE (op) == mode || GET_MODE (op) == VOIDmode)
6201 {
6202 if (optimize || !match)
6203 @@ -34845,8 +34821,6 @@ ix86_expand_special_args_builtin (const struct builtin_description *d,
6204 if (VECTOR_MODE_P (mode))
6205 op = safe_vector_operand (op, mode);
6206
6207 - op = fixup_modeless_constant (op, mode);
6208 -
6209 if (GET_MODE (op) == mode || GET_MODE (op) == VOIDmode)
6210 op = copy_to_mode_reg (mode, op);
6211 else
6212 @@ -35873,9 +35847,6 @@ addcarryx:
6213 op1 = copy_to_mode_reg (Pmode, op1);
6214 if (!insn_data[icode].operand[3].predicate (op2, mode2))
6215 op2 = copy_to_mode_reg (mode2, op2);
6216 -
6217 - op3 = fixup_modeless_constant (op3, mode3);
6218 -
6219 if (GET_MODE (op3) == mode3 || GET_MODE (op3) == VOIDmode)
6220 {
6221 if (!insn_data[icode].operand[4].predicate (op3, mode3))
6222 @@ -36017,8 +35988,6 @@ addcarryx:
6223 if (!insn_data[icode].operand[0].predicate (op0, Pmode))
6224 op0 = copy_to_mode_reg (Pmode, op0);
6225
6226 - op1 = fixup_modeless_constant (op1, mode1);
6227 -
6228 if (GET_MODE (op1) == mode1 || GET_MODE (op1) == VOIDmode)
6229 {
6230 if (!insn_data[icode].operand[1].predicate (op1, mode1))
6231 @@ -36065,8 +36034,6 @@ addcarryx:
6232 mode3 = insn_data[icode].operand[3].mode;
6233 mode4 = insn_data[icode].operand[4].mode;
6234
6235 - op0 = fixup_modeless_constant (op0, mode0);
6236 -
6237 if (GET_MODE (op0) == mode0
6238 || (GET_MODE (op0) == VOIDmode && op0 != constm1_rtx))
6239 {
6240 diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
6241 index 5973b34..439ced0 100644
6242 --- a/gcc/config/i386/sse.md
6243 +++ b/gcc/config/i386/sse.md
6244 @@ -5890,8 +5890,7 @@
6245 "TARGET_AVX512F
6246 && (INTVAL (operands[2]) == (INTVAL (operands[3]) - 1)
6247 && INTVAL (operands[3]) == (INTVAL (operands[4]) - 1)
6248 - && INTVAL (operands[4]) == (INTVAL (operands[5]) - 1))
6249 - && rtx_equal_p (operands[6], operands[0])"
6250 + && INTVAL (operands[4]) == (INTVAL (operands[5]) - 1))"
6251 {
6252 operands[2] = GEN_INT ((INTVAL (operands[2])) >> 2);
6253 return "vextract<shuffletype>32x4\t{%2, %1, %0%{%7%}|%0%{%7%}, %1, %2}";
6254 @@ -5986,9 +5985,8 @@
6255 (const_int 2) (const_int 3)]))
6256 (match_operand:<ssehalfvecmode> 2 "memory_operand" "0")
6257 (match_operand:QI 3 "register_operand" "Yk")))]
6258 - "TARGET_AVX512F
6259 - && rtx_equal_p (operands[2], operands[0])"
6260 - "vextract<shuffletype>64x4\t{$0x0, %1, %0%{%3%}|%0%{%3%}, %1, 0x0}"
6261 + "TARGET_AVX512F"
6262 +"vextract<shuffletype>64x4\t{$0x0, %1, %0%{%3%}|%0%{%3%}, %1, 0x0}"
6263 [(set_attr "type" "sselog")
6264 (set_attr "prefix_extra" "1")
6265 (set_attr "length_immediate" "1")
6266 @@ -6027,8 +6025,7 @@
6267 (const_int 6) (const_int 7)]))
6268 (match_operand:<ssehalfvecmode> 2 "memory_operand" "0")
6269 (match_operand:QI 3 "register_operand" "Yk")))]
6270 - "TARGET_AVX512F
6271 - && rtx_equal_p (operands[2], operands[0])"
6272 + "TARGET_AVX512F"
6273 "vextract<shuffletype>64x4\t{$0x1, %1, %0%{%3%}|%0%{%3%}, %1, 0x1}"
6274 [(set_attr "type" "sselog")
6275 (set_attr "prefix_extra" "1")
6276 diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
6277 index 229a0f3..41adc4a 100644
6278 --- a/gcc/config/ia64/ia64.c
6279 +++ b/gcc/config/ia64/ia64.c
6280 @@ -11495,10 +11495,7 @@ expand_vec_perm_interleave_2 (struct expand_vec_perm_d *d)
6281 gcc_assert (e < nelt);
6282 dfinal.perm[i] = e;
6283 }
6284 - if (d->testing_p)
6285 - dfinal.op0 = gen_raw_REG (dfinal.vmode, LAST_VIRTUAL_REGISTER + 1);
6286 - else
6287 - dfinal.op0 = gen_reg_rtx (dfinal.vmode);
6288 + dfinal.op0 = gen_reg_rtx (dfinal.vmode);
6289 dfinal.op1 = dfinal.op0;
6290 dfinal.one_operand_p = true;
6291 dremap.target = dfinal.op0;
6292 diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
6293 index 821d875..e9c4b0b 100644
6294 --- a/gcc/config/pa/pa.c
6295 +++ b/gcc/config/pa/pa.c
6296 @@ -2587,29 +2587,28 @@ pa_output_move_double (rtx *operands)
6297 && GET_CODE (XEXP (addr, 0)) == MULT)
6298 {
6299 rtx xoperands[4];
6300 + rtx high_reg = gen_rtx_SUBREG (SImode, operands[0], 0);
6301
6302 - /* Load address into left half of destination register. */
6303 - xoperands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
6304 - xoperands[1] = XEXP (addr, 1);
6305 - xoperands[2] = XEXP (XEXP (addr, 0), 0);
6306 - xoperands[3] = XEXP (XEXP (addr, 0), 1);
6307 - output_asm_insn ("{sh%O3addl %2,%1,%0|shladd,l %2,%O3,%1,%0}",
6308 - xoperands);
6309 - return "ldw 4(%0),%R0\n\tldw 0(%0),%0";
6310 - }
6311 - else if (GET_CODE (addr) == PLUS
6312 - && REG_P (XEXP (addr, 0))
6313 - && REG_P (XEXP (addr, 1)))
6314 - {
6315 - rtx xoperands[3];
6316 -
6317 - /* Load address into left half of destination register. */
6318 - xoperands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
6319 - xoperands[1] = XEXP (addr, 0);
6320 - xoperands[2] = XEXP (addr, 1);
6321 - output_asm_insn ("{addl|add,l} %1,%2,%0",
6322 - xoperands);
6323 - return "ldw 4(%0),%R0\n\tldw 0(%0),%0";
6324 + if (!reg_overlap_mentioned_p (high_reg, addr))
6325 + {
6326 + xoperands[0] = high_reg;
6327 + xoperands[1] = XEXP (addr, 1);
6328 + xoperands[2] = XEXP (XEXP (addr, 0), 0);
6329 + xoperands[3] = XEXP (XEXP (addr, 0), 1);
6330 + output_asm_insn ("{sh%O3addl %2,%1,%0|shladd,l %2,%O3,%1,%0}",
6331 + xoperands);
6332 + return "ldw 4(%0),%R0\n\tldw 0(%0),%0";
6333 + }
6334 + else
6335 + {
6336 + xoperands[0] = high_reg;
6337 + xoperands[1] = XEXP (addr, 1);
6338 + xoperands[2] = XEXP (XEXP (addr, 0), 0);
6339 + xoperands[3] = XEXP (XEXP (addr, 0), 1);
6340 + output_asm_insn ("{sh%O3addl %2,%1,%R0|shladd,l %2,%O3,%1,%R0}",
6341 + xoperands);
6342 + return "ldw 0(%R0),%0\n\tldw 4(%R0),%R0";
6343 + }
6344 }
6345 }
6346
6347 diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
6348 index 63e7237..02ea142 100644
6349 --- a/gcc/config/rs6000/altivec.md
6350 +++ b/gcc/config/rs6000/altivec.md
6351 @@ -2453,7 +2453,7 @@
6352 }
6353 })
6354
6355 -(define_insn "altivec_lvx_<mode>_internal"
6356 +(define_insn "*altivec_lvx_<mode>_internal"
6357 [(parallel
6358 [(set (match_operand:VM2 0 "register_operand" "=v")
6359 (match_operand:VM2 1 "memory_operand" "Z"))
6360 @@ -2476,7 +2476,7 @@
6361 }
6362 })
6363
6364 -(define_insn "altivec_stvx_<mode>_internal"
6365 +(define_insn "*altivec_stvx_<mode>_internal"
6366 [(parallel
6367 [(set (match_operand:VM2 0 "memory_operand" "=Z")
6368 (match_operand:VM2 1 "register_operand" "v"))
6369 diff --git a/gcc/config/rs6000/crypto.md b/gcc/config/rs6000/crypto.md
6370 index cf6ef96..b2704a9 100644
6371 --- a/gcc/config/rs6000/crypto.md
6372 +++ b/gcc/config/rs6000/crypto.md
6373 @@ -18,15 +18,6 @@
6374 ;; along with GCC; see the file COPYING3. If not see
6375 ;; <http://www.gnu.org/licenses/>.
6376
6377 -;; NOTE: Although this file contains all the instructions from
6378 -;; section 5.11 of ISA 2.07, only those in sections 5.11.1 and
6379 -;; 5.11.2 are in Category:Vector.Crypto. Those are the only
6380 -;; ones controlled by -m[no-]crypto.
6381 -
6382 -;; FIXME: The builtin names for the instructions in this file
6383 -;; are likely to be deprecated in favor of other names to be
6384 -;; agreed upon with the XL compilers and LLVM.
6385 -
6386 (define_c_enum "unspec"
6387 [UNSPEC_VCIPHER
6388 UNSPEC_VNCIPHER
6389 @@ -74,7 +65,7 @@
6390 (unspec:CR_mode [(match_operand:CR_mode 1 "register_operand" "v")
6391 (match_operand:CR_mode 2 "register_operand" "v")]
6392 UNSPEC_VPMSUM))]
6393 - "TARGET_P8_VECTOR"
6394 + "TARGET_CRYPTO"
6395 "vpmsum<CR_char> %0,%1,%2"
6396 [(set_attr "type" "crypto")])
6397
6398 @@ -85,7 +76,7 @@
6399 (match_operand:CR_mode 2 "register_operand" "v")
6400 (match_operand:CR_mode 3 "register_operand" "v")]
6401 UNSPEC_VPERMXOR))]
6402 - "TARGET_P8_VECTOR"
6403 + "TARGET_CRYPTO"
6404 "vpermxor %0,%1,%2,%3"
6405 [(set_attr "type" "crypto")])
6406
6407 diff --git a/gcc/config/rs6000/default64.h b/gcc/config/rs6000/default64.h
6408 index 7a29672..48dcdf0 100644
6409 --- a/gcc/config/rs6000/default64.h
6410 +++ b/gcc/config/rs6000/default64.h
6411 @@ -1,6 +1,6 @@
6412 /* Definitions of target machine for GNU compiler,
6413 for 64 bit powerpc linux defaulting to -m64.
6414 - Copyright (C) 2003-2015 Free Software Foundation, Inc.
6415 + Copyright (C) 2003-2014 Free Software Foundation, Inc.
6416
6417 This file is part of GCC.
6418
6419 @@ -18,14 +18,10 @@ You should have received a copy of the GNU General Public License
6420 along with GCC; see the file COPYING3. If not see
6421 <http://www.gnu.org/licenses/>. */
6422
6423 -#define RS6000_CPU(NAME, CPU, FLAGS)
6424 -#include "rs6000-cpus.def"
6425 -#undef RS6000_CPU
6426 -
6427 #if (TARGET_DEFAULT & MASK_LITTLE_ENDIAN)
6428 #undef TARGET_DEFAULT
6429 -#define TARGET_DEFAULT (ISA_2_7_MASKS_SERVER | MASK_POWERPC64 | MASK_64BIT | MASK_LITTLE_ENDIAN)
6430 +#define TARGET_DEFAULT (MASK_PPC_GFXOPT | MASK_POWERPC64 | MASK_64BIT | MASK_LITTLE_ENDIAN)
6431 #else
6432 #undef TARGET_DEFAULT
6433 -#define TARGET_DEFAULT (MASK_PPC_GFXOPT | MASK_PPC_GPOPT | MASK_MFCRF | MASK_POWERPC64 | MASK_64BIT)
6434 +#define TARGET_DEFAULT (MASK_PPC_GFXOPT | MASK_POWERPC64 | MASK_64BIT)
6435 #endif
6436 diff --git a/gcc/config/rs6000/driver-rs6000.c b/gcc/config/rs6000/driver-rs6000.c
6437 index af32471..7df5fba 100644
6438 --- a/gcc/config/rs6000/driver-rs6000.c
6439 +++ b/gcc/config/rs6000/driver-rs6000.c
6440 @@ -1,5 +1,5 @@
6441 /* Subroutines for the gcc driver.
6442 - Copyright (C) 2007-2015 Free Software Foundation, Inc.
6443 + Copyright (C) 2007-2014 Free Software Foundation, Inc.
6444
6445 This file is part of GCC.
6446
6447 @@ -327,12 +327,6 @@ detect_processor_aix (void)
6448 case 0x4000:
6449 return "power6";
6450
6451 - case 0x8000:
6452 - return "power7";
6453 -
6454 - case 0x10000:
6455 - return "power8";
6456 -
6457 default:
6458 return "powerpc";
6459 }
6460 diff --git a/gcc/config/rs6000/htm.md b/gcc/config/rs6000/htm.md
6461 index dbfd0db..f8b02cb 100644
6462 --- a/gcc/config/rs6000/htm.md
6463 +++ b/gcc/config/rs6000/htm.md
6464 @@ -1,5 +1,5 @@
6465 ;; Hardware Transactional Memory (HTM) patterns.
6466 -;; Copyright (C) 2013-2015 Free Software Foundation, Inc.
6467 +;; Copyright (C) 2013-2014 Free Software Foundation, Inc.
6468 ;; Contributed by Peter Bergner <bergner@vnet.ibm.com>.
6469
6470 ;; This file is part of GCC.
6471 @@ -32,52 +32,191 @@
6472
6473 (define_c_enum "unspecv"
6474 [UNSPECV_HTM_TABORT
6475 - UNSPECV_HTM_TABORTXC
6476 - UNSPECV_HTM_TABORTXCI
6477 + UNSPECV_HTM_TABORTDC
6478 + UNSPECV_HTM_TABORTDCI
6479 + UNSPECV_HTM_TABORTWC
6480 + UNSPECV_HTM_TABORTWCI
6481 UNSPECV_HTM_TBEGIN
6482 UNSPECV_HTM_TCHECK
6483 UNSPECV_HTM_TEND
6484 UNSPECV_HTM_TRECHKPT
6485 UNSPECV_HTM_TRECLAIM
6486 UNSPECV_HTM_TSR
6487 - UNSPECV_HTM_TTEST
6488 UNSPECV_HTM_MFSPR
6489 UNSPECV_HTM_MTSPR
6490 ])
6491
6492
6493 -(define_insn "tabort"
6494 +(define_expand "tabort"
6495 + [(set (match_dup 2)
6496 + (unspec_volatile:CC [(match_operand:SI 1 "int_reg_operand" "")]
6497 + UNSPECV_HTM_TABORT))
6498 + (set (match_dup 3)
6499 + (eq:SI (match_dup 2)
6500 + (const_int 0)))
6501 + (set (match_operand:SI 0 "int_reg_operand" "")
6502 + (minus:SI (const_int 1) (match_dup 3)))]
6503 + "TARGET_HTM"
6504 +{
6505 + operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
6506 + operands[3] = gen_reg_rtx (SImode);
6507 +})
6508 +
6509 +(define_insn "*tabort_internal"
6510 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
6511 - (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
6512 + (unspec_volatile:CC [(match_operand:SI 0 "int_reg_operand" "r")]
6513 UNSPECV_HTM_TABORT))]
6514 "TARGET_HTM"
6515 "tabort. %0"
6516 [(set_attr "type" "htm")
6517 (set_attr "length" "4")])
6518
6519 -(define_insn "tabort<wd>c"
6520 +(define_expand "tabortdc"
6521 + [(set (match_dup 4)
6522 + (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")
6523 + (match_operand:SI 2 "gpc_reg_operand" "r")
6524 + (match_operand:SI 3 "gpc_reg_operand" "r")]
6525 + UNSPECV_HTM_TABORTDC))
6526 + (set (match_dup 5)
6527 + (eq:SI (match_dup 4)
6528 + (const_int 0)))
6529 + (set (match_operand:SI 0 "int_reg_operand" "")
6530 + (minus:SI (const_int 1) (match_dup 5)))]
6531 + "TARGET_HTM"
6532 +{
6533 + operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
6534 + operands[5] = gen_reg_rtx (SImode);
6535 +})
6536 +
6537 +(define_insn "*tabortdc_internal"
6538 [(set (match_operand:CC 3 "cc_reg_operand" "=x")
6539 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
6540 - (match_operand:GPR 1 "gpc_reg_operand" "r")
6541 - (match_operand:GPR 2 "gpc_reg_operand" "r")]
6542 - UNSPECV_HTM_TABORTXC))]
6543 + (match_operand:SI 1 "gpc_reg_operand" "r")
6544 + (match_operand:SI 2 "gpc_reg_operand" "r")]
6545 + UNSPECV_HTM_TABORTDC))]
6546 "TARGET_HTM"
6547 - "tabort<wd>c. %0,%1,%2"
6548 + "tabortdc. %0,%1,%2"
6549 [(set_attr "type" "htm")
6550 (set_attr "length" "4")])
6551
6552 -(define_insn "tabort<wd>ci"
6553 +(define_expand "tabortdci"
6554 + [(set (match_dup 4)
6555 + (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")
6556 + (match_operand:SI 2 "gpc_reg_operand" "r")
6557 + (match_operand 3 "s5bit_cint_operand" "n")]
6558 + UNSPECV_HTM_TABORTDCI))
6559 + (set (match_dup 5)
6560 + (eq:SI (match_dup 4)
6561 + (const_int 0)))
6562 + (set (match_operand:SI 0 "int_reg_operand" "")
6563 + (minus:SI (const_int 1) (match_dup 5)))]
6564 + "TARGET_HTM"
6565 +{
6566 + operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
6567 + operands[5] = gen_reg_rtx (SImode);
6568 +})
6569 +
6570 +(define_insn "*tabortdci_internal"
6571 [(set (match_operand:CC 3 "cc_reg_operand" "=x")
6572 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
6573 - (match_operand:GPR 1 "gpc_reg_operand" "r")
6574 + (match_operand:SI 1 "gpc_reg_operand" "r")
6575 (match_operand 2 "s5bit_cint_operand" "n")]
6576 - UNSPECV_HTM_TABORTXCI))]
6577 + UNSPECV_HTM_TABORTDCI))]
6578 + "TARGET_HTM"
6579 + "tabortdci. %0,%1,%2"
6580 + [(set_attr "type" "htm")
6581 + (set_attr "length" "4")])
6582 +
6583 +(define_expand "tabortwc"
6584 + [(set (match_dup 4)
6585 + (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")
6586 + (match_operand:SI 2 "gpc_reg_operand" "r")
6587 + (match_operand:SI 3 "gpc_reg_operand" "r")]
6588 + UNSPECV_HTM_TABORTWC))
6589 + (set (match_dup 5)
6590 + (eq:SI (match_dup 4)
6591 + (const_int 0)))
6592 + (set (match_operand:SI 0 "int_reg_operand" "")
6593 + (minus:SI (const_int 1) (match_dup 5)))]
6594 + "TARGET_HTM"
6595 +{
6596 + operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
6597 + operands[5] = gen_reg_rtx (SImode);
6598 +})
6599 +
6600 +(define_insn "*tabortwc_internal"
6601 + [(set (match_operand:CC 3 "cc_reg_operand" "=x")
6602 + (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
6603 + (match_operand:SI 1 "gpc_reg_operand" "r")
6604 + (match_operand:SI 2 "gpc_reg_operand" "r")]
6605 + UNSPECV_HTM_TABORTWC))]
6606 "TARGET_HTM"
6607 - "tabort<wd>ci. %0,%1,%2"
6608 + "tabortwc. %0,%1,%2"
6609 [(set_attr "type" "htm")
6610 (set_attr "length" "4")])
6611
6612 -(define_insn "tbegin"
6613 +(define_expand "tabortwci"
6614 + [(set (match_dup 4)
6615 + (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")
6616 + (match_operand:SI 2 "gpc_reg_operand" "r")
6617 + (match_operand 3 "s5bit_cint_operand" "n")]
6618 + UNSPECV_HTM_TABORTWCI))
6619 + (set (match_dup 5)
6620 + (eq:SI (match_dup 4)
6621 + (const_int 0)))
6622 + (set (match_operand:SI 0 "int_reg_operand" "")
6623 + (minus:SI (const_int 1) (match_dup 5)))]
6624 + "TARGET_HTM"
6625 +{
6626 + operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
6627 + operands[5] = gen_reg_rtx (SImode);
6628 +})
6629 +
6630 +(define_expand "ttest"
6631 + [(set (match_dup 1)
6632 + (unspec_volatile:CC [(const_int 0)
6633 + (reg:SI 0)
6634 + (const_int 0)]
6635 + UNSPECV_HTM_TABORTWCI))
6636 + (set (subreg:CC (match_dup 2) 0) (match_dup 1))
6637 + (set (match_dup 3) (lshiftrt:SI (match_dup 2) (const_int 28)))
6638 + (parallel [(set (match_operand:SI 0 "int_reg_operand" "")
6639 + (and:SI (match_dup 3) (const_int 15)))
6640 + (clobber (scratch:CC))])]
6641 + "TARGET_HTM"
6642 +{
6643 + operands[1] = gen_rtx_REG (CCmode, CR0_REGNO);
6644 + operands[2] = gen_reg_rtx (SImode);
6645 + operands[3] = gen_reg_rtx (SImode);
6646 +})
6647 +
6648 +(define_insn "*tabortwci_internal"
6649 + [(set (match_operand:CC 3 "cc_reg_operand" "=x")
6650 + (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
6651 + (match_operand:SI 1 "gpc_reg_operand" "r")
6652 + (match_operand 2 "s5bit_cint_operand" "n")]
6653 + UNSPECV_HTM_TABORTWCI))]
6654 + "TARGET_HTM"
6655 + "tabortwci. %0,%1,%2"
6656 + [(set_attr "type" "htm")
6657 + (set_attr "length" "4")])
6658 +
6659 +(define_expand "tbegin"
6660 + [(set (match_dup 2)
6661 + (unspec_volatile:CC [(match_operand 1 "const_0_to_1_operand" "n")]
6662 + UNSPECV_HTM_TBEGIN))
6663 + (set (match_dup 3)
6664 + (eq:SI (match_dup 2)
6665 + (const_int 0)))
6666 + (set (match_operand:SI 0 "int_reg_operand" "")
6667 + (minus:SI (const_int 1) (match_dup 3)))]
6668 + "TARGET_HTM"
6669 +{
6670 + operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
6671 + operands[3] = gen_reg_rtx (SImode);
6672 +})
6673 +
6674 +(define_insn "*tbegin_internal"
6675 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
6676 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
6677 UNSPECV_HTM_TBEGIN))]
6678 @@ -86,16 +225,46 @@
6679 [(set_attr "type" "htm")
6680 (set_attr "length" "4")])
6681
6682 -(define_insn "tcheck"
6683 - [(set (match_operand:CC 0 "cc_reg_operand" "=y")
6684 - (unspec_volatile:CC [(const_int 0)]
6685 +(define_expand "tcheck"
6686 + [(set (match_dup 2)
6687 + (unspec_volatile:CC [(match_operand 1 "u3bit_cint_operand" "n")]
6688 + UNSPECV_HTM_TCHECK))
6689 + (set (match_dup 3)
6690 + (eq:SI (match_dup 2)
6691 + (const_int 0)))
6692 + (set (match_operand:SI 0 "int_reg_operand" "")
6693 + (minus:SI (const_int 1) (match_dup 3)))]
6694 + "TARGET_HTM"
6695 +{
6696 + operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
6697 + operands[3] = gen_reg_rtx (SImode);
6698 +})
6699 +
6700 +(define_insn "*tcheck_internal"
6701 + [(set (match_operand:CC 1 "cc_reg_operand" "=x")
6702 + (unspec_volatile:CC [(match_operand 0 "u3bit_cint_operand" "n")]
6703 UNSPECV_HTM_TCHECK))]
6704 "TARGET_HTM"
6705 "tcheck %0"
6706 [(set_attr "type" "htm")
6707 (set_attr "length" "4")])
6708
6709 -(define_insn "tend"
6710 +(define_expand "tend"
6711 + [(set (match_dup 2)
6712 + (unspec_volatile:CC [(match_operand 1 "const_0_to_1_operand" "n")]
6713 + UNSPECV_HTM_TEND))
6714 + (set (match_dup 3)
6715 + (eq:SI (match_dup 2)
6716 + (const_int 0)))
6717 + (set (match_operand:SI 0 "int_reg_operand" "")
6718 + (minus:SI (const_int 1) (match_dup 3)))]
6719 + "TARGET_HTM"
6720 +{
6721 + operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
6722 + operands[3] = gen_reg_rtx (SImode);
6723 +})
6724 +
6725 +(define_insn "*tend_internal"
6726 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
6727 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
6728 UNSPECV_HTM_TEND))]
6729 @@ -104,7 +273,22 @@
6730 [(set_attr "type" "htm")
6731 (set_attr "length" "4")])
6732
6733 -(define_insn "trechkpt"
6734 +(define_expand "trechkpt"
6735 + [(set (match_dup 1)
6736 + (unspec_volatile:CC [(const_int 0)]
6737 + UNSPECV_HTM_TRECHKPT))
6738 + (set (match_dup 2)
6739 + (eq:SI (match_dup 1)
6740 + (const_int 0)))
6741 + (set (match_operand:SI 0 "int_reg_operand" "")
6742 + (minus:SI (const_int 1) (match_dup 2)))]
6743 + "TARGET_HTM"
6744 +{
6745 + operands[1] = gen_rtx_REG (CCmode, CR0_REGNO);
6746 + operands[2] = gen_reg_rtx (SImode);
6747 +})
6748 +
6749 +(define_insn "*trechkpt_internal"
6750 [(set (match_operand:CC 0 "cc_reg_operand" "=x")
6751 (unspec_volatile:CC [(const_int 0)]
6752 UNSPECV_HTM_TRECHKPT))]
6753 @@ -113,7 +297,22 @@
6754 [(set_attr "type" "htm")
6755 (set_attr "length" "4")])
6756
6757 -(define_insn "treclaim"
6758 +(define_expand "treclaim"
6759 + [(set (match_dup 2)
6760 + (unspec_volatile:CC [(match_operand:SI 1 "gpc_reg_operand" "r")]
6761 + UNSPECV_HTM_TRECLAIM))
6762 + (set (match_dup 3)
6763 + (eq:SI (match_dup 2)
6764 + (const_int 0)))
6765 + (set (match_operand:SI 0 "int_reg_operand" "")
6766 + (minus:SI (const_int 1) (match_dup 3)))]
6767 + "TARGET_HTM"
6768 +{
6769 + operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
6770 + operands[3] = gen_reg_rtx (SImode);
6771 +})
6772 +
6773 +(define_insn "*treclaim_internal"
6774 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
6775 (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
6776 UNSPECV_HTM_TRECLAIM))]
6777 @@ -122,7 +321,22 @@
6778 [(set_attr "type" "htm")
6779 (set_attr "length" "4")])
6780
6781 -(define_insn "tsr"
6782 +(define_expand "tsr"
6783 + [(set (match_dup 2)
6784 + (unspec_volatile:CC [(match_operand 1 "const_0_to_1_operand" "n")]
6785 + UNSPECV_HTM_TSR))
6786 + (set (match_dup 3)
6787 + (eq:SI (match_dup 2)
6788 + (const_int 0)))
6789 + (set (match_operand:SI 0 "int_reg_operand" "")
6790 + (minus:SI (const_int 1) (match_dup 3)))]
6791 + "TARGET_HTM"
6792 +{
6793 + operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
6794 + operands[3] = gen_reg_rtx (SImode);
6795 +})
6796 +
6797 +(define_insn "*tsr_internal"
6798 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
6799 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
6800 UNSPECV_HTM_TSR))]
6801 @@ -131,30 +345,21 @@
6802 [(set_attr "type" "htm")
6803 (set_attr "length" "4")])
6804
6805 -(define_insn "ttest"
6806 - [(set (match_operand:CC 0 "cc_reg_operand" "=x")
6807 - (unspec_volatile:CC [(const_int 0)]
6808 - UNSPECV_HTM_TTEST))]
6809 - "TARGET_HTM"
6810 - "tabortwci. 0,1,0"
6811 - [(set_attr "type" "htm")
6812 - (set_attr "length" "4")])
6813 -
6814 (define_insn "htm_mfspr_<mode>"
6815 - [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
6816 - (unspec_volatile:GPR [(match_operand 1 "u10bit_cint_operand" "n")
6817 - (match_operand:GPR 2 "htm_spr_reg_operand" "")]
6818 - UNSPECV_HTM_MFSPR))]
6819 + [(set (match_operand:P 0 "gpc_reg_operand" "=r")
6820 + (unspec_volatile:P [(match_operand 1 "u10bit_cint_operand" "n")
6821 + (match_operand:P 2 "htm_spr_reg_operand" "")]
6822 + UNSPECV_HTM_MFSPR))]
6823 "TARGET_HTM"
6824 "mfspr %0,%1";
6825 [(set_attr "type" "htm")
6826 (set_attr "length" "4")])
6827
6828 (define_insn "htm_mtspr_<mode>"
6829 - [(set (match_operand:GPR 2 "htm_spr_reg_operand" "")
6830 - (unspec_volatile:GPR [(match_operand:GPR 0 "gpc_reg_operand" "r")
6831 - (match_operand 1 "u10bit_cint_operand" "n")]
6832 - UNSPECV_HTM_MTSPR))]
6833 + [(set (match_operand:P 2 "htm_spr_reg_operand" "")
6834 + (unspec_volatile:P [(match_operand:P 0 "gpc_reg_operand" "r")
6835 + (match_operand 1 "u10bit_cint_operand" "n")]
6836 + UNSPECV_HTM_MTSPR))]
6837 "TARGET_HTM"
6838 "mtspr %1,%0";
6839 [(set_attr "type" "htm")
6840 diff --git a/gcc/config/rs6000/htmxlintrin.h b/gcc/config/rs6000/htmxlintrin.h
6841 index f1be368..bf7fe3a 100644
6842 --- a/gcc/config/rs6000/htmxlintrin.h
6843 +++ b/gcc/config/rs6000/htmxlintrin.h
6844 @@ -81,8 +81,7 @@ extern __inline long
6845 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
6846 __TM_end (void)
6847 {
6848 - unsigned char status = _HTM_STATE (__builtin_tend (0));
6849 - if (__builtin_expect (status, _HTM_TRANSACTIONAL))
6850 + if (__builtin_expect (__builtin_tend (0), 1))
6851 return 1;
6852 return 0;
6853 }
6854 diff --git a/gcc/config/rs6000/linux64.h b/gcc/config/rs6000/linux64.h
6855 index 4394db9..0ca05d2 100644
6856 --- a/gcc/config/rs6000/linux64.h
6857 +++ b/gcc/config/rs6000/linux64.h
6858 @@ -1,6 +1,6 @@
6859 /* Definitions of target machine for GNU compiler,
6860 for 64 bit PowerPC linux.
6861 - Copyright (C) 2000-2015 Free Software Foundation, Inc.
6862 + Copyright (C) 2000-2014 Free Software Foundation, Inc.
6863
6864 This file is part of GCC.
6865
6866 @@ -71,7 +71,11 @@ extern int dot_symbols;
6867 #undef PROCESSOR_DEFAULT
6868 #define PROCESSOR_DEFAULT PROCESSOR_POWER7
6869 #undef PROCESSOR_DEFAULT64
6870 +#ifdef LINUX64_DEFAULT_ABI_ELFv2
6871 #define PROCESSOR_DEFAULT64 PROCESSOR_POWER8
6872 +#else
6873 +#define PROCESSOR_DEFAULT64 PROCESSOR_POWER7
6874 +#endif
6875
6876 /* We don't need to generate entries in .fixup, except when
6877 -mrelocatable or -mrelocatable-lib is given. */
6878 @@ -97,7 +101,7 @@ extern int dot_symbols;
6879 { \
6880 if (!global_options_set.x_rs6000_alignment_flags) \
6881 rs6000_alignment_flags = MASK_ALIGN_NATURAL; \
6882 - if (rs6000_isa_flags & OPTION_MASK_64BIT) \
6883 + if (TARGET_64BIT) \
6884 { \
6885 if (DEFAULT_ABI != ABI_AIX) \
6886 { \
6887 diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
6888 index 031b964..9bb8703 100644
6889 --- a/gcc/config/rs6000/rs6000-builtin.def
6890 +++ b/gcc/config/rs6000/rs6000-builtin.def
6891 @@ -392,14 +392,6 @@
6892 | RS6000_BTC_BINARY), \
6893 CODE_FOR_ ## ICODE) /* ICODE */
6894
6895 -#define BU_CRYPTO_2A(ENUM, NAME, ATTR, ICODE) \
6896 - RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \
6897 - "__builtin_crypto_" NAME, /* NAME */ \
6898 - RS6000_BTM_P8_VECTOR, /* MASK */ \
6899 - (RS6000_BTC_ ## ATTR /* ATTR */ \
6900 - | RS6000_BTC_BINARY), \
6901 - CODE_FOR_ ## ICODE) /* ICODE */
6902 -
6903 #define BU_CRYPTO_3(ENUM, NAME, ATTR, ICODE) \
6904 RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \
6905 "__builtin_crypto_" NAME, /* NAME */ \
6906 @@ -408,14 +400,6 @@
6907 | RS6000_BTC_TERNARY), \
6908 CODE_FOR_ ## ICODE) /* ICODE */
6909
6910 -#define BU_CRYPTO_3A(ENUM, NAME, ATTR, ICODE) \
6911 - RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \
6912 - "__builtin_crypto_" NAME, /* NAME */ \
6913 - RS6000_BTM_P8_VECTOR, /* MASK */ \
6914 - (RS6000_BTC_ ## ATTR /* ATTR */ \
6915 - | RS6000_BTC_TERNARY), \
6916 - CODE_FOR_ ## ICODE) /* ICODE */
6917 -
6918 #define BU_CRYPTO_OVERLOAD_1(ENUM, NAME) \
6919 RS6000_BUILTIN_1 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \
6920 "__builtin_crypto_" NAME, /* NAME */ \
6921 @@ -424,10 +408,10 @@
6922 | RS6000_BTC_UNARY), \
6923 CODE_FOR_nothing) /* ICODE */
6924
6925 -#define BU_CRYPTO_OVERLOAD_2A(ENUM, NAME) \
6926 +#define BU_CRYPTO_OVERLOAD_2(ENUM, NAME) \
6927 RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \
6928 "__builtin_crypto_" NAME, /* NAME */ \
6929 - RS6000_BTM_P8_VECTOR, /* MASK */ \
6930 + RS6000_BTM_CRYPTO, /* MASK */ \
6931 (RS6000_BTC_OVERLOADED /* ATTR */ \
6932 | RS6000_BTC_BINARY), \
6933 CODE_FOR_nothing) /* ICODE */
6934 @@ -440,14 +424,6 @@
6935 | RS6000_BTC_TERNARY), \
6936 CODE_FOR_nothing) /* ICODE */
6937
6938 -#define BU_CRYPTO_OVERLOAD_3A(ENUM, NAME) \
6939 - RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \
6940 - "__builtin_crypto_" NAME, /* NAME */ \
6941 - RS6000_BTM_P8_VECTOR, /* MASK */ \
6942 - (RS6000_BTC_OVERLOADED /* ATTR */ \
6943 - | RS6000_BTC_TERNARY), \
6944 - CODE_FOR_nothing) /* ICODE */
6945 -
6946 /* HTM convenience macros. */
6947 #define BU_HTM_0(ENUM, NAME, ATTR, ICODE) \
6948 RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \
6949 @@ -480,12 +456,21 @@
6950 | RS6000_BTC_TERNARY), \
6951 CODE_FOR_ ## ICODE) /* ICODE */
6952
6953 -#define BU_HTM_V1(ENUM, NAME, ATTR, ICODE) \
6954 +#define BU_HTM_SPR0(ENUM, NAME, ATTR, ICODE) \
6955 + RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \
6956 + "__builtin_" NAME, /* NAME */ \
6957 + RS6000_BTM_HTM, /* MASK */ \
6958 + (RS6000_BTC_ ## ATTR /* ATTR */ \
6959 + | RS6000_BTC_SPR), \
6960 + CODE_FOR_ ## ICODE) /* ICODE */
6961 +
6962 +#define BU_HTM_SPR1(ENUM, NAME, ATTR, ICODE) \
6963 RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \
6964 "__builtin_" NAME, /* NAME */ \
6965 RS6000_BTM_HTM, /* MASK */ \
6966 (RS6000_BTC_ ## ATTR /* ATTR */ \
6967 | RS6000_BTC_UNARY \
6968 + | RS6000_BTC_SPR \
6969 | RS6000_BTC_VOID), \
6970 CODE_FOR_ ## ICODE) /* ICODE */
6971
6972 @@ -1626,52 +1611,52 @@ BU_CRYPTO_2 (VCIPHER, "vcipher", CONST, crypto_vcipher)
6973 BU_CRYPTO_2 (VCIPHERLAST, "vcipherlast", CONST, crypto_vcipherlast)
6974 BU_CRYPTO_2 (VNCIPHER, "vncipher", CONST, crypto_vncipher)
6975 BU_CRYPTO_2 (VNCIPHERLAST, "vncipherlast", CONST, crypto_vncipherlast)
6976 -BU_CRYPTO_2A (VPMSUMB, "vpmsumb", CONST, crypto_vpmsumb)
6977 -BU_CRYPTO_2A (VPMSUMH, "vpmsumh", CONST, crypto_vpmsumh)
6978 -BU_CRYPTO_2A (VPMSUMW, "vpmsumw", CONST, crypto_vpmsumw)
6979 -BU_CRYPTO_2A (VPMSUMD, "vpmsumd", CONST, crypto_vpmsumd)
6980 +BU_CRYPTO_2 (VPMSUMB, "vpmsumb", CONST, crypto_vpmsumb)
6981 +BU_CRYPTO_2 (VPMSUMH, "vpmsumh", CONST, crypto_vpmsumh)
6982 +BU_CRYPTO_2 (VPMSUMW, "vpmsumw", CONST, crypto_vpmsumw)
6983 +BU_CRYPTO_2 (VPMSUMD, "vpmsumd", CONST, crypto_vpmsumd)
6984
6985 /* 3 argument crypto functions. */
6986 -BU_CRYPTO_3A (VPERMXOR_V2DI, "vpermxor_v2di", CONST, crypto_vpermxor_v2di)
6987 -BU_CRYPTO_3A (VPERMXOR_V4SI, "vpermxor_v4si", CONST, crypto_vpermxor_v4si)
6988 -BU_CRYPTO_3A (VPERMXOR_V8HI, "vpermxor_v8hi", CONST, crypto_vpermxor_v8hi)
6989 -BU_CRYPTO_3A (VPERMXOR_V16QI, "vpermxor_v16qi", CONST, crypto_vpermxor_v16qi)
6990 +BU_CRYPTO_3 (VPERMXOR_V2DI, "vpermxor_v2di", CONST, crypto_vpermxor_v2di)
6991 +BU_CRYPTO_3 (VPERMXOR_V4SI, "vpermxor_v4si", CONST, crypto_vpermxor_v4si)
6992 +BU_CRYPTO_3 (VPERMXOR_V8HI, "vpermxor_v8hi", CONST, crypto_vpermxor_v8hi)
6993 +BU_CRYPTO_3 (VPERMXOR_V16QI, "vpermxor_v16qi", CONST, crypto_vpermxor_v16qi)
6994 BU_CRYPTO_3 (VSHASIGMAW, "vshasigmaw", CONST, crypto_vshasigmaw)
6995 BU_CRYPTO_3 (VSHASIGMAD, "vshasigmad", CONST, crypto_vshasigmad)
6996
6997 /* 2 argument crypto overloaded functions. */
6998 -BU_CRYPTO_OVERLOAD_2A (VPMSUM, "vpmsum")
6999 +BU_CRYPTO_OVERLOAD_2 (VPMSUM, "vpmsum")
7000
7001 /* 3 argument crypto overloaded functions. */
7002 -BU_CRYPTO_OVERLOAD_3A (VPERMXOR, "vpermxor")
7003 +BU_CRYPTO_OVERLOAD_3 (VPERMXOR, "vpermxor")
7004 BU_CRYPTO_OVERLOAD_3 (VSHASIGMA, "vshasigma")
7005
7006
7007 /* HTM functions. */
7008 -BU_HTM_1 (TABORT, "tabort", CR, tabort)
7009 -BU_HTM_3 (TABORTDC, "tabortdc", CR, tabortdc)
7010 -BU_HTM_3 (TABORTDCI, "tabortdci", CR, tabortdci)
7011 -BU_HTM_3 (TABORTWC, "tabortwc", CR, tabortwc)
7012 -BU_HTM_3 (TABORTWCI, "tabortwci", CR, tabortwci)
7013 -BU_HTM_1 (TBEGIN, "tbegin", CR, tbegin)
7014 -BU_HTM_0 (TCHECK, "tcheck", CR, tcheck)
7015 -BU_HTM_1 (TEND, "tend", CR, tend)
7016 -BU_HTM_0 (TENDALL, "tendall", CR, tend)
7017 -BU_HTM_0 (TRECHKPT, "trechkpt", CR, trechkpt)
7018 -BU_HTM_1 (TRECLAIM, "treclaim", CR, treclaim)
7019 -BU_HTM_0 (TRESUME, "tresume", CR, tsr)
7020 -BU_HTM_0 (TSUSPEND, "tsuspend", CR, tsr)
7021 -BU_HTM_1 (TSR, "tsr", CR, tsr)
7022 -BU_HTM_0 (TTEST, "ttest", CR, ttest)
7023 -
7024 -BU_HTM_0 (GET_TFHAR, "get_tfhar", SPR, nothing)
7025 -BU_HTM_V1 (SET_TFHAR, "set_tfhar", SPR, nothing)
7026 -BU_HTM_0 (GET_TFIAR, "get_tfiar", SPR, nothing)
7027 -BU_HTM_V1 (SET_TFIAR, "set_tfiar", SPR, nothing)
7028 -BU_HTM_0 (GET_TEXASR, "get_texasr", SPR, nothing)
7029 -BU_HTM_V1 (SET_TEXASR, "set_texasr", SPR, nothing)
7030 -BU_HTM_0 (GET_TEXASRU, "get_texasru", SPR, nothing)
7031 -BU_HTM_V1 (SET_TEXASRU, "set_texasru", SPR, nothing)
7032 +BU_HTM_1 (TABORT, "tabort", MISC, tabort)
7033 +BU_HTM_3 (TABORTDC, "tabortdc", MISC, tabortdc)
7034 +BU_HTM_3 (TABORTDCI, "tabortdci", MISC, tabortdci)
7035 +BU_HTM_3 (TABORTWC, "tabortwc", MISC, tabortwc)
7036 +BU_HTM_3 (TABORTWCI, "tabortwci", MISC, tabortwci)
7037 +BU_HTM_1 (TBEGIN, "tbegin", MISC, tbegin)
7038 +BU_HTM_1 (TCHECK, "tcheck", MISC, tcheck)
7039 +BU_HTM_1 (TEND, "tend", MISC, tend)
7040 +BU_HTM_0 (TENDALL, "tendall", MISC, tend)
7041 +BU_HTM_0 (TRECHKPT, "trechkpt", MISC, trechkpt)
7042 +BU_HTM_1 (TRECLAIM, "treclaim", MISC, treclaim)
7043 +BU_HTM_0 (TRESUME, "tresume", MISC, tsr)
7044 +BU_HTM_0 (TSUSPEND, "tsuspend", MISC, tsr)
7045 +BU_HTM_1 (TSR, "tsr", MISC, tsr)
7046 +BU_HTM_0 (TTEST, "ttest", MISC, ttest)
7047 +
7048 +BU_HTM_SPR0 (GET_TFHAR, "get_tfhar", MISC, nothing)
7049 +BU_HTM_SPR1 (SET_TFHAR, "set_tfhar", MISC, nothing)
7050 +BU_HTM_SPR0 (GET_TFIAR, "get_tfiar", MISC, nothing)
7051 +BU_HTM_SPR1 (SET_TFIAR, "set_tfiar", MISC, nothing)
7052 +BU_HTM_SPR0 (GET_TEXASR, "get_texasr", MISC, nothing)
7053 +BU_HTM_SPR1 (SET_TEXASR, "set_texasr", MISC, nothing)
7054 +BU_HTM_SPR0 (GET_TEXASRU, "get_texasru", MISC, nothing)
7055 +BU_HTM_SPR1 (SET_TEXASRU, "set_texasru", MISC, nothing)
7056
7057
7058 /* 3 argument paired floating point builtins. */
7059 diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
7060 index abe0ce6..ba56df8 100644
7061 --- a/gcc/config/rs6000/rs6000-cpus.def
7062 +++ b/gcc/config/rs6000/rs6000-cpus.def
7063 @@ -1,5 +1,5 @@
7064 /* IBM RS/6000 CPU names..
7065 - Copyright (C) 1991-2015 Free Software Foundation, Inc.
7066 + Copyright (C) 1991-2014 Free Software Foundation, Inc.
7067 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
7068
7069 This file is part of GCC.
7070 @@ -189,5 +189,4 @@ RS6000_CPU ("power7", PROCESSOR_POWER7, /* Don't add MASK_ISEL by default */
7071 RS6000_CPU ("power8", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)
7072 RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
7073 RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, MASK_PPC_GFXOPT | MASK_POWERPC64)
7074 -RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)
7075 RS6000_CPU ("rs64", PROCESSOR_RS64A, MASK_PPC_GFXOPT | MASK_POWERPC64)
7076 diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt
7077 index 41e7e14..85678d2 100644
7078 --- a/gcc/config/rs6000/rs6000-tables.opt
7079 +++ b/gcc/config/rs6000/rs6000-tables.opt
7080 @@ -186,8 +186,5 @@ EnumValue
7081 Enum(rs6000_cpu_opt_value) String(powerpc64) Value(52)
7082
7083 EnumValue
7084 -Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(53)
7085 -
7086 -EnumValue
7087 -Enum(rs6000_cpu_opt_value) String(rs64) Value(54)
7088 +Enum(rs6000_cpu_opt_value) String(rs64) Value(53)
7089
7090 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
7091 index e2277e5..f5df7d5 100644
7092 --- a/gcc/config/rs6000/rs6000.c
7093 +++ b/gcc/config/rs6000/rs6000.c
7094 @@ -1,5 +1,5 @@
7095 /* Subroutines used for code generation on IBM RS/6000.
7096 - Copyright (C) 1991-2015 Free Software Foundation, Inc.
7097 + Copyright (C) 1991-2014 Free Software Foundation, Inc.
7098 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
7099
7100 This file is part of GCC.
7101 @@ -80,8 +80,6 @@
7102 #include "cgraph.h"
7103 #include "target-globals.h"
7104 #include "real.h"
7105 -#include "context.h"
7106 -#include "tree-pass.h"
7107 #if TARGET_XCOFF
7108 #include "xcoffout.h" /* get declarations of xcoff_*_section_name */
7109 #endif
7110 @@ -1174,7 +1172,6 @@ static bool rs6000_secondary_reload_move (enum rs6000_reg_type,
7111 enum machine_mode,
7112 secondary_reload_info *,
7113 bool);
7114 -rtl_opt_pass *make_pass_analyze_swaps (gcc::context*);
7115
7116 /* Hash table stuff for keeping track of TOC entries. */
7117
7118 @@ -3103,10 +3100,6 @@ rs6000_option_override_internal (bool global_init_p)
7119 = ((global_init_p || target_option_default_node == NULL)
7120 ? NULL : TREE_TARGET_OPTION (target_option_default_node));
7121
7122 - /* Print defaults. */
7123 - if ((TARGET_DEBUG_REG || TARGET_DEBUG_TARGET) && global_init_p)
7124 - rs6000_print_isa_options (stderr, 0, "TARGET_DEFAULT", TARGET_DEFAULT);
7125 -
7126 /* Remember the explicit arguments. */
7127 if (global_init_p)
7128 rs6000_isa_flags_explicit = global_options_set.x_rs6000_isa_flags;
7129 @@ -3183,13 +3176,7 @@ rs6000_option_override_internal (bool global_init_p)
7130 }
7131 else
7132 {
7133 - /* PowerPC 64-bit LE requires at least ISA 2.07. */
7134 - const char *default_cpu = ((!TARGET_POWERPC64)
7135 - ? "powerpc"
7136 - : ((BYTES_BIG_ENDIAN)
7137 - ? "powerpc64"
7138 - : "powerpc64le"));
7139 -
7140 + const char *default_cpu = (TARGET_POWERPC64 ? "powerpc64" : "powerpc");
7141 rs6000_cpu_index = cpu_index = rs6000_cpu_name_lookup (default_cpu);
7142 have_cpu = false;
7143 }
7144 @@ -3208,18 +3195,15 @@ rs6000_option_override_internal (bool global_init_p)
7145 & set_masks);
7146 }
7147 else
7148 - {
7149 - /* If no -mcpu=<xxx>, inherit any default options that were cleared via
7150 - POWERPC_MASKS. Originally, TARGET_DEFAULT was used to initialize
7151 - target_flags via the TARGET_DEFAULT_TARGET_FLAGS hook. When we switched
7152 - to using rs6000_isa_flags, we need to do the initialization here.
7153 + rs6000_isa_flags |= (processor_target_table[cpu_index].target_enable
7154 + & ~rs6000_isa_flags_explicit);
7155
7156 - If there is a TARGET_DEFAULT, use that. Otherwise fall back to using
7157 - -mcpu=powerpc, -mcpu=powerpc64, or -mcpu=powerpc64le defaults. */
7158 - HOST_WIDE_INT flags = ((TARGET_DEFAULT) ? TARGET_DEFAULT
7159 - : processor_target_table[cpu_index].target_enable);
7160 - rs6000_isa_flags |= (flags & ~rs6000_isa_flags_explicit);
7161 - }
7162 + /* If no -mcpu=<xxx>, inherit any default options that were cleared via
7163 + POWERPC_MASKS. Originally, TARGET_DEFAULT was used to initialize
7164 + target_flags via the TARGET_DEFAULT_TARGET_FLAGS hook. When we switched
7165 + to using rs6000_isa_flags, we need to do the initialization here. */
7166 + if (!have_cpu)
7167 + rs6000_isa_flags |= (TARGET_DEFAULT & ~rs6000_isa_flags_explicit);
7168
7169 if (rs6000_tune_index >= 0)
7170 tune_index = rs6000_tune_index;
7171 @@ -4065,30 +4049,18 @@ rs6000_option_override_internal (bool global_init_p)
7172 }
7173 }
7174
7175 - /* Determine when unaligned vector accesses are permitted, and when
7176 - they are preferred over masked Altivec loads. Note that if
7177 - TARGET_ALLOW_MOVMISALIGN has been disabled by the user, then
7178 - TARGET_EFFICIENT_UNALIGNED_VSX must be as well. The converse is
7179 - not true. */
7180 - if (TARGET_EFFICIENT_UNALIGNED_VSX == -1) {
7181 - if (TARGET_VSX && rs6000_cpu == PROCESSOR_POWER8
7182 - && TARGET_ALLOW_MOVMISALIGN != 0)
7183 - TARGET_EFFICIENT_UNALIGNED_VSX = 1;
7184 - else
7185 - TARGET_EFFICIENT_UNALIGNED_VSX = 0;
7186 - }
7187 -
7188 - if (TARGET_ALLOW_MOVMISALIGN == -1 && rs6000_cpu == PROCESSOR_POWER8)
7189 - TARGET_ALLOW_MOVMISALIGN = 1;
7190 -
7191 /* Set the builtin mask of the various options used that could affect which
7192 builtins were used. In the past we used target_flags, but we've run out
7193 of bits, and some options like SPE and PAIRED are no longer in
7194 target_flags. */
7195 rs6000_builtin_mask = rs6000_builtin_mask_calculate ();
7196 if (TARGET_DEBUG_BUILTIN || TARGET_DEBUG_TARGET)
7197 - rs6000_print_builtin_options (stderr, 0, "builtin mask",
7198 - rs6000_builtin_mask);
7199 + {
7200 + fprintf (stderr,
7201 + "new builtin mask = " HOST_WIDE_INT_PRINT_HEX ", ",
7202 + rs6000_builtin_mask);
7203 + rs6000_print_builtin_options (stderr, 0, NULL, rs6000_builtin_mask);
7204 + }
7205
7206 /* Initialize all of the registers. */
7207 rs6000_init_hard_regno_mode_ok (global_init_p);
7208 @@ -4113,15 +4085,6 @@ static void
7209 rs6000_option_override (void)
7210 {
7211 (void) rs6000_option_override_internal (true);
7212 -
7213 - /* Register machine-specific passes. This needs to be done at start-up.
7214 - It's convenient to do it here (like i386 does). */
7215 - opt_pass *pass_analyze_swaps = make_pass_analyze_swaps (g);
7216 -
7217 - static struct register_pass_info analyze_swaps_info
7218 - = { pass_analyze_swaps, "cse1", 1, PASS_POS_INSERT_BEFORE };
7219 -
7220 - register_pass (&analyze_swaps_info);
7221 }
7222
7223
7224 @@ -4129,9 +4092,7 @@ rs6000_option_override (void)
7225 static tree
7226 rs6000_builtin_mask_for_load (void)
7227 {
7228 - /* Don't use lvsl/vperm for P8 and similarly efficient machines. */
7229 - if ((TARGET_ALTIVEC && !TARGET_VSX)
7230 - || (TARGET_VSX && !TARGET_EFFICIENT_UNALIGNED_VSX))
7231 + if (TARGET_ALTIVEC || TARGET_VSX)
7232 return altivec_builtin_mask_for_load;
7233 else
7234 return 0;
7235 @@ -4210,9 +4171,6 @@ rs6000_builtin_support_vector_misalignment (enum machine_mode mode,
7236 {
7237 if (TARGET_VSX)
7238 {
7239 - if (TARGET_EFFICIENT_UNALIGNED_VSX)
7240 - return true;
7241 -
7242 /* Return if movmisalign pattern is not supported for this mode. */
7243 if (optab_handler (movmisalign_optab, mode) == CODE_FOR_nothing)
7244 return false;
7245 @@ -4276,9 +4234,6 @@ rs6000_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
7246 return 3;
7247
7248 case unaligned_load:
7249 - if (TARGET_EFFICIENT_UNALIGNED_VSX)
7250 - return 1;
7251 -
7252 if (TARGET_VSX && TARGET_ALLOW_MOVMISALIGN)
7253 {
7254 elements = TYPE_VECTOR_SUBPARTS (vectype);
7255 @@ -4314,9 +4269,6 @@ rs6000_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
7256 return 2;
7257
7258 case unaligned_store:
7259 - if (TARGET_EFFICIENT_UNALIGNED_VSX)
7260 - return 1;
7261 -
7262 if (TARGET_VSX && TARGET_ALLOW_MOVMISALIGN)
7263 {
7264 elements = TYPE_VECTOR_SUBPARTS (vectype);
7265 @@ -4978,28 +4930,6 @@ rs6000_file_start (void)
7266 switch_to_section (toc_section);
7267 switch_to_section (text_section);
7268 }
7269 -
7270 -#ifdef USING_ELFOS_H
7271 - if (rs6000_default_cpu == 0 || rs6000_default_cpu[0] == '\0'
7272 - || !global_options_set.x_rs6000_cpu_index)
7273 - {
7274 - fputs ("\t.machine ", asm_out_file);
7275 - if ((rs6000_isa_flags & OPTION_MASK_DIRECT_MOVE) != 0)
7276 - fputs ("power8\n", asm_out_file);
7277 - else if ((rs6000_isa_flags & OPTION_MASK_POPCNTD) != 0)
7278 - fputs ("power7\n", asm_out_file);
7279 - else if ((rs6000_isa_flags & OPTION_MASK_CMPB) != 0)
7280 - fputs ("power6\n", asm_out_file);
7281 - else if ((rs6000_isa_flags & OPTION_MASK_POPCNTB) != 0)
7282 - fputs ("power5\n", asm_out_file);
7283 - else if ((rs6000_isa_flags & OPTION_MASK_MFCRF) != 0)
7284 - fputs ("power4\n", asm_out_file);
7285 - else if ((rs6000_isa_flags & OPTION_MASK_POWERPC64) != 0)
7286 - fputs ("ppc64\n", asm_out_file);
7287 - else
7288 - fputs ("ppc\n", asm_out_file);
7289 - }
7290 -#endif
7291 }
7292
7293
7294 @@ -8220,11 +8150,6 @@ rs6000_emit_le_vsx_store (rtx dest, rtx source, enum machine_mode mode)
7295 {
7296 rtx tmp, permute_src, permute_tmp;
7297
7298 - /* This should never be called during or after reload, because it does
7299 - not re-permute the source register. It is intended only for use
7300 - during expand. */
7301 - gcc_assert (!reload_in_progress && !lra_in_progress && !reload_completed);
7302 -
7303 /* Use V2DImode to do swaps of types with 128-bit scalare parts (TImode,
7304 V1TImode). */
7305 if (mode == TImode || mode == V1TImode)
7306 @@ -12422,9 +12347,9 @@ static inline enum insn_code
7307 rs6000_htm_spr_icode (bool nonvoid)
7308 {
7309 if (nonvoid)
7310 - return (TARGET_POWERPC64) ? CODE_FOR_htm_mfspr_di : CODE_FOR_htm_mfspr_si;
7311 + return (TARGET_64BIT) ? CODE_FOR_htm_mfspr_di : CODE_FOR_htm_mfspr_si;
7312 else
7313 - return (TARGET_POWERPC64) ? CODE_FOR_htm_mtspr_di : CODE_FOR_htm_mtspr_si;
7314 + return (TARGET_64BIT) ? CODE_FOR_htm_mtspr_di : CODE_FOR_htm_mtspr_si;
7315 }
7316
7317 /* Expand the HTM builtin in EXP and store the result in TARGET.
7318 @@ -12438,17 +12363,7 @@ htm_expand_builtin (tree exp, rtx target, bool * expandedp)
7319 const struct builtin_description *d;
7320 size_t i;
7321
7322 - *expandedp = true;
7323 -
7324 - if (!TARGET_POWERPC64
7325 - && (fcode == HTM_BUILTIN_TABORTDC
7326 - || fcode == HTM_BUILTIN_TABORTDCI))
7327 - {
7328 - size_t uns_fcode = (size_t)fcode;
7329 - const char *name = rs6000_builtin_info[uns_fcode].name;
7330 - error ("builtin %s is only valid in 64-bit mode", name);
7331 - return const0_rtx;
7332 - }
7333 + *expandedp = false;
7334
7335 /* Expand the HTM builtins. */
7336 d = bdesc_htm;
7337 @@ -12461,29 +12376,26 @@ htm_expand_builtin (tree exp, rtx target, bool * expandedp)
7338 call_expr_arg_iterator iter;
7339 unsigned attr = rs6000_builtin_info[fcode].attr;
7340 enum insn_code icode = d->icode;
7341 - const struct insn_operand_data *insn_op;
7342 - bool uses_spr = (attr & RS6000_BTC_SPR);
7343 - rtx cr = NULL_RTX;
7344
7345 - if (uses_spr)
7346 + if (attr & RS6000_BTC_SPR)
7347 icode = rs6000_htm_spr_icode (nonvoid);
7348 - insn_op = &insn_data[icode].operand[0];
7349
7350 if (nonvoid)
7351 {
7352 - machine_mode tmode = (uses_spr) ? insn_op->mode : SImode;
7353 + enum machine_mode tmode = insn_data[icode].operand[0].mode;
7354 if (!target
7355 || GET_MODE (target) != tmode
7356 - || (uses_spr && !(*insn_op->predicate) (target, tmode)))
7357 + || !(*insn_data[icode].operand[0].predicate) (target, tmode))
7358 target = gen_reg_rtx (tmode);
7359 - if (uses_spr)
7360 - op[nopnds++] = target;
7361 + op[nopnds++] = target;
7362 }
7363
7364 FOR_EACH_CALL_EXPR_ARG (arg, iter, exp)
7365 {
7366 + const struct insn_operand_data *insn_op;
7367 +
7368 if (arg == error_mark_node || nopnds >= MAX_HTM_OPERANDS)
7369 - return const0_rtx;
7370 + return NULL_RTX;
7371
7372 insn_op = &insn_data[icode].operand[nopnds];
7373
7374 @@ -12530,17 +12442,10 @@ htm_expand_builtin (tree exp, rtx target, bool * expandedp)
7375
7376 /* If this builtin accesses SPRs, then pass in the appropriate
7377 SPR number and SPR regno as the last two operands. */
7378 - if (uses_spr)
7379 + if (attr & RS6000_BTC_SPR)
7380 {
7381 - machine_mode mode = (TARGET_POWERPC64) ? DImode : SImode;
7382 - op[nopnds++] = gen_rtx_CONST_INT (mode, htm_spr_num (fcode));
7383 - op[nopnds++] = gen_rtx_REG (mode, htm_spr_regno (fcode));
7384 - }
7385 - /* If this builtin accesses a CR, then pass in a scratch
7386 - CR as the last operand. */
7387 - else if (attr & RS6000_BTC_CR)
7388 - { cr = gen_reg_rtx (CCmode);
7389 - op[nopnds++] = cr;
7390 + op[nopnds++] = gen_rtx_CONST_INT (Pmode, htm_spr_num (fcode));
7391 + op[nopnds++] = gen_rtx_REG (Pmode, htm_spr_regno (fcode));
7392 }
7393
7394 #ifdef ENABLE_CHECKING
7395 @@ -12553,7 +12458,7 @@ htm_expand_builtin (tree exp, rtx target, bool * expandedp)
7396 expected_nopnds = 3;
7397 if (!(attr & RS6000_BTC_VOID))
7398 expected_nopnds += 1;
7399 - if (uses_spr)
7400 + if (attr & RS6000_BTC_SPR)
7401 expected_nopnds += 2;
7402
7403 gcc_assert (nopnds == expected_nopnds && nopnds <= MAX_HTM_OPERANDS);
7404 @@ -12580,41 +12485,12 @@ htm_expand_builtin (tree exp, rtx target, bool * expandedp)
7405 return NULL_RTX;
7406 emit_insn (pat);
7407
7408 - if (attr & RS6000_BTC_CR)
7409 - {
7410 - if (fcode == HTM_BUILTIN_TBEGIN)
7411 - {
7412 - /* Emit code to set TARGET to true or false depending on
7413 - whether the tbegin. instruction successfully or failed
7414 - to start a transaction. We do this by placing the 1's
7415 - complement of CR's EQ bit into TARGET. */
7416 - rtx scratch = gen_reg_rtx (SImode);
7417 - emit_insn (gen_rtx_SET (VOIDmode, scratch,
7418 - gen_rtx_EQ (SImode, cr,
7419 - const0_rtx)));
7420 - emit_insn (gen_rtx_SET (VOIDmode, target,
7421 - gen_rtx_XOR (SImode, scratch,
7422 - GEN_INT (1))));
7423 - }
7424 - else
7425 - {
7426 - /* Emit code to copy the 4-bit condition register field
7427 - CR into the least significant end of register TARGET. */
7428 - rtx scratch1 = gen_reg_rtx (SImode);
7429 - rtx scratch2 = gen_reg_rtx (SImode);
7430 - rtx subreg = simplify_gen_subreg (CCmode, scratch1, SImode, 0);
7431 - emit_insn (gen_movcc (subreg, cr));
7432 - emit_insn (gen_lshrsi3 (scratch2, scratch1, GEN_INT (28)));
7433 - emit_insn (gen_andsi3 (target, scratch2, GEN_INT (0xf)));
7434 - }
7435 - }
7436 -
7437 + *expandedp = true;
7438 if (nonvoid)
7439 return target;
7440 return const0_rtx;
7441 }
7442
7443 - *expandedp = false;
7444 return NULL_RTX;
7445 }
7446
7447 @@ -15105,31 +14981,8 @@ htm_init_builtins (void)
7448 bool void_func = (attr & RS6000_BTC_VOID);
7449 int attr_args = (attr & RS6000_BTC_TYPE_MASK);
7450 int nopnds = 0;
7451 - tree gpr_type_node;
7452 - tree rettype;
7453 - tree argtype;
7454 -
7455 - if (TARGET_32BIT && TARGET_POWERPC64)
7456 - gpr_type_node = long_long_unsigned_type_node;
7457 - else
7458 - gpr_type_node = long_unsigned_type_node;
7459 -
7460 - if (attr & RS6000_BTC_SPR)
7461 - {
7462 - rettype = gpr_type_node;
7463 - argtype = gpr_type_node;
7464 - }
7465 - else if (d->code == HTM_BUILTIN_TABORTDC
7466 - || d->code == HTM_BUILTIN_TABORTDCI)
7467 - {
7468 - rettype = unsigned_type_node;
7469 - argtype = gpr_type_node;
7470 - }
7471 - else
7472 - {
7473 - rettype = unsigned_type_node;
7474 - argtype = unsigned_type_node;
7475 - }
7476 + tree argtype = (attr & RS6000_BTC_SPR) ? long_unsigned_type_node
7477 + : unsigned_type_node;
7478
7479 if ((mask & builtin_mask) != mask)
7480 {
7481 @@ -15146,7 +14999,7 @@ htm_init_builtins (void)
7482 continue;
7483 }
7484
7485 - op[nopnds++] = (void_func) ? void_type_node : rettype;
7486 + op[nopnds++] = (void_func) ? void_type_node : argtype;
7487
7488 if (attr_args == RS6000_BTC_UNARY)
7489 op[nopnds++] = argtype;
7490 @@ -22404,7 +22257,7 @@ output_probe_stack_range (rtx reg1, rtx reg2)
7491
7492 static rtx
7493 rs6000_frame_related (rtx insn, rtx reg, HOST_WIDE_INT val,
7494 - rtx reg2, rtx rreg)
7495 + rtx reg2, rtx rreg, rtx split_reg)
7496 {
7497 rtx real, temp;
7498
7499 @@ -22495,6 +22348,11 @@ rs6000_frame_related (rtx insn, rtx reg, HOST_WIDE_INT val,
7500 }
7501 }
7502
7503 + /* If a store insn has been split into multiple insns, the
7504 + true source register is given by split_reg. */
7505 + if (split_reg != NULL_RTX)
7506 + real = gen_rtx_SET (VOIDmode, SET_DEST (real), split_reg);
7507 +
7508 RTX_FRAME_RELATED_P (insn) = 1;
7509 add_reg_note (insn, REG_FRAME_RELATED_EXPR, real);
7510
7511 @@ -22602,7 +22460,7 @@ emit_frame_save (rtx frame_reg, enum machine_mode mode,
7512 reg = gen_rtx_REG (mode, regno);
7513 insn = emit_insn (gen_frame_store (reg, frame_reg, offset));
7514 return rs6000_frame_related (insn, frame_reg, frame_reg_to_sp,
7515 - NULL_RTX, NULL_RTX);
7516 + NULL_RTX, NULL_RTX, NULL_RTX);
7517 }
7518
7519 /* Emit an offset memory reference suitable for a frame store, while
7520 @@ -23182,7 +23040,7 @@ rs6000_emit_prologue (void)
7521
7522 insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
7523 rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
7524 - treg, GEN_INT (-info->total_size));
7525 + treg, GEN_INT (-info->total_size), NULL_RTX);
7526 sp_off = frame_off = info->total_size;
7527 }
7528
7529 @@ -23267,7 +23125,7 @@ rs6000_emit_prologue (void)
7530
7531 insn = emit_move_insn (mem, reg);
7532 rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
7533 - NULL_RTX, NULL_RTX);
7534 + NULL_RTX, NULL_RTX, NULL_RTX);
7535 END_USE (0);
7536 }
7537 }
7538 @@ -23323,7 +23181,7 @@ rs6000_emit_prologue (void)
7539 info->lr_save_offset,
7540 DFmode, sel);
7541 rs6000_frame_related (insn, ptr_reg, sp_off,
7542 - NULL_RTX, NULL_RTX);
7543 + NULL_RTX, NULL_RTX, NULL_RTX);
7544 if (lr)
7545 END_USE (0);
7546 }
7547 @@ -23402,7 +23260,7 @@ rs6000_emit_prologue (void)
7548 SAVRES_SAVE | SAVRES_GPR);
7549
7550 rs6000_frame_related (insn, spe_save_area_ptr, sp_off - save_off,
7551 - NULL_RTX, NULL_RTX);
7552 + NULL_RTX, NULL_RTX, NULL_RTX);
7553 }
7554
7555 /* Move the static chain pointer back. */
7556 @@ -23452,7 +23310,7 @@ rs6000_emit_prologue (void)
7557 info->lr_save_offset + ptr_off,
7558 reg_mode, sel);
7559 rs6000_frame_related (insn, ptr_reg, sp_off - ptr_off,
7560 - NULL_RTX, NULL_RTX);
7561 + NULL_RTX, NULL_RTX, NULL_RTX);
7562 if (lr)
7563 END_USE (0);
7564 }
7565 @@ -23468,7 +23326,7 @@ rs6000_emit_prologue (void)
7566 info->gp_save_offset + frame_off + reg_size * i);
7567 insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
7568 rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
7569 - NULL_RTX, NULL_RTX);
7570 + NULL_RTX, NULL_RTX, NULL_RTX);
7571 }
7572 else if (!WORLD_SAVE_P (info))
7573 {
7574 @@ -23791,7 +23649,7 @@ rs6000_emit_prologue (void)
7575 info->altivec_save_offset + ptr_off,
7576 0, V4SImode, SAVRES_SAVE | SAVRES_VR);
7577 rs6000_frame_related (insn, scratch_reg, sp_off - ptr_off,
7578 - NULL_RTX, NULL_RTX);
7579 + NULL_RTX, NULL_RTX, NULL_RTX);
7580 if (REGNO (frame_reg_rtx) == REGNO (scratch_reg))
7581 {
7582 /* The oddity mentioned above clobbered our frame reg. */
7583 @@ -23807,7 +23665,7 @@ rs6000_emit_prologue (void)
7584 for (i = info->first_altivec_reg_save; i <= LAST_ALTIVEC_REGNO; ++i)
7585 if (info->vrsave_mask & ALTIVEC_REG_BIT (i))
7586 {
7587 - rtx areg, savereg, mem;
7588 + rtx areg, savereg, mem, split_reg;
7589 int offset;
7590
7591 offset = (info->altivec_save_offset + frame_off
7592 @@ -23823,13 +23681,20 @@ rs6000_emit_prologue (void)
7593 mem = gen_frame_mem (V4SImode,
7594 gen_rtx_PLUS (Pmode, frame_reg_rtx, areg));
7595
7596 - /* Rather than emitting a generic move, force use of the stvx
7597 - instruction, which we always want. In particular we don't
7598 - want xxpermdi/stxvd2x for little endian. */
7599 - insn = emit_insn (gen_altivec_stvx_v4si_internal (mem, savereg));
7600 + insn = emit_move_insn (mem, savereg);
7601 +
7602 + /* When we split a VSX store into two insns, we need to make
7603 + sure the DWARF info knows which register we are storing.
7604 + Pass it in to be used on the appropriate note. */
7605 + if (!BYTES_BIG_ENDIAN
7606 + && GET_CODE (PATTERN (insn)) == SET
7607 + && GET_CODE (SET_SRC (PATTERN (insn))) == VEC_SELECT)
7608 + split_reg = savereg;
7609 + else
7610 + split_reg = NULL_RTX;
7611
7612 rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
7613 - areg, GEN_INT (offset));
7614 + areg, GEN_INT (offset), split_reg);
7615 }
7616 }
7617
7618 @@ -24471,10 +24336,7 @@ rs6000_emit_epilogue (int sibcall)
7619 mem = gen_frame_mem (V4SImode, addr);
7620
7621 reg = gen_rtx_REG (V4SImode, i);
7622 - /* Rather than emitting a generic move, force use of the
7623 - lvx instruction, which we always want. In particular
7624 - we don't want lxvd2x/xxpermdi for little endian. */
7625 - (void) emit_insn (gen_altivec_lvx_v4si_internal (reg, mem));
7626 + emit_move_insn (reg, mem);
7627 }
7628 }
7629
7630 @@ -24672,10 +24534,7 @@ rs6000_emit_epilogue (int sibcall)
7631 mem = gen_frame_mem (V4SImode, addr);
7632
7633 reg = gen_rtx_REG (V4SImode, i);
7634 - /* Rather than emitting a generic move, force use of the
7635 - lvx instruction, which we always want. In particular
7636 - we don't want lxvd2x/xxpermdi for little endian. */
7637 - (void) emit_insn (gen_altivec_lvx_v4si_internal (reg, mem));
7638 + emit_move_insn (reg, mem);
7639 }
7640 }
7641
7642 @@ -31596,11 +31455,10 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
7643 { "quad-memory", OPTION_MASK_QUAD_MEMORY, false, true },
7644 { "quad-memory-atomic", OPTION_MASK_QUAD_MEMORY_ATOMIC, false, true },
7645 { "recip-precision", OPTION_MASK_RECIP_PRECISION, false, true },
7646 - { "save-toc-indirect", OPTION_MASK_SAVE_TOC_INDIRECT, false, true },
7647 { "string", OPTION_MASK_STRING, false, true },
7648 { "update", OPTION_MASK_NO_UPDATE, true , true },
7649 - { "upper-regs-df", OPTION_MASK_UPPER_REGS_DF, false, true },
7650 - { "upper-regs-sf", OPTION_MASK_UPPER_REGS_SF, false, true },
7651 + { "upper-regs-df", OPTION_MASK_UPPER_REGS_DF, false, false },
7652 + { "upper-regs-sf", OPTION_MASK_UPPER_REGS_SF, false, false },
7653 { "vsx", OPTION_MASK_VSX, false, true },
7654 { "vsx-timode", OPTION_MASK_VSX_TIMODE, false, true },
7655 #ifdef OPTION_MASK_64BIT
7656 @@ -31673,42 +31531,6 @@ static struct rs6000_opt_var const rs6000_opt_vars[] =
7657 { "longcall",
7658 offsetof (struct gcc_options, x_rs6000_default_long_calls),
7659 offsetof (struct cl_target_option, x_rs6000_default_long_calls), },
7660 - { "optimize-swaps",
7661 - offsetof (struct gcc_options, x_rs6000_optimize_swaps),
7662 - offsetof (struct cl_target_option, x_rs6000_optimize_swaps), },
7663 - { "allow-movmisalign",
7664 - offsetof (struct gcc_options, x_TARGET_ALLOW_MOVMISALIGN),
7665 - offsetof (struct cl_target_option, x_TARGET_ALLOW_MOVMISALIGN), },
7666 - { "allow-df-permute",
7667 - offsetof (struct gcc_options, x_TARGET_ALLOW_DF_PERMUTE),
7668 - offsetof (struct cl_target_option, x_TARGET_ALLOW_DF_PERMUTE), },
7669 - { "sched-groups",
7670 - offsetof (struct gcc_options, x_TARGET_SCHED_GROUPS),
7671 - offsetof (struct cl_target_option, x_TARGET_SCHED_GROUPS), },
7672 - { "always-hint",
7673 - offsetof (struct gcc_options, x_TARGET_ALWAYS_HINT),
7674 - offsetof (struct cl_target_option, x_TARGET_ALWAYS_HINT), },
7675 - { "align-branch-targets",
7676 - offsetof (struct gcc_options, x_TARGET_ALIGN_BRANCH_TARGETS),
7677 - offsetof (struct cl_target_option, x_TARGET_ALIGN_BRANCH_TARGETS), },
7678 - { "vectorize-builtins",
7679 - offsetof (struct gcc_options, x_TARGET_VECTORIZE_BUILTINS),
7680 - offsetof (struct cl_target_option, x_TARGET_VECTORIZE_BUILTINS), },
7681 - { "tls-markers",
7682 - offsetof (struct gcc_options, x_tls_markers),
7683 - offsetof (struct cl_target_option, x_tls_markers), },
7684 - { "sched-prolog",
7685 - offsetof (struct gcc_options, x_TARGET_SCHED_PROLOG),
7686 - offsetof (struct cl_target_option, x_TARGET_SCHED_PROLOG), },
7687 - { "sched-epilog",
7688 - offsetof (struct gcc_options, x_TARGET_SCHED_PROLOG),
7689 - offsetof (struct cl_target_option, x_TARGET_SCHED_PROLOG), },
7690 - { "gen-cell-microcode",
7691 - offsetof (struct gcc_options, x_rs6000_gen_cell_microcode),
7692 - offsetof (struct cl_target_option, x_rs6000_gen_cell_microcode), },
7693 - { "warn-cell-microcode",
7694 - offsetof (struct gcc_options, x_rs6000_warn_cell_microcode),
7695 - offsetof (struct cl_target_option, x_rs6000_warn_cell_microcode), },
7696 };
7697
7698 /* Inner function to handle attribute((target("..."))) and #pragma GCC target
7699 @@ -31782,15 +31604,9 @@ rs6000_inner_target_options (tree args, bool attr_p)
7700 rs6000_isa_flags_explicit |= mask;
7701
7702 /* VSX needs altivec, so -mvsx automagically sets
7703 - altivec and disables -mavoid-indexed-addresses. */
7704 - if (!invert)
7705 - {
7706 - if (mask == OPTION_MASK_VSX)
7707 - {
7708 - mask |= OPTION_MASK_ALTIVEC;
7709 - TARGET_AVOID_XFORM = 0;
7710 - }
7711 - }
7712 + altivec. */
7713 + if (mask == OPTION_MASK_VSX && !invert)
7714 + mask |= OPTION_MASK_ALTIVEC;
7715
7716 if (rs6000_opt_masks[i].invert)
7717 invert = !invert;
7718 @@ -31811,7 +31627,6 @@ rs6000_inner_target_options (tree args, bool attr_p)
7719 size_t j = rs6000_opt_vars[i].global_offset;
7720 *((int *) ((char *)&global_options + j)) = !invert;
7721 error_p = false;
7722 - not_valid_p = false;
7723 break;
7724 }
7725 }
7726 @@ -33293,1219 +33108,7 @@ emit_fusion_gpr_load (rtx target, rtx mem)
7727
7728 return "";
7729 }
7730 -
7731 -/* Analyze vector computations and remove unnecessary doubleword
7732 - swaps (xxswapdi instructions). This pass is performed only
7733 - for little-endian VSX code generation.
7734 -
7735 - For this specific case, loads and stores of 4x32 and 2x64 vectors
7736 - are inefficient. These are implemented using the lvx2dx and
7737 - stvx2dx instructions, which invert the order of doublewords in
7738 - a vector register. Thus the code generation inserts an xxswapdi
7739 - after each such load, and prior to each such store. (For spill
7740 - code after register assignment, an additional xxswapdi is inserted
7741 - following each store in order to return a hard register to its
7742 - unpermuted value.)
7743 -
7744 - The extra xxswapdi instructions reduce performance. This can be
7745 - particularly bad for vectorized code. The purpose of this pass
7746 - is to reduce the number of xxswapdi instructions required for
7747 - correctness.
7748 -
7749 - The primary insight is that much code that operates on vectors
7750 - does not care about the relative order of elements in a register,
7751 - so long as the correct memory order is preserved. If we have
7752 - a computation where all input values are provided by lvxd2x/xxswapdi
7753 - sequences, all outputs are stored using xxswapdi/stvxd2x sequences,
7754 - and all intermediate computations are pure SIMD (independent of
7755 - element order), then all the xxswapdi's associated with the loads
7756 - and stores may be removed.
7757 -
7758 - This pass uses some of the infrastructure and logical ideas from
7759 - the "web" pass in web.c. We create maximal webs of computations
7760 - fitting the description above using union-find. Each such web is
7761 - then optimized by removing its unnecessary xxswapdi instructions.
7762 -
7763 - The pass is placed prior to global optimization so that we can
7764 - perform the optimization in the safest and simplest way possible;
7765 - that is, by replacing each xxswapdi insn with a register copy insn.
7766 - Subsequent forward propagation will remove copies where possible.
7767 -
7768 - There are some operations sensitive to element order for which we
7769 - can still allow the operation, provided we modify those operations.
7770 - These include CONST_VECTORs, for which we must swap the first and
7771 - second halves of the constant vector; and SUBREGs, for which we
7772 - must adjust the byte offset to account for the swapped doublewords.
7773 - A remaining opportunity would be non-immediate-form splats, for
7774 - which we should adjust the selected lane of the input. We should
7775 - also make code generation adjustments for sum-across operations,
7776 - since this is a common vectorizer reduction.
7777 -
7778 - Because we run prior to the first split, we can see loads and stores
7779 - here that match *vsx_le_perm_{load,store}_<mode>. These are vanilla
7780 - vector loads and stores that have not yet been split into a permuting
7781 - load/store and a swap. (One way this can happen is with a builtin
7782 - call to vec_vsx_{ld,st}.) We can handle these as well, but rather
7783 - than deleting a swap, we convert the load/store into a permuting
7784 - load/store (which effectively removes the swap). */
7785 -
7786 -/* Notes on Permutes
7787 -
7788 - We do not currently handle computations that contain permutes. There
7789 - is a general transformation that can be performed correctly, but it
7790 - may introduce more expensive code than it replaces. To handle these
7791 - would require a cost model to determine when to perform the optimization.
7792 - This commentary records how this could be done if desired.
7793 -
7794 - The most general permute is something like this (example for V16QI):
7795 -
7796 - (vec_select:V16QI (vec_concat:V32QI (op1:V16QI) (op2:V16QI))
7797 - (parallel [(const_int a0) (const_int a1)
7798 - ...
7799 - (const_int a14) (const_int a15)]))
7800 -
7801 - where a0,...,a15 are in [0,31] and select elements from op1 and op2
7802 - to produce in the result.
7803 -
7804 - Regardless of mode, we can convert the PARALLEL to a mask of 16
7805 - byte-element selectors. Let's call this M, with M[i] representing
7806 - the ith byte-element selector value. Then if we swap doublewords
7807 - throughout the computation, we can get correct behavior by replacing
7808 - M with M' as follows:
7809 -
7810 - { M[i+8]+8 : i < 8, M[i+8] in [0,7] U [16,23]
7811 - M'[i] = { M[i+8]-8 : i < 8, M[i+8] in [8,15] U [24,31]
7812 - { M[i-8]+8 : i >= 8, M[i-8] in [0,7] U [16,23]
7813 - { M[i-8]-8 : i >= 8, M[i-8] in [8,15] U [24,31]
7814 -
7815 - This seems promising at first, since we are just replacing one mask
7816 - with another. But certain masks are preferable to others. If M
7817 - is a mask that matches a vmrghh pattern, for example, M' certainly
7818 - will not. Instead of a single vmrghh, we would generate a load of
7819 - M' and a vperm. So we would need to know how many xxswapd's we can
7820 - remove as a result of this transformation to determine if it's
7821 - profitable; and preferably the logic would need to be aware of all
7822 - the special preferable masks.
7823 -
7824 - Another form of permute is an UNSPEC_VPERM, in which the mask is
7825 - already in a register. In some cases, this mask may be a constant
7826 - that we can discover with ud-chains, in which case the above
7827 - transformation is ok. However, the common usage here is for the
7828 - mask to be produced by an UNSPEC_LVSL, in which case the mask
7829 - cannot be known at compile time. In such a case we would have to
7830 - generate several instructions to compute M' as above at run time,
7831 - and a cost model is needed again. */
7832 -
7833 -/* This is based on the union-find logic in web.c. web_entry_base is
7834 - defined in df.h. */
7835 -class swap_web_entry : public web_entry_base
7836 -{
7837 - public:
7838 - /* Pointer to the insn. */
7839 - rtx insn;
7840 - /* Set if insn contains a mention of a vector register. All other
7841 - fields are undefined if this field is unset. */
7842 - unsigned int is_relevant : 1;
7843 - /* Set if insn is a load. */
7844 - unsigned int is_load : 1;
7845 - /* Set if insn is a store. */
7846 - unsigned int is_store : 1;
7847 - /* Set if insn is a doubleword swap. This can either be a register swap
7848 - or a permuting load or store (test is_load and is_store for this). */
7849 - unsigned int is_swap : 1;
7850 - /* Set if the insn has a live-in use of a parameter register. */
7851 - unsigned int is_live_in : 1;
7852 - /* Set if the insn has a live-out def of a return register. */
7853 - unsigned int is_live_out : 1;
7854 - /* Set if the insn contains a subreg reference of a vector register. */
7855 - unsigned int contains_subreg : 1;
7856 - /* Set if the insn contains a 128-bit integer operand. */
7857 - unsigned int is_128_int : 1;
7858 - /* Set if this is a call-insn. */
7859 - unsigned int is_call : 1;
7860 - /* Set if this insn does not perform a vector operation for which
7861 - element order matters, or if we know how to fix it up if it does.
7862 - Undefined if is_swap is set. */
7863 - unsigned int is_swappable : 1;
7864 - /* A nonzero value indicates what kind of special handling for this
7865 - insn is required if doublewords are swapped. Undefined if
7866 - is_swappable is not set. */
7867 - unsigned int special_handling : 3;
7868 - /* Set if the web represented by this entry cannot be optimized. */
7869 - unsigned int web_not_optimizable : 1;
7870 - /* Set if this insn should be deleted. */
7871 - unsigned int will_delete : 1;
7872 -};
7873 -
7874 -enum special_handling_values {
7875 - SH_NONE = 0,
7876 - SH_CONST_VECTOR,
7877 - SH_SUBREG,
7878 - SH_NOSWAP_LD,
7879 - SH_NOSWAP_ST,
7880 - SH_EXTRACT,
7881 - SH_SPLAT
7882 -};
7883 -
7884 -/* Union INSN with all insns containing definitions that reach USE.
7885 - Detect whether USE is live-in to the current function. */
7886 -static void
7887 -union_defs (swap_web_entry *insn_entry, rtx insn, df_ref use)
7888 -{
7889 - struct df_link *link = DF_REF_CHAIN (use);
7890 -
7891 - if (!link)
7892 - insn_entry[INSN_UID (insn)].is_live_in = 1;
7893 -
7894 - while (link)
7895 - {
7896 - if (DF_REF_IS_ARTIFICIAL (link->ref))
7897 - insn_entry[INSN_UID (insn)].is_live_in = 1;
7898 -
7899 - if (DF_REF_INSN_INFO (link->ref))
7900 - {
7901 - rtx def_insn = DF_REF_INSN (link->ref);
7902 - (void)unionfind_union (insn_entry + INSN_UID (insn),
7903 - insn_entry + INSN_UID (def_insn));
7904 - }
7905 -
7906 - link = link->next;
7907 - }
7908 -}
7909 -
7910 -/* Union INSN with all insns containing uses reached from DEF.
7911 - Detect whether DEF is live-out from the current function. */
7912 -static void
7913 -union_uses (swap_web_entry *insn_entry, rtx insn, df_ref def)
7914 -{
7915 - struct df_link *link = DF_REF_CHAIN (def);
7916 -
7917 - if (!link)
7918 - insn_entry[INSN_UID (insn)].is_live_out = 1;
7919 -
7920 - while (link)
7921 - {
7922 - /* This could be an eh use or some other artificial use;
7923 - we treat these all the same (killing the optimization). */
7924 - if (DF_REF_IS_ARTIFICIAL (link->ref))
7925 - insn_entry[INSN_UID (insn)].is_live_out = 1;
7926 -
7927 - if (DF_REF_INSN_INFO (link->ref))
7928 - {
7929 - rtx use_insn = DF_REF_INSN (link->ref);
7930 - (void)unionfind_union (insn_entry + INSN_UID (insn),
7931 - insn_entry + INSN_UID (use_insn));
7932 - }
7933 -
7934 - link = link->next;
7935 - }
7936 -}
7937 -
7938 -/* Return 1 iff INSN is a load insn, including permuting loads that
7939 - represent an lvxd2x instruction; else return 0. */
7940 -static unsigned int
7941 -insn_is_load_p (rtx insn)
7942 -{
7943 - rtx body = PATTERN (insn);
7944 -
7945 - if (GET_CODE (body) == SET)
7946 - {
7947 - if (GET_CODE (SET_SRC (body)) == MEM)
7948 - return 1;
7949 -
7950 - if (GET_CODE (SET_SRC (body)) == VEC_SELECT
7951 - && GET_CODE (XEXP (SET_SRC (body), 0)) == MEM)
7952 - return 1;
7953 -
7954 - return 0;
7955 - }
7956 -
7957 - if (GET_CODE (body) != PARALLEL)
7958 - return 0;
7959 -
7960 - rtx set = XVECEXP (body, 0, 0);
7961 -
7962 - if (GET_CODE (set) == SET && GET_CODE (SET_SRC (set)) == MEM)
7963 - return 1;
7964 -
7965 - return 0;
7966 -}
7967
7968 -/* Return 1 iff INSN is a store insn, including permuting stores that
7969 - represent an stvxd2x instruction; else return 0. */
7970 -static unsigned int
7971 -insn_is_store_p (rtx insn)
7972 -{
7973 - rtx body = PATTERN (insn);
7974 - if (GET_CODE (body) == SET && GET_CODE (SET_DEST (body)) == MEM)
7975 - return 1;
7976 - if (GET_CODE (body) != PARALLEL)
7977 - return 0;
7978 - rtx set = XVECEXP (body, 0, 0);
7979 - if (GET_CODE (set) == SET && GET_CODE (SET_DEST (set)) == MEM)
7980 - return 1;
7981 - return 0;
7982 -}
7983 -
7984 -/* Return 1 iff INSN swaps doublewords. This may be a reg-reg swap,
7985 - a permuting load, or a permuting store. */
7986 -static unsigned int
7987 -insn_is_swap_p (rtx insn)
7988 -{
7989 - rtx body = PATTERN (insn);
7990 - if (GET_CODE (body) != SET)
7991 - return 0;
7992 - rtx rhs = SET_SRC (body);
7993 - if (GET_CODE (rhs) != VEC_SELECT)
7994 - return 0;
7995 - rtx parallel = XEXP (rhs, 1);
7996 - if (GET_CODE (parallel) != PARALLEL)
7997 - return 0;
7998 - unsigned int len = XVECLEN (parallel, 0);
7999 - if (len != 2 && len != 4 && len != 8 && len != 16)
8000 - return 0;
8001 - for (unsigned int i = 0; i < len / 2; ++i)
8002 - {
8003 - rtx op = XVECEXP (parallel, 0, i);
8004 - if (GET_CODE (op) != CONST_INT || INTVAL (op) != len / 2 + i)
8005 - return 0;
8006 - }
8007 - for (unsigned int i = len / 2; i < len; ++i)
8008 - {
8009 - rtx op = XVECEXP (parallel, 0, i);
8010 - if (GET_CODE (op) != CONST_INT || INTVAL (op) != i - len / 2)
8011 - return 0;
8012 - }
8013 - return 1;
8014 -}
8015 -
8016 -/* Return 1 iff OP is an operand that will not be affected by having
8017 - vector doublewords swapped in memory. */
8018 -static unsigned int
8019 -rtx_is_swappable_p (rtx op, unsigned int *special)
8020 -{
8021 - enum rtx_code code = GET_CODE (op);
8022 - int i, j;
8023 - rtx parallel;
8024 -
8025 - switch (code)
8026 - {
8027 - case LABEL_REF:
8028 - case SYMBOL_REF:
8029 - case CLOBBER:
8030 - case REG:
8031 - return 1;
8032 -
8033 - case VEC_CONCAT:
8034 - case ASM_INPUT:
8035 - case ASM_OPERANDS:
8036 - return 0;
8037 -
8038 - case CONST_VECTOR:
8039 - {
8040 - *special = SH_CONST_VECTOR;
8041 - return 1;
8042 - }
8043 -
8044 - case VEC_DUPLICATE:
8045 - /* Opportunity: If XEXP (op, 0) has the same mode as the result,
8046 - and XEXP (op, 1) is a PARALLEL with a single QImode const int,
8047 - it represents a vector splat for which we can do special
8048 - handling. */
8049 - if (GET_CODE (XEXP (op, 0)) == CONST_INT)
8050 - return 1;
8051 - else if (GET_CODE (XEXP (op, 0)) == REG
8052 - && GET_MODE_INNER (GET_MODE (op)) == GET_MODE (XEXP (op, 0)))
8053 - /* This catches V2DF and V2DI splat, at a minimum. */
8054 - return 1;
8055 - else if (GET_CODE (XEXP (op, 0)) == VEC_SELECT)
8056 - /* If the duplicated item is from a select, defer to the select
8057 - processing to see if we can change the lane for the splat. */
8058 - return rtx_is_swappable_p (XEXP (op, 0), special);
8059 - else
8060 - return 0;
8061 -
8062 - case VEC_SELECT:
8063 - /* A vec_extract operation is ok if we change the lane. */
8064 - if (GET_CODE (XEXP (op, 0)) == REG
8065 - && GET_MODE_INNER (GET_MODE (XEXP (op, 0))) == GET_MODE (op)
8066 - && GET_CODE ((parallel = XEXP (op, 1))) == PARALLEL
8067 - && XVECLEN (parallel, 0) == 1
8068 - && GET_CODE (XVECEXP (parallel, 0, 0)) == CONST_INT)
8069 - {
8070 - *special = SH_EXTRACT;
8071 - return 1;
8072 - }
8073 - else
8074 - return 0;
8075 -
8076 - case UNSPEC:
8077 - {
8078 - /* Various operations are unsafe for this optimization, at least
8079 - without significant additional work. Permutes are obviously
8080 - problematic, as both the permute control vector and the ordering
8081 - of the target values are invalidated by doubleword swapping.
8082 - Vector pack and unpack modify the number of vector lanes.
8083 - Merge-high/low will not operate correctly on swapped operands.
8084 - Vector shifts across element boundaries are clearly uncool,
8085 - as are vector select and concatenate operations. Vector
8086 - sum-across instructions define one operand with a specific
8087 - order-dependent element, so additional fixup code would be
8088 - needed to make those work. Vector set and non-immediate-form
8089 - vector splat are element-order sensitive. A few of these
8090 - cases might be workable with special handling if required.
8091 - Adding cost modeling would be appropriate in some cases. */
8092 - int val = XINT (op, 1);
8093 - switch (val)
8094 - {
8095 - default:
8096 - break;
8097 - case UNSPEC_VMRGH_DIRECT:
8098 - case UNSPEC_VMRGL_DIRECT:
8099 - case UNSPEC_VPACK_SIGN_SIGN_SAT:
8100 - case UNSPEC_VPACK_SIGN_UNS_SAT:
8101 - case UNSPEC_VPACK_UNS_UNS_MOD:
8102 - case UNSPEC_VPACK_UNS_UNS_MOD_DIRECT:
8103 - case UNSPEC_VPACK_UNS_UNS_SAT:
8104 - case UNSPEC_VPERM:
8105 - case UNSPEC_VPERM_UNS:
8106 - case UNSPEC_VPERMHI:
8107 - case UNSPEC_VPERMSI:
8108 - case UNSPEC_VPKPX:
8109 - case UNSPEC_VSLDOI:
8110 - case UNSPEC_VSLO:
8111 - case UNSPEC_VSRO:
8112 - case UNSPEC_VSUM2SWS:
8113 - case UNSPEC_VSUM4S:
8114 - case UNSPEC_VSUM4UBS:
8115 - case UNSPEC_VSUMSWS:
8116 - case UNSPEC_VSUMSWS_DIRECT:
8117 - case UNSPEC_VSX_CONCAT:
8118 - case UNSPEC_VSX_SET:
8119 - case UNSPEC_VSX_SLDWI:
8120 - case UNSPEC_VUNPACK_HI_SIGN:
8121 - case UNSPEC_VUNPACK_HI_SIGN_DIRECT:
8122 - case UNSPEC_VUNPACK_LO_SIGN:
8123 - case UNSPEC_VUNPACK_LO_SIGN_DIRECT:
8124 - case UNSPEC_VUPKHPX:
8125 - case UNSPEC_VUPKHS_V4SF:
8126 - case UNSPEC_VUPKHU_V4SF:
8127 - case UNSPEC_VUPKLPX:
8128 - case UNSPEC_VUPKLS_V4SF:
8129 - case UNSPEC_VUPKLU_V4SF:
8130 - case UNSPEC_VSX_CVDPSPN:
8131 - case UNSPEC_VSX_CVSPDP:
8132 - case UNSPEC_VSX_CVSPDPN:
8133 - return 0;
8134 - case UNSPEC_VSPLT_DIRECT:
8135 - *special = SH_SPLAT;
8136 - return 1;
8137 - }
8138 - }
8139 -
8140 - default:
8141 - break;
8142 - }
8143 -
8144 - const char *fmt = GET_RTX_FORMAT (code);
8145 - int ok = 1;
8146 -
8147 - for (i = 0; i < GET_RTX_LENGTH (code); ++i)
8148 - if (fmt[i] == 'e' || fmt[i] == 'u')
8149 - {
8150 - unsigned int special_op = SH_NONE;
8151 - ok &= rtx_is_swappable_p (XEXP (op, i), &special_op);
8152 - if (special_op == SH_NONE)
8153 - continue;
8154 - /* Ensure we never have two kinds of special handling
8155 - for the same insn. */
8156 - if (*special != SH_NONE && *special != special_op)
8157 - return 0;
8158 - *special = special_op;
8159 - }
8160 - else if (fmt[i] == 'E')
8161 - for (j = 0; j < XVECLEN (op, i); ++j)
8162 - {
8163 - unsigned int special_op = SH_NONE;
8164 - ok &= rtx_is_swappable_p (XVECEXP (op, i, j), &special_op);
8165 - if (special_op == SH_NONE)
8166 - continue;
8167 - /* Ensure we never have two kinds of special handling
8168 - for the same insn. */
8169 - if (*special != SH_NONE && *special != special_op)
8170 - return 0;
8171 - *special = special_op;
8172 - }
8173 -
8174 - return ok;
8175 -}
8176 -
8177 -/* Return 1 iff INSN is an operand that will not be affected by
8178 - having vector doublewords swapped in memory (in which case
8179 - *SPECIAL is unchanged), or that can be modified to be correct
8180 - if vector doublewords are swapped in memory (in which case
8181 - *SPECIAL is changed to a value indicating how). */
8182 -static unsigned int
8183 -insn_is_swappable_p (swap_web_entry *insn_entry, rtx insn,
8184 - unsigned int *special)
8185 -{
8186 - /* Calls are always bad. */
8187 - if (GET_CODE (insn) == CALL_INSN)
8188 - return 0;
8189 -
8190 - /* Loads and stores seen here are not permuting, but we can still
8191 - fix them up by converting them to permuting ones. Exceptions:
8192 - UNSPEC_LVE, UNSPEC_LVX, and UNSPEC_STVX, which have a PARALLEL
8193 - body instead of a SET; and UNSPEC_STVE, which has an UNSPEC
8194 - for the SET source. */
8195 - rtx body = PATTERN (insn);
8196 - int i = INSN_UID (insn);
8197 -
8198 - if (insn_entry[i].is_load)
8199 - {
8200 - if (GET_CODE (body) == SET)
8201 - {
8202 - *special = SH_NOSWAP_LD;
8203 - return 1;
8204 - }
8205 - else
8206 - return 0;
8207 - }
8208 -
8209 - if (insn_entry[i].is_store)
8210 - {
8211 - if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) != UNSPEC)
8212 - {
8213 - *special = SH_NOSWAP_ST;
8214 - return 1;
8215 - }
8216 - else
8217 - return 0;
8218 - }
8219 -
8220 - /* A convert to single precision can be left as is provided that
8221 - all of its uses are in xxspltw instructions that splat BE element
8222 - zero. */
8223 - if (GET_CODE (body) == SET
8224 - && GET_CODE (SET_SRC (body)) == UNSPEC
8225 - && XINT (SET_SRC (body), 1) == UNSPEC_VSX_CVDPSPN)
8226 - {
8227 - df_ref *def_rec;
8228 -
8229 - for (def_rec = DF_INSN_UID_DEFS (i); *def_rec; def_rec++)
8230 - {
8231 - df_ref def = *def_rec;
8232 - struct df_link *link = DF_REF_CHAIN (def);
8233 - if (!link)
8234 - return 0;
8235 -
8236 - for (; link; link = link->next) {
8237 - rtx use_insn = DF_REF_INSN (link->ref);
8238 - rtx use_body = PATTERN (use_insn);
8239 - if (GET_CODE (use_body) != SET
8240 - || GET_CODE (SET_SRC (use_body)) != UNSPEC
8241 - || XINT (SET_SRC (use_body), 1) != UNSPEC_VSX_XXSPLTW
8242 - || XEXP (XEXP (SET_SRC (use_body), 0), 1) != const0_rtx)
8243 - return 0;
8244 - }
8245 - }
8246 -
8247 - return 1;
8248 - }
8249 -
8250 - /* Otherwise check the operands for vector lane violations. */
8251 - return rtx_is_swappable_p (body, special);
8252 -}
8253 -
8254 -enum chain_purpose { FOR_LOADS, FOR_STORES };
8255 -
8256 -/* Return true if the UD or DU chain headed by LINK is non-empty,
8257 - and every entry on the chain references an insn that is a
8258 - register swap. Furthermore, if PURPOSE is FOR_LOADS, each such
8259 - register swap must have only permuting loads as reaching defs.
8260 - If PURPOSE is FOR_STORES, each such register swap must have only
8261 - register swaps or permuting stores as reached uses. */
8262 -static bool
8263 -chain_contains_only_swaps (swap_web_entry *insn_entry, struct df_link *link,
8264 - enum chain_purpose purpose)
8265 -{
8266 - if (!link)
8267 - return false;
8268 -
8269 - for (; link; link = link->next)
8270 - {
8271 - if (!VECTOR_MODE_P (GET_MODE (DF_REF_REG (link->ref))))
8272 - continue;
8273 -
8274 - if (DF_REF_IS_ARTIFICIAL (link->ref))
8275 - return false;
8276 -
8277 - rtx reached_insn = DF_REF_INSN (link->ref);
8278 - unsigned uid = INSN_UID (reached_insn);
8279 -
8280 - if (!insn_entry[uid].is_swap || insn_entry[uid].is_load
8281 - || insn_entry[uid].is_store)
8282 - return false;
8283 -
8284 - if (purpose == FOR_LOADS)
8285 - {
8286 - df_ref *use_rec;
8287 - for (use_rec = DF_INSN_UID_USES (uid); *use_rec; use_rec++)
8288 - {
8289 - df_ref use = *use_rec;
8290 - struct df_link *swap_link = DF_REF_CHAIN (use);
8291 -
8292 - while (swap_link)
8293 - {
8294 - if (DF_REF_IS_ARTIFICIAL (link->ref))
8295 - return false;
8296 -
8297 - rtx swap_def_insn = DF_REF_INSN (swap_link->ref);
8298 - unsigned uid2 = INSN_UID (swap_def_insn);
8299 -
8300 - /* Only permuting loads are allowed. */
8301 - if (!insn_entry[uid2].is_swap || !insn_entry[uid2].is_load)
8302 - return false;
8303 -
8304 - swap_link = swap_link->next;
8305 - }
8306 - }
8307 - }
8308 - else if (purpose == FOR_STORES)
8309 - {
8310 - df_ref *def_rec;
8311 - for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
8312 - {
8313 - df_ref def = *def_rec;
8314 - struct df_link *swap_link = DF_REF_CHAIN (def);
8315 -
8316 - while (swap_link)
8317 - {
8318 - if (DF_REF_IS_ARTIFICIAL (link->ref))
8319 - return false;
8320 -
8321 - rtx swap_use_insn = DF_REF_INSN (swap_link->ref);
8322 - unsigned uid2 = INSN_UID (swap_use_insn);
8323 -
8324 - /* Permuting stores or register swaps are allowed. */
8325 - if (!insn_entry[uid2].is_swap || insn_entry[uid2].is_load)
8326 - return false;
8327 -
8328 - swap_link = swap_link->next;
8329 - }
8330 - }
8331 - }
8332 - }
8333 -
8334 - return true;
8335 -}
8336 -
8337 -/* Mark the xxswapdi instructions associated with permuting loads and
8338 - stores for removal. Note that we only flag them for deletion here,
8339 - as there is a possibility of a swap being reached from multiple
8340 - loads, etc. */
8341 -static void
8342 -mark_swaps_for_removal (swap_web_entry *insn_entry, unsigned int i)
8343 -{
8344 - rtx insn = insn_entry[i].insn;
8345 - unsigned uid = INSN_UID (insn);
8346 -
8347 - if (insn_entry[i].is_load)
8348 - {
8349 - df_ref *def_rec;
8350 - for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
8351 - {
8352 - df_ref def = *def_rec;
8353 - struct df_link *link = DF_REF_CHAIN (def);
8354 -
8355 - /* We know by now that these are swaps, so we can delete
8356 - them confidently. */
8357 - while (link)
8358 - {
8359 - rtx use_insn = DF_REF_INSN (link->ref);
8360 - insn_entry[INSN_UID (use_insn)].will_delete = 1;
8361 - link = link->next;
8362 - }
8363 - }
8364 - }
8365 - else if (insn_entry[i].is_store)
8366 - {
8367 - df_ref *use_rec;
8368 - for (use_rec = DF_INSN_UID_USES (uid); *use_rec; use_rec++)
8369 - {
8370 - df_ref use = *use_rec;
8371 - /* Ignore uses for addressability. */
8372 - machine_mode mode = GET_MODE (DF_REF_REG (use));
8373 - if (!VECTOR_MODE_P (mode))
8374 - continue;
8375 -
8376 - struct df_link *link = DF_REF_CHAIN (use);
8377 -
8378 - /* We know by now that these are swaps, so we can delete
8379 - them confidently. */
8380 - while (link)
8381 - {
8382 - rtx def_insn = DF_REF_INSN (link->ref);
8383 - insn_entry[INSN_UID (def_insn)].will_delete = 1;
8384 - link = link->next;
8385 - }
8386 - }
8387 - }
8388 -}
8389 -
8390 -/* OP is either a CONST_VECTOR or an expression containing one.
8391 - Swap the first half of the vector with the second in the first
8392 - case. Recurse to find it in the second. */
8393 -static void
8394 -swap_const_vector_halves (rtx op)
8395 -{
8396 - int i;
8397 - enum rtx_code code = GET_CODE (op);
8398 - if (GET_CODE (op) == CONST_VECTOR)
8399 - {
8400 - int half_units = GET_MODE_NUNITS (GET_MODE (op)) / 2;
8401 - for (i = 0; i < half_units; ++i)
8402 - {
8403 - rtx temp = CONST_VECTOR_ELT (op, i);
8404 - CONST_VECTOR_ELT (op, i) = CONST_VECTOR_ELT (op, i + half_units);
8405 - CONST_VECTOR_ELT (op, i + half_units) = temp;
8406 - }
8407 - }
8408 - else
8409 - {
8410 - int j;
8411 - const char *fmt = GET_RTX_FORMAT (code);
8412 - for (i = 0; i < GET_RTX_LENGTH (code); ++i)
8413 - if (fmt[i] == 'e' || fmt[i] == 'u')
8414 - swap_const_vector_halves (XEXP (op, i));
8415 - else if (fmt[i] == 'E')
8416 - for (j = 0; j < XVECLEN (op, i); ++j)
8417 - swap_const_vector_halves (XVECEXP (op, i, j));
8418 - }
8419 -}
8420 -
8421 -/* Find all subregs of a vector expression that perform a narrowing,
8422 - and adjust the subreg index to account for doubleword swapping. */
8423 -static void
8424 -adjust_subreg_index (rtx op)
8425 -{
8426 - enum rtx_code code = GET_CODE (op);
8427 - if (code == SUBREG
8428 - && (GET_MODE_SIZE (GET_MODE (op))
8429 - < GET_MODE_SIZE (GET_MODE (XEXP (op, 0)))))
8430 - {
8431 - unsigned int index = SUBREG_BYTE (op);
8432 - if (index < 8)
8433 - index += 8;
8434 - else
8435 - index -= 8;
8436 - SUBREG_BYTE (op) = index;
8437 - }
8438 -
8439 - const char *fmt = GET_RTX_FORMAT (code);
8440 - int i,j;
8441 - for (i = 0; i < GET_RTX_LENGTH (code); ++i)
8442 - if (fmt[i] == 'e' || fmt[i] == 'u')
8443 - adjust_subreg_index (XEXP (op, i));
8444 - else if (fmt[i] == 'E')
8445 - for (j = 0; j < XVECLEN (op, i); ++j)
8446 - adjust_subreg_index (XVECEXP (op, i, j));
8447 -}
8448 -
8449 -/* Convert the non-permuting load INSN to a permuting one. */
8450 -static void
8451 -permute_load (rtx insn)
8452 -{
8453 - rtx body = PATTERN (insn);
8454 - rtx mem_op = SET_SRC (body);
8455 - rtx tgt_reg = SET_DEST (body);
8456 - machine_mode mode = GET_MODE (tgt_reg);
8457 - int n_elts = GET_MODE_NUNITS (mode);
8458 - int half_elts = n_elts / 2;
8459 - rtx par = gen_rtx_PARALLEL (mode, rtvec_alloc (n_elts));
8460 - int i, j;
8461 - for (i = 0, j = half_elts; i < half_elts; ++i, ++j)
8462 - XVECEXP (par, 0, i) = GEN_INT (j);
8463 - for (i = half_elts, j = 0; j < half_elts; ++i, ++j)
8464 - XVECEXP (par, 0, i) = GEN_INT (j);
8465 - rtx sel = gen_rtx_VEC_SELECT (mode, mem_op, par);
8466 - SET_SRC (body) = sel;
8467 - INSN_CODE (insn) = -1; /* Force re-recognition. */
8468 - df_insn_rescan (insn);
8469 -
8470 - if (dump_file)
8471 - fprintf (dump_file, "Replacing load %d with permuted load\n",
8472 - INSN_UID (insn));
8473 -}
8474 -
8475 -/* Convert the non-permuting store INSN to a permuting one. */
8476 -static void
8477 -permute_store (rtx insn)
8478 -{
8479 - rtx body = PATTERN (insn);
8480 - rtx src_reg = SET_SRC (body);
8481 - machine_mode mode = GET_MODE (src_reg);
8482 - int n_elts = GET_MODE_NUNITS (mode);
8483 - int half_elts = n_elts / 2;
8484 - rtx par = gen_rtx_PARALLEL (mode, rtvec_alloc (n_elts));
8485 - int i, j;
8486 - for (i = 0, j = half_elts; i < half_elts; ++i, ++j)
8487 - XVECEXP (par, 0, i) = GEN_INT (j);
8488 - for (i = half_elts, j = 0; j < half_elts; ++i, ++j)
8489 - XVECEXP (par, 0, i) = GEN_INT (j);
8490 - rtx sel = gen_rtx_VEC_SELECT (mode, src_reg, par);
8491 - SET_SRC (body) = sel;
8492 - INSN_CODE (insn) = -1; /* Force re-recognition. */
8493 - df_insn_rescan (insn);
8494 -
8495 - if (dump_file)
8496 - fprintf (dump_file, "Replacing store %d with permuted store\n",
8497 - INSN_UID (insn));
8498 -}
8499 -
8500 -/* Given OP that contains a vector extract operation, adjust the index
8501 - of the extracted lane to account for the doubleword swap. */
8502 -static void
8503 -adjust_extract (rtx insn)
8504 -{
8505 - rtx pattern = PATTERN (insn);
8506 - if (GET_CODE (pattern) == PARALLEL)
8507 - pattern = XVECEXP (pattern, 0, 0);
8508 - rtx src = SET_SRC (pattern);
8509 - /* The vec_select may be wrapped in a vec_duplicate for a splat, so
8510 - account for that. */
8511 - rtx sel = GET_CODE (src) == VEC_DUPLICATE ? XEXP (src, 0) : src;
8512 - rtx par = XEXP (sel, 1);
8513 - int half_elts = GET_MODE_NUNITS (GET_MODE (XEXP (sel, 0))) >> 1;
8514 - int lane = INTVAL (XVECEXP (par, 0, 0));
8515 - lane = lane >= half_elts ? lane - half_elts : lane + half_elts;
8516 - XVECEXP (par, 0, 0) = GEN_INT (lane);
8517 - INSN_CODE (insn) = -1; /* Force re-recognition. */
8518 - df_insn_rescan (insn);
8519 -
8520 - if (dump_file)
8521 - fprintf (dump_file, "Changing lane for extract %d\n", INSN_UID (insn));
8522 -}
8523 -
8524 -/* Given OP that contains a vector direct-splat operation, adjust the index
8525 - of the source lane to account for the doubleword swap. */
8526 -static void
8527 -adjust_splat (rtx insn)
8528 -{
8529 - rtx body = PATTERN (insn);
8530 - rtx unspec = XEXP (body, 1);
8531 - int half_elts = GET_MODE_NUNITS (GET_MODE (unspec)) >> 1;
8532 - int lane = INTVAL (XVECEXP (unspec, 0, 1));
8533 - lane = lane >= half_elts ? lane - half_elts : lane + half_elts;
8534 - XVECEXP (unspec, 0, 1) = GEN_INT (lane);
8535 - INSN_CODE (insn) = -1; /* Force re-recognition. */
8536 - df_insn_rescan (insn);
8537 -
8538 - if (dump_file)
8539 - fprintf (dump_file, "Changing lane for splat %d\n", INSN_UID (insn));
8540 -}
8541 -
8542 -/* The insn described by INSN_ENTRY[I] can be swapped, but only
8543 - with special handling. Take care of that here. */
8544 -static void
8545 -handle_special_swappables (swap_web_entry *insn_entry, unsigned i)
8546 -{
8547 - rtx insn = insn_entry[i].insn;
8548 - rtx body = PATTERN (insn);
8549 -
8550 - switch (insn_entry[i].special_handling)
8551 - {
8552 - default:
8553 - gcc_unreachable ();
8554 - case SH_CONST_VECTOR:
8555 - {
8556 - /* A CONST_VECTOR will only show up somewhere in the RHS of a SET. */
8557 - gcc_assert (GET_CODE (body) == SET);
8558 - rtx rhs = SET_SRC (body);
8559 - swap_const_vector_halves (rhs);
8560 - if (dump_file)
8561 - fprintf (dump_file, "Swapping constant halves in insn %d\n", i);
8562 - break;
8563 - }
8564 - case SH_SUBREG:
8565 - /* A subreg of the same size is already safe. For subregs that
8566 - select a smaller portion of a reg, adjust the index for
8567 - swapped doublewords. */
8568 - adjust_subreg_index (body);
8569 - if (dump_file)
8570 - fprintf (dump_file, "Adjusting subreg in insn %d\n", i);
8571 - break;
8572 - case SH_NOSWAP_LD:
8573 - /* Convert a non-permuting load to a permuting one. */
8574 - permute_load (insn);
8575 - break;
8576 - case SH_NOSWAP_ST:
8577 - /* Convert a non-permuting store to a permuting one. */
8578 - permute_store (insn);
8579 - break;
8580 - case SH_EXTRACT:
8581 - /* Change the lane on an extract operation. */
8582 - adjust_extract (insn);
8583 - break;
8584 - case SH_SPLAT:
8585 - /* Change the lane on a direct-splat operation. */
8586 - adjust_splat (insn);
8587 - break;
8588 - }
8589 -}
8590 -
8591 -/* Find the insn from the Ith table entry, which is known to be a
8592 - register swap Y = SWAP(X). Replace it with a copy Y = X. */
8593 -static void
8594 -replace_swap_with_copy (swap_web_entry *insn_entry, unsigned i)
8595 -{
8596 - rtx insn = insn_entry[i].insn;
8597 - rtx body = PATTERN (insn);
8598 - rtx src_reg = XEXP (SET_SRC (body), 0);
8599 - rtx copy = gen_rtx_SET (VOIDmode, SET_DEST (body), src_reg);
8600 - rtx new_insn = emit_insn_before (copy, insn);
8601 - set_block_for_insn (new_insn, BLOCK_FOR_INSN (insn));
8602 - df_insn_rescan (new_insn);
8603 -
8604 - if (dump_file)
8605 - {
8606 - unsigned int new_uid = INSN_UID (new_insn);
8607 - fprintf (dump_file, "Replacing swap %d with copy %d\n", i, new_uid);
8608 - }
8609 -
8610 - df_insn_delete (insn);
8611 - remove_insn (insn);
8612 - INSN_DELETED_P (insn) = 1;
8613 -}
8614 -
8615 -/* Dump the swap table to DUMP_FILE. */
8616 -static void
8617 -dump_swap_insn_table (swap_web_entry *insn_entry)
8618 -{
8619 - int e = get_max_uid ();
8620 - fprintf (dump_file, "\nRelevant insns with their flag settings\n\n");
8621 -
8622 - for (int i = 0; i < e; ++i)
8623 - if (insn_entry[i].is_relevant)
8624 - {
8625 - swap_web_entry *pred_entry = (swap_web_entry *)insn_entry[i].pred ();
8626 - fprintf (dump_file, "%6d %6d ", i,
8627 - pred_entry && pred_entry->insn
8628 - ? INSN_UID (pred_entry->insn) : 0);
8629 - if (insn_entry[i].is_load)
8630 - fputs ("load ", dump_file);
8631 - if (insn_entry[i].is_store)
8632 - fputs ("store ", dump_file);
8633 - if (insn_entry[i].is_swap)
8634 - fputs ("swap ", dump_file);
8635 - if (insn_entry[i].is_live_in)
8636 - fputs ("live-in ", dump_file);
8637 - if (insn_entry[i].is_live_out)
8638 - fputs ("live-out ", dump_file);
8639 - if (insn_entry[i].contains_subreg)
8640 - fputs ("subreg ", dump_file);
8641 - if (insn_entry[i].is_128_int)
8642 - fputs ("int128 ", dump_file);
8643 - if (insn_entry[i].is_call)
8644 - fputs ("call ", dump_file);
8645 - if (insn_entry[i].is_swappable)
8646 - {
8647 - fputs ("swappable ", dump_file);
8648 - if (insn_entry[i].special_handling == SH_CONST_VECTOR)
8649 - fputs ("special:constvec ", dump_file);
8650 - else if (insn_entry[i].special_handling == SH_SUBREG)
8651 - fputs ("special:subreg ", dump_file);
8652 - else if (insn_entry[i].special_handling == SH_NOSWAP_LD)
8653 - fputs ("special:load ", dump_file);
8654 - else if (insn_entry[i].special_handling == SH_NOSWAP_ST)
8655 - fputs ("special:store ", dump_file);
8656 - else if (insn_entry[i].special_handling == SH_EXTRACT)
8657 - fputs ("special:extract ", dump_file);
8658 - else if (insn_entry[i].special_handling == SH_SPLAT)
8659 - fputs ("special:splat ", dump_file);
8660 - }
8661 - if (insn_entry[i].web_not_optimizable)
8662 - fputs ("unoptimizable ", dump_file);
8663 - if (insn_entry[i].will_delete)
8664 - fputs ("delete ", dump_file);
8665 - fputs ("\n", dump_file);
8666 - }
8667 - fputs ("\n", dump_file);
8668 -}
8669 -
8670 -/* Main entry point for this pass. */
8671 -unsigned int
8672 -rs6000_analyze_swaps (function *fun)
8673 -{
8674 - swap_web_entry *insn_entry;
8675 - basic_block bb;
8676 - rtx insn;
8677 -
8678 - /* Dataflow analysis for use-def chains. */
8679 - df_set_flags (DF_RD_PRUNE_DEAD_DEFS);
8680 - df_chain_add_problem (DF_DU_CHAIN | DF_UD_CHAIN);
8681 - df_analyze ();
8682 - df_set_flags (DF_DEFER_INSN_RESCAN);
8683 -
8684 - /* Allocate structure to represent webs of insns. */
8685 - insn_entry = XCNEWVEC (swap_web_entry, get_max_uid ());
8686 -
8687 - /* Walk the insns to gather basic data. */
8688 - FOR_ALL_BB_FN (bb, fun)
8689 - FOR_BB_INSNS (bb, insn)
8690 - {
8691 - unsigned int uid = INSN_UID (insn);
8692 - if (NONDEBUG_INSN_P (insn))
8693 - {
8694 - insn_entry[uid].insn = insn;
8695 -
8696 - if (GET_CODE (insn) == CALL_INSN)
8697 - insn_entry[uid].is_call = 1;
8698 -
8699 - /* Walk the uses and defs to see if we mention vector regs.
8700 - Record any constraints on optimization of such mentions. */
8701 - df_ref *use_rec;
8702 - for (use_rec = DF_INSN_UID_USES (uid); *use_rec; use_rec++)
8703 - {
8704 - df_ref mention = *use_rec;
8705 - /* We use DF_REF_REAL_REG here to get inside any subregs. */
8706 - machine_mode mode = GET_MODE (DF_REF_REAL_REG (mention));
8707 -
8708 - /* If a use gets its value from a call insn, it will be
8709 - a hard register and will look like (reg:V4SI 3 3).
8710 - The df analysis creates two mentions for GPR3 and GPR4,
8711 - both DImode. We must recognize this and treat it as a
8712 - vector mention to ensure the call is unioned with this
8713 - use. */
8714 - if (mode == DImode && DF_REF_INSN_INFO (mention))
8715 - {
8716 - rtx feeder = DF_REF_INSN (mention);
8717 - /* FIXME: It is pretty hard to get from the df mention
8718 - to the mode of the use in the insn. We arbitrarily
8719 - pick a vector mode here, even though the use might
8720 - be a real DImode. We can be too conservative
8721 - (create a web larger than necessary) because of
8722 - this, so consider eventually fixing this. */
8723 - if (GET_CODE (feeder) == CALL_INSN)
8724 - mode = V4SImode;
8725 - }
8726 -
8727 - if (VECTOR_MODE_P (mode) || mode == TImode)
8728 - {
8729 - insn_entry[uid].is_relevant = 1;
8730 - if (mode == TImode || mode == V1TImode)
8731 - insn_entry[uid].is_128_int = 1;
8732 - if (DF_REF_INSN_INFO (mention))
8733 - insn_entry[uid].contains_subreg
8734 - = !rtx_equal_p (DF_REF_REG (mention),
8735 - DF_REF_REAL_REG (mention));
8736 - union_defs (insn_entry, insn, mention);
8737 - }
8738 - }
8739 - df_ref *def_rec;
8740 - for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
8741 - {
8742 - df_ref mention = *def_rec;
8743 - /* We use DF_REF_REAL_REG here to get inside any subregs. */
8744 - machine_mode mode = GET_MODE (DF_REF_REAL_REG (mention));
8745 -
8746 - /* If we're loading up a hard vector register for a call,
8747 - it looks like (set (reg:V4SI 9 9) (...)). The df
8748 - analysis creates two mentions for GPR9 and GPR10, both
8749 - DImode. So relying on the mode from the mentions
8750 - isn't sufficient to ensure we union the call into the
8751 - web with the parameter setup code. */
8752 - if (mode == DImode && GET_CODE (insn) == SET
8753 - && VECTOR_MODE_P (GET_MODE (SET_DEST (insn))))
8754 - mode = GET_MODE (SET_DEST (insn));
8755 -
8756 - if (VECTOR_MODE_P (mode) || mode == TImode)
8757 - {
8758 - insn_entry[uid].is_relevant = 1;
8759 - if (mode == TImode || mode == V1TImode)
8760 - insn_entry[uid].is_128_int = 1;
8761 - if (DF_REF_INSN_INFO (mention))
8762 - insn_entry[uid].contains_subreg
8763 - = !rtx_equal_p (DF_REF_REG (mention),
8764 - DF_REF_REAL_REG (mention));
8765 - /* REG_FUNCTION_VALUE_P is not valid for subregs. */
8766 - else if (REG_FUNCTION_VALUE_P (DF_REF_REG (mention)))
8767 - insn_entry[uid].is_live_out = 1;
8768 - union_uses (insn_entry, insn, mention);
8769 - }
8770 - }
8771 -
8772 - if (insn_entry[uid].is_relevant)
8773 - {
8774 - /* Determine if this is a load or store. */
8775 - insn_entry[uid].is_load = insn_is_load_p (insn);
8776 - insn_entry[uid].is_store = insn_is_store_p (insn);
8777 -
8778 - /* Determine if this is a doubleword swap. If not,
8779 - determine whether it can legally be swapped. */
8780 - if (insn_is_swap_p (insn))
8781 - insn_entry[uid].is_swap = 1;
8782 - else
8783 - {
8784 - unsigned int special = SH_NONE;
8785 - insn_entry[uid].is_swappable
8786 - = insn_is_swappable_p (insn_entry, insn, &special);
8787 - if (special != SH_NONE && insn_entry[uid].contains_subreg)
8788 - insn_entry[uid].is_swappable = 0;
8789 - else if (special != SH_NONE)
8790 - insn_entry[uid].special_handling = special;
8791 - else if (insn_entry[uid].contains_subreg)
8792 - insn_entry[uid].special_handling = SH_SUBREG;
8793 - }
8794 - }
8795 - }
8796 - }
8797 -
8798 - if (dump_file)
8799 - {
8800 - fprintf (dump_file, "\nSwap insn entry table when first built\n");
8801 - dump_swap_insn_table (insn_entry);
8802 - }
8803 -
8804 - /* Record unoptimizable webs. */
8805 - unsigned e = get_max_uid (), i;
8806 - for (i = 0; i < e; ++i)
8807 - {
8808 - if (!insn_entry[i].is_relevant)
8809 - continue;
8810 -
8811 - swap_web_entry *root
8812 - = (swap_web_entry*)(&insn_entry[i])->unionfind_root ();
8813 - unsigned uid = INSN_UID (insn_entry[i].insn);
8814 -
8815 - if (insn_entry[i].is_live_in || insn_entry[i].is_live_out
8816 - || (insn_entry[i].contains_subreg
8817 - && insn_entry[i].special_handling != SH_SUBREG)
8818 - || insn_entry[i].is_128_int || insn_entry[i].is_call
8819 - || !(insn_entry[i].is_swappable || insn_entry[i].is_swap))
8820 - root->web_not_optimizable = 1;
8821 -
8822 - /* If we have loads or stores that aren't permuting then the
8823 - optimization isn't appropriate. */
8824 - else if ((insn_entry[i].is_load || insn_entry[i].is_store)
8825 - && !insn_entry[i].is_swap && !insn_entry[i].is_swappable)
8826 - root->web_not_optimizable = 1;
8827 -
8828 - /* If we have permuting loads or stores that are not accompanied
8829 - by a register swap, the optimization isn't appropriate. */
8830 - else if (insn_entry[i].is_load && insn_entry[i].is_swap)
8831 - {
8832 - df_ref *def_rec;
8833 -
8834 - for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
8835 - {
8836 - df_ref def = *def_rec;
8837 - struct df_link *link = DF_REF_CHAIN (def);
8838 -
8839 - if (!chain_contains_only_swaps (insn_entry, link, FOR_LOADS))
8840 - {
8841 - root->web_not_optimizable = 1;
8842 - break;
8843 - }
8844 - }
8845 - }
8846 - else if (insn_entry[i].is_store && insn_entry[i].is_swap)
8847 - {
8848 - df_ref *use_rec;
8849 -
8850 - for (use_rec = DF_INSN_UID_USES (uid); *use_rec; use_rec++)
8851 - {
8852 - df_ref use = *use_rec;
8853 - struct df_link *link = DF_REF_CHAIN (use);
8854 -
8855 - if (!chain_contains_only_swaps (insn_entry, link, FOR_STORES))
8856 - {
8857 - root->web_not_optimizable = 1;
8858 - break;
8859 - }
8860 - }
8861 - }
8862 - }
8863 -
8864 - if (dump_file)
8865 - {
8866 - fprintf (dump_file, "\nSwap insn entry table after web analysis\n");
8867 - dump_swap_insn_table (insn_entry);
8868 - }
8869 -
8870 - /* For each load and store in an optimizable web (which implies
8871 - the loads and stores are permuting), find the associated
8872 - register swaps and mark them for removal. Due to various
8873 - optimizations we may mark the same swap more than once. Also
8874 - perform special handling for swappable insns that require it. */
8875 - for (i = 0; i < e; ++i)
8876 - if ((insn_entry[i].is_load || insn_entry[i].is_store)
8877 - && insn_entry[i].is_swap)
8878 - {
8879 - swap_web_entry* root_entry
8880 - = (swap_web_entry*)((&insn_entry[i])->unionfind_root ());
8881 - if (!root_entry->web_not_optimizable)
8882 - mark_swaps_for_removal (insn_entry, i);
8883 - }
8884 - else if (insn_entry[i].is_swappable && insn_entry[i].special_handling)
8885 - {
8886 - swap_web_entry* root_entry
8887 - = (swap_web_entry*)((&insn_entry[i])->unionfind_root ());
8888 - if (!root_entry->web_not_optimizable)
8889 - handle_special_swappables (insn_entry, i);
8890 - }
8891 -
8892 - /* Now delete the swaps marked for removal. */
8893 - for (i = 0; i < e; ++i)
8894 - if (insn_entry[i].will_delete)
8895 - replace_swap_with_copy (insn_entry, i);
8896 -
8897 - /* Clean up. */
8898 - free (insn_entry);
8899 - return 0;
8900 -}
8901 -
8902 -const pass_data pass_data_analyze_swaps =
8903 -{
8904 - RTL_PASS, /* type */
8905 - "swaps", /* name */
8906 - OPTGROUP_NONE, /* optinfo_flags */
8907 - true, /* has_gate */
8908 - true, /* has_execute */
8909 - TV_NONE, /* tv_id */
8910 - 0, /* properties_required */
8911 - 0, /* properties_provided */
8912 - 0, /* properties_destroyed */
8913 - 0, /* todo_flags_start */
8914 - TODO_df_finish, /* todo_flags_finish */
8915 -};
8916 -
8917 -class pass_analyze_swaps : public rtl_opt_pass
8918 -{
8919 -public:
8920 - pass_analyze_swaps(gcc::context *ctxt)
8921 - : rtl_opt_pass(pass_data_analyze_swaps, ctxt)
8922 - {}
8923 -
8924 - /* opt_pass methods: */
8925 - bool gate ()
8926 - {
8927 - return (optimize > 0 && !BYTES_BIG_ENDIAN && TARGET_VSX
8928 - && rs6000_optimize_swaps);
8929 - }
8930 -
8931 - unsigned int execute ()
8932 - {
8933 - return rs6000_analyze_swaps (cfun);
8934 - }
8935 -
8936 -}; // class pass_analyze_swaps
8937 -
8938 -rtl_opt_pass *
8939 -make_pass_analyze_swaps (gcc::context *ctxt)
8940 -{
8941 - return new pass_analyze_swaps (ctxt);
8942 -}
8943
8944 struct gcc_target targetm = TARGET_INITIALIZER;
8945
8946 diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
8947 index bd33ba8..f363867 100644
8948 --- a/gcc/config/rs6000/rs6000.h
8949 +++ b/gcc/config/rs6000/rs6000.h
8950 @@ -899,8 +899,7 @@ enum data_align { align_abi, align_opt, align_both };
8951 || (((MODE) == SFmode || (MODE) == DFmode || (MODE) == TFmode \
8952 || (MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode) \
8953 && (ALIGN) < 32) \
8954 - || (!TARGET_EFFICIENT_UNALIGNED_VSX \
8955 - && (VECTOR_MODE_P ((MODE)) && (((int)(ALIGN)) < VECTOR_ALIGN (MODE)))))
8956 + || (VECTOR_MODE_P ((MODE)) && (((int)(ALIGN)) < VECTOR_ALIGN (MODE))))
8957
8958
8959 /* Standard register usage. */
8960 @@ -2588,8 +2587,9 @@ extern int frame_pointer_needed;
8961 /* Miscellaneous information. */
8962 #define RS6000_BTC_SPR 0x01000000 /* function references SPRs. */
8963 #define RS6000_BTC_VOID 0x02000000 /* function has no return value. */
8964 -#define RS6000_BTC_CR 0x04000000 /* function references a CR. */
8965 -#define RS6000_BTC_OVERLOADED 0x08000000 /* function is overloaded. */
8966 +#define RS6000_BTC_OVERLOADED 0x04000000 /* function is overloaded. */
8967 +#define RS6000_BTC_32BIT 0x08000000 /* function references SPRs. */
8968 +#define RS6000_BTC_64BIT 0x10000000 /* function references SPRs. */
8969 #define RS6000_BTC_MISC_MASK 0x1f000000 /* Mask of the misc info. */
8970
8971 /* Convenience macros to document the instruction type. */
8972 diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
8973 index 94637f7..f77754a 100644
8974 --- a/gcc/config/rs6000/rs6000.md
8975 +++ b/gcc/config/rs6000/rs6000.md
8976 @@ -2389,7 +2389,8 @@
8977 (bswap:DI
8978 (match_operand:DI 1 "reg_or_mem_operand" "")))
8979 (clobber (match_scratch:DI 2 ""))
8980 - (clobber (match_scratch:DI 3 ""))])]
8981 + (clobber (match_scratch:DI 3 ""))
8982 + (clobber (match_scratch:DI 4 ""))])]
8983 ""
8984 {
8985 if (!REG_P (operands[0]) && !REG_P (operands[1]))
8986 @@ -2407,10 +2408,11 @@
8987
8988 ;; Power7/cell has ldbrx/stdbrx, so use it directly
8989 (define_insn "*bswapdi2_ldbrx"
8990 - [(set (match_operand:DI 0 "reg_or_mem_operand" "=r,Z,&r")
8991 + [(set (match_operand:DI 0 "reg_or_mem_operand" "=&r,Z,??&r")
8992 (bswap:DI (match_operand:DI 1 "reg_or_mem_operand" "Z,r,r")))
8993 (clobber (match_scratch:DI 2 "=X,X,&r"))
8994 - (clobber (match_scratch:DI 3 "=X,X,&r"))]
8995 + (clobber (match_scratch:DI 3 "=X,X,&r"))
8996 + (clobber (match_scratch:DI 4 "=X,X,&r"))]
8997 "TARGET_POWERPC64 && TARGET_LDBRX
8998 && (REG_P (operands[0]) || REG_P (operands[1]))"
8999 "@
9000 @@ -2422,10 +2424,11 @@
9001
9002 ;; Non-power7/cell, fall back to use lwbrx/stwbrx
9003 (define_insn "*bswapdi2_64bit"
9004 - [(set (match_operand:DI 0 "reg_or_mem_operand" "=r,Z,&r")
9005 + [(set (match_operand:DI 0 "reg_or_mem_operand" "=&r,Z,&r")
9006 (bswap:DI (match_operand:DI 1 "reg_or_mem_operand" "Z,r,r")))
9007 (clobber (match_scratch:DI 2 "=&b,&b,&r"))
9008 - (clobber (match_scratch:DI 3 "=&r,&r,&r"))]
9009 + (clobber (match_scratch:DI 3 "=&r,&r,&r"))
9010 + (clobber (match_scratch:DI 4 "=&r,X,&r"))]
9011 "TARGET_POWERPC64 && !TARGET_LDBRX
9012 && (REG_P (operands[0]) || REG_P (operands[1]))
9013 && !(MEM_P (operands[0]) && MEM_VOLATILE_P (operands[0]))
9014 @@ -2437,7 +2440,8 @@
9015 [(set (match_operand:DI 0 "gpc_reg_operand" "")
9016 (bswap:DI (match_operand:DI 1 "indexed_or_indirect_operand" "")))
9017 (clobber (match_operand:DI 2 "gpc_reg_operand" ""))
9018 - (clobber (match_operand:DI 3 "gpc_reg_operand" ""))]
9019 + (clobber (match_operand:DI 3 "gpc_reg_operand" ""))
9020 + (clobber (match_operand:DI 4 "gpc_reg_operand" ""))]
9021 "TARGET_POWERPC64 && !TARGET_LDBRX && reload_completed"
9022 [(const_int 0)]
9023 "
9024 @@ -2446,14 +2450,15 @@
9025 rtx src = operands[1];
9026 rtx op2 = operands[2];
9027 rtx op3 = operands[3];
9028 + rtx op4 = operands[4];
9029 rtx op3_32 = simplify_gen_subreg (SImode, op3, DImode,
9030 BYTES_BIG_ENDIAN ? 4 : 0);
9031 - rtx dest_32 = simplify_gen_subreg (SImode, dest, DImode,
9032 - BYTES_BIG_ENDIAN ? 4 : 0);
9033 + rtx op4_32 = simplify_gen_subreg (SImode, op4, DImode,
9034 + BYTES_BIG_ENDIAN ? 4 : 0);
9035 rtx addr1;
9036 rtx addr2;
9037 - rtx word1;
9038 - rtx word2;
9039 + rtx word_high;
9040 + rtx word_low;
9041
9042 addr1 = XEXP (src, 0);
9043 if (GET_CODE (addr1) == PLUS)
9044 @@ -2478,30 +2483,29 @@
9045 addr2 = gen_rtx_PLUS (Pmode, op2, addr1);
9046 }
9047
9048 - word1 = change_address (src, SImode, addr1);
9049 - word2 = change_address (src, SImode, addr2);
9050 -
9051 if (BYTES_BIG_ENDIAN)
9052 {
9053 - emit_insn (gen_bswapsi2 (op3_32, word2));
9054 - emit_insn (gen_bswapsi2 (dest_32, word1));
9055 + word_high = change_address (src, SImode, addr1);
9056 + word_low = change_address (src, SImode, addr2);
9057 }
9058 else
9059 {
9060 - emit_insn (gen_bswapsi2 (op3_32, word1));
9061 - emit_insn (gen_bswapsi2 (dest_32, word2));
9062 + word_high = change_address (src, SImode, addr2);
9063 + word_low = change_address (src, SImode, addr1);
9064 }
9065
9066 - emit_insn (gen_ashldi3 (op3, op3, GEN_INT (32)));
9067 - emit_insn (gen_iordi3 (dest, dest, op3));
9068 - DONE;
9069 + emit_insn (gen_bswapsi2 (op3_32, word_low));
9070 + emit_insn (gen_bswapsi2 (op4_32, word_high));
9071 + emit_insn (gen_ashldi3 (dest, op3, GEN_INT (32)));
9072 + emit_insn (gen_iordi3 (dest, dest, op4));
9073 }")
9074
9075 (define_split
9076 [(set (match_operand:DI 0 "indexed_or_indirect_operand" "")
9077 (bswap:DI (match_operand:DI 1 "gpc_reg_operand" "")))
9078 (clobber (match_operand:DI 2 "gpc_reg_operand" ""))
9079 - (clobber (match_operand:DI 3 "gpc_reg_operand" ""))]
9080 + (clobber (match_operand:DI 3 "gpc_reg_operand" ""))
9081 + (clobber (match_operand:DI 4 "" ""))]
9082 "TARGET_POWERPC64 && !TARGET_LDBRX && reload_completed"
9083 [(const_int 0)]
9084 "
9085 @@ -2516,8 +2520,8 @@
9086 BYTES_BIG_ENDIAN ? 4 : 0);
9087 rtx addr1;
9088 rtx addr2;
9089 - rtx word1;
9090 - rtx word2;
9091 + rtx word_high;
9092 + rtx word_low;
9093
9094 addr1 = XEXP (dest, 0);
9095 if (GET_CODE (addr1) == PLUS)
9096 @@ -2542,29 +2546,27 @@
9097 addr2 = gen_rtx_PLUS (Pmode, op2, addr1);
9098 }
9099
9100 - word1 = change_address (dest, SImode, addr1);
9101 - word2 = change_address (dest, SImode, addr2);
9102 -
9103 emit_insn (gen_lshrdi3 (op3, src, GEN_INT (32)));
9104 -
9105 if (BYTES_BIG_ENDIAN)
9106 {
9107 - emit_insn (gen_bswapsi2 (word1, src_si));
9108 - emit_insn (gen_bswapsi2 (word2, op3_si));
9109 + word_high = change_address (dest, SImode, addr1);
9110 + word_low = change_address (dest, SImode, addr2);
9111 }
9112 else
9113 {
9114 - emit_insn (gen_bswapsi2 (word2, src_si));
9115 - emit_insn (gen_bswapsi2 (word1, op3_si));
9116 + word_high = change_address (dest, SImode, addr2);
9117 + word_low = change_address (dest, SImode, addr1);
9118 }
9119 - DONE;
9120 + emit_insn (gen_bswapsi2 (word_high, src_si));
9121 + emit_insn (gen_bswapsi2 (word_low, op3_si));
9122 }")
9123
9124 (define_split
9125 [(set (match_operand:DI 0 "gpc_reg_operand" "")
9126 (bswap:DI (match_operand:DI 1 "gpc_reg_operand" "")))
9127 (clobber (match_operand:DI 2 "gpc_reg_operand" ""))
9128 - (clobber (match_operand:DI 3 "gpc_reg_operand" ""))]
9129 + (clobber (match_operand:DI 3 "gpc_reg_operand" ""))
9130 + (clobber (match_operand:DI 4 "" ""))]
9131 "TARGET_POWERPC64 && reload_completed"
9132 [(const_int 0)]
9133 "
9134 @@ -2584,11 +2586,10 @@
9135 emit_insn (gen_bswapsi2 (op3_si, op2_si));
9136 emit_insn (gen_ashldi3 (dest, dest, GEN_INT (32)));
9137 emit_insn (gen_iordi3 (dest, dest, op3));
9138 - DONE;
9139 }")
9140
9141 (define_insn "bswapdi2_32bit"
9142 - [(set (match_operand:DI 0 "reg_or_mem_operand" "=r,Z,?&r")
9143 + [(set (match_operand:DI 0 "reg_or_mem_operand" "=&r,Z,&r")
9144 (bswap:DI (match_operand:DI 1 "reg_or_mem_operand" "Z,r,r")))
9145 (clobber (match_scratch:SI 2 "=&b,&b,X"))]
9146 "!TARGET_POWERPC64 && (REG_P (operands[0]) || REG_P (operands[1]))"
9147 @@ -2617,8 +2618,7 @@
9148 if (GET_CODE (addr1) == PLUS)
9149 {
9150 emit_insn (gen_add3_insn (op2, XEXP (addr1, 0), GEN_INT (4)));
9151 - if (TARGET_AVOID_XFORM
9152 - || REGNO (XEXP (addr1, 1)) == REGNO (dest2))
9153 + if (TARGET_AVOID_XFORM)
9154 {
9155 emit_insn (gen_add3_insn (op2, XEXP (addr1, 1), op2));
9156 addr2 = op2;
9157 @@ -2626,8 +2626,7 @@
9158 else
9159 addr2 = gen_rtx_PLUS (SImode, op2, XEXP (addr1, 1));
9160 }
9161 - else if (TARGET_AVOID_XFORM
9162 - || REGNO (addr1) == REGNO (dest2))
9163 + else if (TARGET_AVOID_XFORM)
9164 {
9165 emit_insn (gen_add3_insn (op2, addr1, GEN_INT (4)));
9166 addr2 = op2;
9167 @@ -2642,10 +2641,7 @@
9168 word2 = change_address (src, SImode, addr2);
9169
9170 emit_insn (gen_bswapsi2 (dest2, word1));
9171 - /* The REGNO (dest2) tests above ensure that addr2 has not been trashed,
9172 - thus allowing us to omit an early clobber on the output. */
9173 emit_insn (gen_bswapsi2 (dest1, word2));
9174 - DONE;
9175 }")
9176
9177 (define_split
9178 @@ -2694,7 +2690,6 @@
9179
9180 emit_insn (gen_bswapsi2 (word2, src1));
9181 emit_insn (gen_bswapsi2 (word1, src2));
9182 - DONE;
9183 }")
9184
9185 (define_split
9186 @@ -2714,7 +2709,6 @@
9187
9188 emit_insn (gen_bswapsi2 (dest1, src2));
9189 emit_insn (gen_bswapsi2 (dest2, src1));
9190 - DONE;
9191 }")
9192
9193 (define_insn "mulsi3"
9194 diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
9195 index 3fb10e6..4c1a02a 100644
9196 --- a/gcc/config/rs6000/rs6000.opt
9197 +++ b/gcc/config/rs6000/rs6000.opt
9198 @@ -1,6 +1,6 @@
9199 ; Options for the rs6000 port of the compiler
9200 ;
9201 -; Copyright (C) 2005-2015 Free Software Foundation, Inc.
9202 +; Copyright (C) 2005-2014 Free Software Foundation, Inc.
9203 ; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
9204 ;
9205 ; This file is part of GCC.
9206 @@ -193,46 +193,42 @@ Target Report Mask(VSX) Var(rs6000_isa_flags)
9207 Use vector/scalar (VSX) instructions
9208
9209 mvsx-scalar-float
9210 -Target Undocumented Report Var(TARGET_VSX_SCALAR_FLOAT) Init(1) Save
9211 +Target Undocumented Report Var(TARGET_VSX_SCALAR_FLOAT) Init(1)
9212 ; If -mpower8-vector, use VSX arithmetic instructions for SFmode (on by default)
9213
9214 mvsx-scalar-double
9215 -Target Undocumented Report Var(TARGET_VSX_SCALAR_DOUBLE) Init(1) Save
9216 +Target Undocumented Report Var(TARGET_VSX_SCALAR_DOUBLE) Init(1)
9217 ; If -mvsx, use VSX arithmetic instructions for DFmode (on by default)
9218
9219 mvsx-scalar-memory
9220 Target Undocumented Report Alias(mupper-regs-df)
9221
9222 mvsx-align-128
9223 -Target Undocumented Report Var(TARGET_VSX_ALIGN_128) Save
9224 +Target Undocumented Report Var(TARGET_VSX_ALIGN_128)
9225 ; If -mvsx, set alignment to 128 bits instead of 32/64
9226
9227 mallow-movmisalign
9228 -Target Undocumented Var(TARGET_ALLOW_MOVMISALIGN) Init(-1) Save
9229 +Target Undocumented Var(TARGET_ALLOW_MOVMISALIGN) Init(-1)
9230 ; Allow/disallow the movmisalign in DF/DI vectors
9231
9232 -mefficient-unaligned-vector
9233 -Target Undocumented Report Var(TARGET_EFFICIENT_UNALIGNED_VSX) Init(-1) Save
9234 -; Consider unaligned VSX accesses to be efficient/inefficient
9235 -
9236 mallow-df-permute
9237 -Target Undocumented Var(TARGET_ALLOW_DF_PERMUTE) Save
9238 +Target Undocumented Var(TARGET_ALLOW_DF_PERMUTE)
9239 ; Allow/disallow permutation of DF/DI vectors
9240
9241 msched-groups
9242 -Target Undocumented Report Var(TARGET_SCHED_GROUPS) Init(-1) Save
9243 +Target Undocumented Report Var(TARGET_SCHED_GROUPS) Init(-1)
9244 ; Explicitly set/unset whether rs6000_sched_groups is set
9245
9246 malways-hint
9247 -Target Undocumented Report Var(TARGET_ALWAYS_HINT) Init(-1) Save
9248 +Target Undocumented Report Var(TARGET_ALWAYS_HINT) Init(-1)
9249 ; Explicitly set/unset whether rs6000_always_hint is set
9250
9251 malign-branch-targets
9252 -Target Undocumented Report Var(TARGET_ALIGN_BRANCH_TARGETS) Init(-1) Save
9253 +Target Undocumented Report Var(TARGET_ALIGN_BRANCH_TARGETS) Init(-1)
9254 ; Explicitly set/unset whether rs6000_align_branch_targets is set
9255
9256 mvectorize-builtins
9257 -Target Undocumented Report Var(TARGET_VECTORIZE_BUILTINS) Init(-1) Save
9258 +Target Undocumented Report Var(TARGET_VECTORIZE_BUILTINS) Init(-1)
9259 ; Explicitly control whether we vectorize the builtins or not.
9260
9261 mno-update
9262 @@ -542,7 +538,7 @@ Target Report Var(TARGET_POINTERS_TO_NESTED_FUNCTIONS) Init(1) Save
9263 Use/do not use r11 to hold the static link in calls to functions via pointers.
9264
9265 msave-toc-indirect
9266 -Target Report Mask(SAVE_TOC_INDIRECT) Var(rs6000_isa_flags)
9267 +Target Report Var(TARGET_SAVE_TOC_INDIRECT) Save
9268 Control whether we save the TOC in the prologue for indirect calls or generate the save inline
9269
9270 mvsx-timode
9271 @@ -563,7 +559,7 @@ Use/do not use vector and scalar instructions added in ISA 2.07.
9272
9273 mcrypto
9274 Target Report Mask(CRYPTO) Var(rs6000_isa_flags)
9275 -Use ISA 2.07 Category:Vector.AES and Category:Vector.SHA2 instructions
9276 +Use ISA 2.07 crypto instructions
9277
9278 mdirect-move
9279 Target Report Mask(DIRECT_MOVE) Var(rs6000_isa_flags)
9280 @@ -592,7 +588,3 @@ Allow double variables in upper registers with -mcpu=power7 or -mvsx
9281 mupper-regs-sf
9282 Target Undocumented Mask(UPPER_REGS_SF) Var(rs6000_isa_flags)
9283 Allow float variables in upper registers with -mcpu=power8 or -mp8-vector
9284 -
9285 -moptimize-swaps
9286 -Target Undocumented Var(rs6000_optimize_swaps) Init(1) Save
9287 -Analyze and remove doubleword swaps from VSX computations.
9288 diff --git a/gcc/config/rs6000/t-fprules b/gcc/config/rs6000/t-fprules
9289 index cde4364..5361ff3 100644
9290 --- a/gcc/config/rs6000/t-fprules
9291 +++ b/gcc/config/rs6000/t-fprules
9292 @@ -18,3 +18,9 @@
9293
9294 SOFT_FLOAT_CPUS = e300c2 401 403 405 440 464 476 ec603e 801 821 823 860
9295 MULTILIB_MATCHES_FLOAT = $(foreach cpu, $(SOFT_FLOAT_CPUS), msoft-float=mcpu?$(cpu))
9296 +
9297 +# Build the libraries for both hard and soft floating point by default
9298 +
9299 +MULTILIB_OPTIONS = msoft-float
9300 +MULTILIB_DIRNAMES = soft-float
9301 +MULTILIB_MATCHES = ${MULTILIB_MATCHES_FLOAT}
9302 diff --git a/gcc/config/rs6000/t-linux b/gcc/config/rs6000/t-linux
9303 index 4cb63bd..0b92eba 100644
9304 --- a/gcc/config/rs6000/t-linux
9305 +++ b/gcc/config/rs6000/t-linux
9306 @@ -1,20 +1,10 @@
9307 # do not define the multiarch name if configured for a soft-float cpu
9308 # or soft-float.
9309 ifeq (,$(filter $(with_cpu),$(SOFT_FLOAT_CPUS))$(findstring soft,$(with_float)))
9310 -ifneq (,$(findstring powerpc64,$(target)))
9311 -MULTILIB_OSDIRNAMES := .=../lib64$(call if_multiarch,:powerpc64-linux-gnu)
9312 -else
9313 ifneq (,$(findstring spe,$(target)))
9314 -MULTIARCH_DIRNAME := powerpc-linux-gnuspe$(if $(findstring 8548,$(with_cpu)),,v1)
9315 +MULTIARCH_DIRNAME = powerpc-linux-gnuspe$(if $(findstring 8548,$(with_cpu)),,v1)
9316 else
9317 -MULTIARCH_DIRNAME := powerpc-linux-gnu
9318 -endif
9319 -endif
9320 -ifneq (,$(findstring powerpcle,$(target)))
9321 -MULTIARCH_DIRNAME := $(subst -linux,le-linux,$(MULTIARCH_DIRNAME))
9322 -endif
9323 -ifneq (,$(findstring powerpc64le,$(target)))
9324 -MULTILIB_OSDIRNAMES := $(subst -linux,le-linux,$(MULTILIB_OSDIRNAMES))
9325 +MULTIARCH_DIRNAME = powerpc-linux-gnu
9326 endif
9327 endif
9328
9329 diff --git a/gcc/config/s390/2827.md b/gcc/config/s390/2827.md
9330 index 9542cf2..913b229 100644
9331 --- a/gcc/config/s390/2827.md
9332 +++ b/gcc/config/s390/2827.md
9333 @@ -35,13 +35,9 @@
9334 (cond [(eq_attr "mnemonic" "lnxbr,madb,ltxtr,clc,axtr,msebr,slbgr,xc,alcr,lpxbr,slbr,maebr,mlg,mfy,lxdtr,maeb,lxeb,nc,mxtr,sxtr,dxbr,alc,msdbr,ltxbr,lxdb,madbr,lxdbr,lxebr,mvc,m,mseb,mlr,mlgr,slb,tcxb,msdb,sqxbr,alcgr,oc,flogr,alcg,mxbr,dxtr,axbr,mr,sxbr,slbg,ml,lcxbr,bcr_flush") (const_int 1)]
9335 (const_int 0)))
9336
9337 -(define_insn_reservation "zEC12_simple_int" 0
9338 +(define_insn_reservation "zEC12_simple" 1
9339 (and (eq_attr "cpu" "zEC12")
9340 - (eq_attr "mnemonic" "ltg,ogrk,lr,lghrl,x,asi,lhr,ar,lhrl,llgfr,clghrl,cgr,cli,agrk,ic,lrv,clg,cy,cghi,sy,clgfr,al,tm,lang,lghr,laa,ark,lh,or,icy,xi,n,llihl,afi,cs,nrk,sth,lgr,l,lcr,stey,xg,crt,slgfr,ny,ld,j,llihh,slgr,clfhsi,slg,lb,lgrl,lrl,llihf,llcr,laxg,mvghi,rllg,xrk,laag,alhsik,algfi,algr,aly,agfi,lrvr,d,crl,llgc,tmhl,algsi,lgh,icmh,clhrl,xgrk,icm,iilf,ork,cg,ldgr,lgf,iihf,llghr,sg,stam,tmhh,slgf,basr,lgb,cgfi,lax,clfit,lrvgr,nihl,ni,srdl,srk,xihf,stgrl,sthrl,algf,cgit,ng,lat,llghrl,ltgr,nihh,clgfrl,srlk,agr,ler,bcr_flush,stcy,cds,clfi,nihf,ly,clt,lgat,alg,lhy,lgfrl,clghsi,clrt,tmll,srlg,ay,sty,clr,lgfi,lan,clgt,ahik,sra,algrk,clgr,tmy,tmlh,alghsik,lcgr,mvi,ltgf,xr,larl,ldr,llgcr,clgrt,clrl,cghsi,cliy,oy,ogr,llgt,slr,chi,s,icmy,llc,ngr,clhhsi,ltgfr,llill,lhi,o,sll,clgrl,clgf,mviy,algfr,rll,sldl,lg,niy,st,sgr,ag,le,xgr,cr,stg,llilh,sr,cdsg,sllk,stoc,csg,clgit,chhsi,strl,llilf,lndfr,ngrk,clgfi,llgh,oill,la,llhrl,stc,lghi,oihl,xiy,sllg,llgf,cgrt,cl,sl,oi,oilh,nr,srak,oihh,ear,slgrk,og,c,slgfi,sthy,oilf,oiy,oihf,a,cfi,srag,brasl,alr,cgrl,llgfrl,cit,ley,exrl,lcdfr,lay,xilf,alsi,mvhhi,srl,chsi,lgfr,lrvg,cly,sgrk,ahi,nill,jg,slrk,lxr,sar,slfi,cpsdr,lcgfr,aghik,nilh,mvhi,lpdfr,xy,alrk,lao,agsi,ldy,nilf,llhr,alfi,laog,sly,aghi,bras,srda,lt,lbr,lzxr,lzdr,lzer")) "nothing")
9341 -
9342 -(define_insn_reservation "zEC12_simple_fp" 1
9343 - (and (eq_attr "cpu" "zEC12")
9344 - (eq_attr "mnemonic" "lnebr,sdbr,sebr,clfxtr,adbr,aebr,celfbr,clfebr,lpebr,msebr,lndbr,clfdbr,llgtr,cebr,lgbr,maebr,ltebr,clfdtr,ltr,cdlgbr,cxlftr,lpdbr,cdfbr,lcebr,clfxbr,msdbr,cdbr,madbr,meebr,clgxbr,clgdtr,ledbr,cegbr,cdlftr,cdlgtr,mdbr,clgebr,ltdbr,cdlfbr,cdgbr,clgxtr,lcdbr,celgbr,clgdbr,ldebr,cefbr,fidtr,fixtr,madb,msdb,mseb,fiebra,fidbra,fixbra,aeb,mdb,seb,cdb,tcdb,sdb,adb,tceb,maeb,ceb,meeb,ldeb")) "nothing")
9345 + (eq_attr "mnemonic" "ltg,ogrk,lr,lnebr,lghrl,sdbr,x,asi,lhr,sebr,madb,ar,lhrl,clfxtr,llgfr,clghrl,cgr,cli,agrk,ic,adbr,aebr,lrv,clg,cy,cghi,sy,celfbr,seb,clgfr,al,tm,lang,clfebr,lghr,cdb,lpebr,laa,ark,lh,or,icy,xi,msebr,n,llihl,afi,cs,nrk,sth,lgr,l,lcr,stey,xg,crt,slgfr,ny,ld,j,llihh,slgr,clfhsi,slg,lb,lgrl,lrl,llihf,lndbr,llcr,laxg,mvghi,rllg,sdb,xrk,laag,alhsik,algfi,algr,aly,agfi,lrvr,d,crl,llgc,tmhl,algsi,lgh,icmh,clhrl,xgrk,icm,iilf,ork,lbr,cg,ldgr,lgf,iihf,llghr,sg,clfdbr,llgtr,stam,cebr,tmhh,tceb,slgf,basr,lgbr,maebr,lgb,cgfi,aeb,ltebr,lax,clfit,lrvgr,nihl,ni,clfdtr,srdl,mdb,srk,xihf,stgrl,sthrl,algf,ltr,cdlgbr,cgit,ng,lat,llghrl,ltgr,nihh,clgfrl,srlk,maeb,agr,cxlftr,ler,bcr_flush,stcy,cds,clfi,nihf,ly,clt,lgat,alg,lhy,lgfrl,clghsi,clrt,tmll,srlg,tcdb,ay,sty,clr,lgfi,lan,lpdbr,clgt,adb,ahik,sra,algrk,cdfbr,lcebr,clfxbr,msdbr,ceb,clgr,tmy,tmlh,alghsik,lcgr,mvi,cdbr,ltgf,xr,larl,ldr,llgcr,clgrt,clrl,cghsi,cliy,madbr,oy,ogr,llgt,meebr,slr,clgxbr,chi,s,icmy,llc,ngr,clhhsi,ltgfr,llill,lhi,o,meeb,clgdtr,sll,clgrl,clgf,ledbr,cegbr,mviy,algfr,rll,cdlftr,sldl,cdlgtr,lg,niy,st,sgr,ag,le,xgr,cr,stg,llilh,sr,lzer,cdsg,sllk,mdbr,stoc,csg,clgit,chhsi,strl,llilf,lndfr,ngrk,clgebr,clgfi,llgh,mseb,ltdbr,oill,la,llhrl,stc,lghi,oihl,xiy,sllg,llgf,cgrt,ldeb,cl,sl,cdlfbr,oi,oilh,nr,srak,oihh,ear,slgrk,og,c,slgfi,sthy,oilf,oiy,msdb,oihf,a,cfi,lzxr,lzdr,srag,cdgbr,brasl,alr,cgrl,llgfrl,cit,clgxtr,ley,exrl,lcdfr,lay,xilf,lcdbr,alsi,mvhhi,srl,chsi,lgfr,lrvg,cly,sgrk,ahi,celgbr,nill,clgdbr,jg,slrk,lxr,sar,slfi,cpsdr,lcgfr,aghik,nilh,mvhi,lpdfr,xy,alrk,lao,agsi,ldy,nilf,llhr,alfi,laog,sly,aghi,ldebr,bras,srda,cefbr,lt,fiebra,fidbra,fixbra,fidtr,fixtr")) "nothing")
9346
9347 (define_insn_reservation "zEC12_cgdbr" 2
9348 (and (eq_attr "cpu" "zEC12")
9349 diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
9350 index 120f31c..0c12092 100644
9351 --- a/gcc/config/s390/s390.c
9352 +++ b/gcc/config/s390/s390.c
9353 @@ -5253,35 +5253,51 @@ get_some_local_dynamic_name (void)
9354 gcc_unreachable ();
9355 }
9356
9357 -/* Assigns the number of NOP halfwords to be emitted before and after the
9358 - function label to *HW_BEFORE and *HW_AFTER. Both pointers must not be NULL.
9359 - If hotpatching is disabled for the function, the values are set to zero.
9360 -*/
9361 +/* Returns false if the function should not be made hotpatchable.
9362 + Otherwise it assigns the number of NOP halfwords to be emitted
9363 + before and after the function label to hw_before and hw_after.
9364 + Both must not be NULL. */
9365
9366 -static void
9367 +static bool
9368 s390_function_num_hotpatch_hw (tree decl,
9369 int *hw_before,
9370 int *hw_after)
9371 {
9372 tree attr;
9373
9374 + *hw_before = 0;
9375 + *hw_after = 0;
9376 +
9377 attr = lookup_attribute ("hotpatch", DECL_ATTRIBUTES (decl));
9378
9379 + /* Handle the arguments of the hotpatch attribute. The values
9380 + specified via attribute might override the cmdline argument
9381 + values. */
9382 if (attr)
9383 {
9384 tree args = TREE_VALUE (attr);
9385
9386 - /* If the hotpatch attribute is present, its values are used even if the
9387 - -mhotpatch cmdline option is used. */
9388 *hw_before = TREE_INT_CST_LOW (TREE_VALUE (args));
9389 *hw_after = TREE_INT_CST_LOW (TREE_VALUE (TREE_CHAIN (args)));
9390 }
9391 else
9392 {
9393 - /* Values specified by the -mhotpatch cmdline option. */
9394 + /* Use the values specified by the cmdline arguments. */
9395 *hw_before = s390_hotpatch_hw_before_label;
9396 *hw_after = s390_hotpatch_hw_after_label;
9397 }
9398 +
9399 + if (*hw_before == 0 && *hw_after == 0)
9400 + return false;
9401 +
9402 + if (decl_function_context (decl) != NULL_TREE)
9403 + {
9404 + warning_at (DECL_SOURCE_LOCATION (decl), OPT_mhotpatch_,
9405 + "hotpatching is not compatible with nested functions");
9406 + return false;
9407 + }
9408 +
9409 + return true;
9410 }
9411
9412 /* Write the extra assembler code needed to declare a function properly. */
9413 @@ -5291,45 +5307,54 @@ s390_asm_output_function_label (FILE *asm_out_file, const char *fname,
9414 tree decl)
9415 {
9416 int hw_before, hw_after;
9417 + bool hotpatch_p = (decl
9418 + ? s390_function_num_hotpatch_hw (decl,
9419 + &hw_before, &hw_after)
9420 + : false);
9421
9422 - s390_function_num_hotpatch_hw (decl, &hw_before, &hw_after);
9423 - if (hw_before > 0)
9424 + if (hotpatch_p)
9425 {
9426 - unsigned int function_alignment;
9427 int i;
9428
9429 - /* Add trampoline code area before the function label and initialize it
9430 - with two-byte NOP instructions. This area can be overwritten with code
9431 + /* Add a trampoline code area before the function label and initialize it
9432 + with two-byte nop instructions. This area can be overwritten with code
9433 that jumps to a patched version of the function. */
9434 - asm_fprintf (asm_out_file, "\tnopr\t%%r7"
9435 - "\t# pre-label NOPs for hotpatch (%d halfwords)\n",
9436 - hw_before);
9437 - for (i = 1; i < hw_before; i++)
9438 - fputs ("\tnopr\t%r7\n", asm_out_file);
9439 -
9440 + for (i = 0; i < hw_before; i++)
9441 + asm_fprintf (asm_out_file, "\tnopr\t%%r7\n");
9442 /* Note: The function label must be aligned so that (a) the bytes of the
9443 - following NOP do not cross a cacheline boundary, and (b) a jump address
9444 + following nop do not cross a cacheline boundary, and (b) a jump address
9445 (eight bytes for 64 bit targets, 4 bytes for 32 bit targets) can be
9446 stored directly before the label without crossing a cacheline
9447 boundary. All this is necessary to make sure the trampoline code can
9448 - be changed atomically.
9449 - This alignment is done automatically using the FOUNCTION_BOUNDARY
9450 - macro, but if there are NOPs before the function label, the alignment
9451 - is placed before them. So it is necessary to duplicate the alignment
9452 - after the NOPs. */
9453 - function_alignment = MAX (8, DECL_ALIGN (decl) / BITS_PER_UNIT);
9454 - if (! DECL_USER_ALIGN (decl))
9455 - function_alignment = MAX (function_alignment,
9456 - (unsigned int) align_functions);
9457 - fputs ("\t# alignment for hotpatch\n", asm_out_file);
9458 - ASM_OUTPUT_ALIGN (asm_out_file, floor_log2 (function_alignment));
9459 + be changed atomically. */
9460 }
9461
9462 ASM_OUTPUT_LABEL (asm_out_file, fname);
9463 - if (hw_after > 0)
9464 - asm_fprintf (asm_out_file,
9465 - "\t# post-label NOPs for hotpatch (%d halfwords)\n",
9466 - hw_after);
9467 +
9468 + /* Output a series of NOPs after the function label. */
9469 + if (hotpatch_p)
9470 + {
9471 + while (hw_after > 0)
9472 + {
9473 + if (hw_after >= 3 && TARGET_CPU_ZARCH)
9474 + {
9475 + asm_fprintf (asm_out_file, "\tbrcl\t\t0,0\n");
9476 + hw_after -= 3;
9477 + }
9478 + else if (hw_after >= 2)
9479 + {
9480 + gcc_assert (hw_after == 2 || !TARGET_CPU_ZARCH);
9481 + asm_fprintf (asm_out_file, "\tnop\t0\n");
9482 + hw_after -= 2;
9483 + }
9484 + else
9485 + {
9486 + gcc_assert (hw_after == 1);
9487 + asm_fprintf (asm_out_file, "\tnopr\t%%r7\n");
9488 + hw_after -= 1;
9489 + }
9490 + }
9491 + }
9492 }
9493
9494 /* Output machine-dependent UNSPECs occurring in address constant X
9495 @@ -5903,12 +5928,8 @@ s390_issue_rate (void)
9496 case PROCESSOR_2817_Z196:
9497 return 3;
9498 case PROCESSOR_2097_Z10:
9499 - return 2;
9500 - /* Starting with EC12 we use the sched_reorder hook to take care
9501 - of instruction dispatch constraints. The algorithm only
9502 - picks the best instruction and assumes only a single
9503 - instruction gets issued per cycle. */
9504 case PROCESSOR_2827_ZEC12:
9505 + return 2;
9506 default:
9507 return 1;
9508 }
9509 @@ -11311,7 +11332,6 @@ static void
9510 s390_reorg (void)
9511 {
9512 bool pool_overflow = false;
9513 - int hw_before, hw_after;
9514
9515 /* Make sure all splits have been performed; splits after
9516 machine_dependent_reorg might confuse insn length counts. */
9517 @@ -11446,40 +11466,6 @@ s390_reorg (void)
9518 if (insn_added_p)
9519 shorten_branches (get_insns ());
9520 }
9521 -
9522 - s390_function_num_hotpatch_hw (current_function_decl, &hw_before, &hw_after);
9523 - if (hw_after > 0)
9524 - {
9525 - rtx insn;
9526 -
9527 - /* Insert NOPs for hotpatching. */
9528 - for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
9529 - {
9530 - if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG)
9531 - break;
9532 - }
9533 - gcc_assert (insn);
9534 - /* Output a series of NOPs after the NOTE_INSN_FUNCTION_BEG. */
9535 - while (hw_after > 0)
9536 - {
9537 - if (hw_after >= 3 && TARGET_CPU_ZARCH)
9538 - {
9539 - insn = emit_insn_after (gen_nop_6_byte (), insn);
9540 - hw_after -= 3;
9541 - }
9542 - else if (hw_after >= 2)
9543 - {
9544 - insn = emit_insn_after (gen_nop_4_byte (), insn);
9545 - hw_after -= 2;
9546 - }
9547 - else
9548 - {
9549 - insn = emit_insn_after (gen_nop_2_byte (), insn);
9550 - hw_after -= 1;
9551 - }
9552 - }
9553 - gcc_assert (hw_after == 0);
9554 - }
9555 }
9556
9557 /* Return true if INSN is a fp load insn writing register REGNO. */
9558 diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
9559 index 986b0c6..10d7a5a 100644
9560 --- a/gcc/config/s390/s390.md
9561 +++ b/gcc/config/s390/s390.md
9562 @@ -153,11 +153,6 @@
9563 UNSPECV_CAS
9564 UNSPECV_ATOMIC_OP
9565
9566 - ; Hotpatching (unremovable NOPs)
9567 - UNSPECV_NOP_2_BYTE
9568 - UNSPECV_NOP_4_BYTE
9569 - UNSPECV_NOP_6_BYTE
9570 -
9571 ; Transactional Execution support
9572 UNSPECV_TBEGIN
9573 UNSPECV_TBEGIN_TDB
9574 @@ -9639,26 +9634,6 @@
9575 "lr\t1,1"
9576 [(set_attr "op_type" "RR")])
9577
9578 -;;- Undeletable nops (used for hotpatching)
9579 -
9580 -(define_insn "nop_2_byte"
9581 - [(unspec_volatile [(const_int 0)] UNSPECV_NOP_2_BYTE)]
9582 - ""
9583 - "nopr\t%%r7"
9584 - [(set_attr "op_type" "RR")])
9585 -
9586 -(define_insn "nop_4_byte"
9587 - [(unspec_volatile [(const_int 0)] UNSPECV_NOP_4_BYTE)]
9588 - ""
9589 - "nop\t0"
9590 - [(set_attr "op_type" "RX")])
9591 -
9592 -(define_insn "nop_6_byte"
9593 - [(unspec_volatile [(const_int 0)] UNSPECV_NOP_6_BYTE)]
9594 - "TARGET_CPU_ZARCH"
9595 - "brcl\t0, 0"
9596 - [(set_attr "op_type" "RIL")])
9597 -
9598
9599 ;
9600 ; Special literal pool access instruction pattern(s).
9601 diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
9602 index a0688e6..40e7d45 100644
9603 --- a/gcc/config/sh/sh.md
9604 +++ b/gcc/config/sh/sh.md
9605 @@ -651,6 +651,32 @@
9606 "tst #255,%0"
9607 [(set_attr "type" "mt_group")])
9608
9609 +;; This pattern might be risky because it also tests the upper bits and not
9610 +;; only the subreg. However, it seems that combine will get to this only
9611 +;; when testing sign/zero extended values. In this case the extended upper
9612 +;; bits do not matter.
9613 +(define_insn "*tst<mode>_t_zero"
9614 + [(set (reg:SI T_REG)
9615 + (eq:SI
9616 + (subreg:QIHI
9617 + (and:SI (match_operand:SI 0 "arith_reg_operand" "%r")
9618 + (match_operand:SI 1 "arith_reg_operand" "r")) <lowpart_le>)
9619 + (const_int 0)))]
9620 + "TARGET_SH1 && TARGET_LITTLE_ENDIAN"
9621 + "tst %0,%1"
9622 + [(set_attr "type" "mt_group")])
9623 +
9624 +(define_insn "*tst<mode>_t_zero"
9625 + [(set (reg:SI T_REG)
9626 + (eq:SI
9627 + (subreg:QIHI
9628 + (and:SI (match_operand:SI 0 "arith_reg_operand" "%r")
9629 + (match_operand:SI 1 "arith_reg_operand" "r")) <lowpart_be>)
9630 + (const_int 0)))]
9631 + "TARGET_SH1 && TARGET_BIG_ENDIAN"
9632 + "tst %0,%1"
9633 + [(set_attr "type" "mt_group")])
9634 +
9635 ;; Extract LSB, negate and store in T bit.
9636 (define_insn "tstsi_t_and_not"
9637 [(set (reg:SI T_REG)
9638 @@ -10138,25 +10164,10 @@ label:
9639 ""
9640 {
9641 rtx mem;
9642 - bool stack_chk_guard_p = false;
9643
9644 operands[2] = !can_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
9645 operands[3] = !can_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
9646
9647 - if (!TARGET_SHMEDIA
9648 - && flag_stack_protect
9649 - && GET_CODE (operands[1]) == CONST
9650 - && GET_CODE (XEXP (operands[1], 0)) == UNSPEC
9651 - && GET_CODE (XVECEXP (XEXP (operands[1], 0), 0, 0)) == SYMBOL_REF
9652 - && strcmp (XSTR (XVECEXP (XEXP (operands[1], 0), 0, 0), 0),
9653 - "__stack_chk_guard") == 0)
9654 - stack_chk_guard_p = true;
9655 -
9656 - /* Use R0 to avoid long R0 liveness which stack-protector tends to
9657 - produce. */
9658 - if (stack_chk_guard_p && ! reload_in_progress && ! reload_completed)
9659 - operands[2] = gen_rtx_REG (Pmode, R0_REG);
9660 -
9661 if (TARGET_SHMEDIA)
9662 {
9663 rtx reg = operands[2];
9664 @@ -10184,7 +10195,13 @@ label:
9665 insn to avoid combining (set A (plus rX r12)) and (set op0 (mem A))
9666 when rX is a GOT address for the guard symbol. Ugly but doesn't
9667 matter because this is a rare situation. */
9668 - if (stack_chk_guard_p)
9669 + if (!TARGET_SHMEDIA
9670 + && flag_stack_protect
9671 + && GET_CODE (operands[1]) == CONST
9672 + && GET_CODE (XEXP (operands[1], 0)) == UNSPEC
9673 + && GET_CODE (XVECEXP (XEXP (operands[1], 0), 0, 0)) == SYMBOL_REF
9674 + && strcmp (XSTR (XVECEXP (XEXP (operands[1], 0), 0, 0), 0),
9675 + "__stack_chk_guard") == 0)
9676 emit_insn (gen_chk_guard_add (operands[3], operands[2]));
9677 else
9678 emit_move_insn (operands[3], gen_rtx_PLUS (Pmode, operands[2],
9679 diff --git a/gcc/config/sh/t-sh b/gcc/config/sh/t-sh
9680 index 7f44631..d9f2b3d 100644
9681 --- a/gcc/config/sh/t-sh
9682 +++ b/gcc/config/sh/t-sh
9683 @@ -63,12 +63,8 @@ MULTILIB_MATCHES = $(shell \
9684 done \
9685 done)
9686
9687 -# SH1 and SH2A support big endian only.
9688 -ifeq ($(DEFAULT_ENDIAN),ml)
9689 -MULTILIB_EXCEPTIONS = m1 ml/m1 m2a* ml/m2a* $(TM_MULTILIB_EXCEPTIONS_CONFIG)
9690 -else
9691 +# SH1 only supports big endian.
9692 MULTILIB_EXCEPTIONS = ml/m1 ml/m2a* $(TM_MULTILIB_EXCEPTIONS_CONFIG)
9693 -endif
9694
9695 MULTILIB_OSDIRNAMES = \
9696 $(OTHER_ENDIAN)=!$(OTHER_ENDIAN) \
57539697 diff --git a/gcc/configure b/gcc/configure
5754 index f48dd18..58007c5 100755
9698 index ab5b2ec..65f96c6 100755
57559699 --- a/gcc/configure
57569700 +++ b/gcc/configure
57579701 @@ -761,6 +761,7 @@ LN
57629706 REPORT_BUGS_TEXI
57639707 REPORT_BUGS_TO
57649708 PKGVERSION
5765 @@ -1688,7 +1689,7 @@ Optional Packages:
5766 --with-specs=SPECS add SPECS to driver command-line processing
5767 --with-pkgversion=PKG Use PKG in the version string in place of "GCC"
5768 --with-bugurl=URL Direct users to URL to report a bug
5769 - --with-multilib-list select multilibs (AArch64, SH and x86-64 only)
5770 + --with-multilib-list select multilibs (ARM, SH and x86-64 only)
5771 --with-gnu-ld assume the C compiler uses GNU ld default=no
5772 --with-libiconv-prefix[=DIR] search for libiconv in DIR/include and DIR/lib
5773 --without-libiconv-prefix don't search for libiconv in includedir and libdir
5774 @@ -7301,6 +7302,7 @@ else
9709 @@ -920,7 +921,6 @@ enable_gnu_indirect_function
9710 enable_initfini_array
9711 enable_comdat
9712 enable_fix_cortex_a53_835769
9713 -enable_fix_cortex_a53_843419
9714 with_glibc_version
9715 enable_gnu_unique_object
9716 enable_linker_build_id
9717 @@ -1645,14 +1645,6 @@ Optional Features:
9718 disable workaround for AArch64 Cortex-A53 erratum
9719 835769 by default
9720
9721 -
9722 - --enable-fix-cortex-a53-843419
9723 - enable workaround for AArch64 Cortex-A53 erratum
9724 - 843419 by default
9725 - --disable-fix-cortex-a53-843419
9726 - disable workaround for AArch64 Cortex-A53 erratum
9727 - 843419 by default
9728 -
9729 --enable-gnu-unique-object
9730 enable the use of the @gnu_unique_object ELF
9731 extension on glibc systems
9732 @@ -7310,6 +7302,7 @@ else
57759733 fi
57769734
57779735
57799737 # -------------------------
57809738 # Checks for other programs
57819739 # -------------------------
9740 @@ -17945,7 +17938,7 @@ else
9741 lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
9742 lt_status=$lt_dlunknown
9743 cat > conftest.$ac_ext <<_LT_EOF
9744 -#line 17948 "configure"
9745 +#line 17941 "configure"
9746 #include "confdefs.h"
9747
9748 #if HAVE_DLFCN_H
9749 @@ -18051,7 +18044,7 @@ else
9750 lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
9751 lt_status=$lt_dlunknown
9752 cat > conftest.$ac_ext <<_LT_EOF
9753 -#line 18054 "configure"
9754 +#line 18047 "configure"
9755 #include "confdefs.h"
9756
9757 #if HAVE_DLFCN_H
9758 @@ -24041,25 +24034,6 @@ if test "${enable_fix_cortex_a53_835769+set}" = set; then :
9759
9760 fi
9761
9762 - # Enable default workaround for AArch64 Cortex-A53 erratum 843419.
9763 - # Check whether --enable-fix-cortex-a53-843419 was given.
9764 -if test "${enable_fix_cortex_a53_843419+set}" = set; then :
9765 - enableval=$enable_fix_cortex_a53_843419;
9766 - case $enableval in
9767 - yes)
9768 - tm_defines="${tm_defines} TARGET_FIX_ERR_A53_843419_DEFAULT=1"
9769 - ;;
9770 - no)
9771 - ;;
9772 - *)
9773 - as_fn_error "'$enableval' is an invalid value for --enable-fix-cortex-a53-843419.\
9774 - Valid choices are 'yes' and 'no'." "$LINENO" 5
9775 - ;;
9776 -
9777 - esac
9778 -
9779 -fi
9780 -
9781 ;;
9782
9783 # All TARGET_ABI_OSF targets.
9784 @@ -24186,39 +24160,6 @@ $as_echo "#define HAVE_AS_NO_MUL_BUG_ABORT_OPTION 1" >>confdefs.h
9785 fi
9786 ;;
9787
9788 - avr-*-*)
9789 - { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for -mrmw option" >&5
9790 -$as_echo_n "checking assembler for -mrmw option... " >&6; }
9791 -if test "${gcc_cv_as_avr_mrmw+set}" = set; then :
9792 - $as_echo_n "(cached) " >&6
9793 -else
9794 - gcc_cv_as_avr_mrmw=no
9795 - if test x$gcc_cv_as != x; then
9796 - $as_echo '.text' > conftest.s
9797 - if { ac_try='$gcc_cv_as $gcc_cv_as_flags -mrmw -o conftest.o conftest.s >&5'
9798 - { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
9799 - (eval $ac_try) 2>&5
9800 - ac_status=$?
9801 - $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
9802 - test $ac_status = 0; }; }
9803 - then
9804 - gcc_cv_as_avr_mrmw=yes
9805 - else
9806 - echo "configure: failed program was" >&5
9807 - cat conftest.s >&5
9808 - fi
9809 - rm -f conftest.o conftest.s
9810 - fi
9811 -fi
9812 -{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_avr_mrmw" >&5
9813 -$as_echo "$gcc_cv_as_avr_mrmw" >&6; }
9814 -if test $gcc_cv_as_avr_mrmw = yes; then
9815 -
9816 -$as_echo "#define HAVE_AS_AVR_MRMW_OPTION 1" >>confdefs.h
9817 -
9818 -fi
9819 - ;;
9820 -
9821 sparc*-*-*)
9822 { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for .register" >&5
9823 $as_echo_n "checking assembler for .register... " >&6; }
57829824 diff --git a/gcc/configure.ac b/gcc/configure.ac
5783 index e54df10..25d32ea 100644
9825 index 7bf1250..7b6b453 100644
57849826 --- a/gcc/configure.ac
57859827 +++ b/gcc/configure.ac
5786 @@ -835,9 +835,10 @@ esac],
5787 [enable_languages=c])
5788
5789 AC_ARG_WITH(multilib-list,
5790 -[AS_HELP_STRING([--with-multilib-list], [select multilibs (AArch64, SH and x86-64 only)])],
5791 +[AS_HELP_STRING([--with-multilib-list], [select multilibs (ARM, SH and x86-64 only)])],
9828 @@ -838,6 +838,7 @@ AC_ARG_WITH(multilib-list,
9829 [AS_HELP_STRING([--with-multilib-list], [select multilibs (AArch64, SH and x86-64 only)])],
57929830 :,
57939831 with_multilib_list=default)
57949832 +AC_SUBST(with_multilib_list)
57959833
57969834 # -------------------------
57979835 # Checks for other programs
9836 @@ -3564,29 +3565,6 @@ AS_HELP_STRING([--disable-fix-cortex-a53-835769],
9837 esac
9838 ],
9839 [])
9840 - # Enable default workaround for AArch64 Cortex-A53 erratum 843419.
9841 - AC_ARG_ENABLE(fix-cortex-a53-843419,
9842 - [
9843 -AS_HELP_STRING([--enable-fix-cortex-a53-843419],
9844 - [enable workaround for AArch64 Cortex-A53 erratum 843419 by default])
9845 -AS_HELP_STRING([--disable-fix-cortex-a53-843419],
9846 - [disable workaround for AArch64 Cortex-A53 erratum 843419 by default])
9847 - ],
9848 - [
9849 - case $enableval in
9850 - yes)
9851 - tm_defines="${tm_defines} TARGET_FIX_ERR_A53_843419_DEFAULT=1"
9852 - ;;
9853 - no)
9854 - ;;
9855 - *)
9856 - AC_MSG_ERROR(['$enableval' is an invalid value for --enable-fix-cortex-a53-843419.\
9857 - Valid choices are 'yes' and 'no'.])
9858 - ;;
9859 -
9860 - esac
9861 - ],
9862 - [])
9863 ;;
9864
9865 # All TARGET_ABI_OSF targets.
9866 @@ -3626,13 +3604,6 @@ AS_HELP_STRING([--disable-fix-cortex-a53-843419],
9867 [Define if your assembler supports the -no-mul-bug-abort option.])])
9868 ;;
9869
9870 - avr-*-*)
9871 - gcc_GAS_CHECK_FEATURE([-mrmw option], gcc_cv_as_avr_mrmw,,
9872 - [-mrmw], [.text],,
9873 - [AC_DEFINE(HAVE_AS_AVR_MRMW_OPTION, 1,
9874 - [Define if your assembler supports -mrmw option.])])
9875 - ;;
9876 -
9877 sparc*-*-*)
9878 gcc_GAS_CHECK_FEATURE([.register], gcc_cv_as_sparc_register_op,,,
9879 [.register %g2, #scratch],,
9880 diff --git a/gcc/cp/cvt.c b/gcc/cp/cvt.c
9881 index adfe7c6..e8ece0e 100644
9882 --- a/gcc/cp/cvt.c
9883 +++ b/gcc/cp/cvt.c
9884 @@ -595,20 +595,8 @@ ignore_overflows (tree expr, tree orig)
9885 tree
9886 cp_fold_convert (tree type, tree expr)
9887 {
9888 - tree conv;
9889 - if (TREE_TYPE (expr) == type)
9890 - conv = expr;
9891 - else if (TREE_CODE (expr) == PTRMEM_CST)
9892 - {
9893 - /* Avoid wrapping a PTRMEM_CST in NOP_EXPR. */
9894 - conv = copy_node (expr);
9895 - TREE_TYPE (conv) = type;
9896 - }
9897 - else
9898 - {
9899 - conv = fold_convert (type, expr);
9900 - conv = ignore_overflows (conv, expr);
9901 - }
9902 + tree conv = fold_convert (type, expr);
9903 + conv = ignore_overflows (conv, expr);
9904 return conv;
9905 }
9906
9907 diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c
9908 index 46cd58f..b0bbf9e 100644
9909 --- a/gcc/cp/decl.c
9910 +++ b/gcc/cp/decl.c
9911 @@ -10448,7 +10448,7 @@ grokdeclarator (const cp_declarator *declarator,
9912 }
9913 else if (decl_context == FIELD)
9914 {
9915 - if (!staticp && !friendp && TREE_CODE (type) != METHOD_TYPE
9916 + if (!staticp && TREE_CODE (type) != METHOD_TYPE
9917 && type_uses_auto (type))
9918 {
9919 error ("non-static data member declared %<auto%>");
9920 diff --git a/gcc/cp/decl2.c b/gcc/cp/decl2.c
9921 index 808c94f..78c1124 100644
9922 --- a/gcc/cp/decl2.c
9923 +++ b/gcc/cp/decl2.c
9924 @@ -2122,12 +2122,9 @@ constrain_visibility_for_template (tree decl, tree targs)
9925 tree arg = TREE_VEC_ELT (args, i-1);
9926 if (TYPE_P (arg))
9927 vis = type_visibility (arg);
9928 - else
9929 + else if (TREE_TYPE (arg) && POINTER_TYPE_P (TREE_TYPE (arg)))
9930 {
9931 - if (REFERENCE_REF_P (arg))
9932 - arg = TREE_OPERAND (arg, 0);
9933 - if (TREE_TYPE (arg))
9934 - STRIP_NOPS (arg);
9935 + STRIP_NOPS (arg);
9936 if (TREE_CODE (arg) == ADDR_EXPR)
9937 arg = TREE_OPERAND (arg, 0);
9938 if (VAR_OR_FUNCTION_DECL_P (arg))
9939 diff --git a/gcc/cp/init.c b/gcc/cp/init.c
9940 index 5cb7fc4..bf9c538 100644
9941 --- a/gcc/cp/init.c
9942 +++ b/gcc/cp/init.c
9943 @@ -3734,7 +3734,11 @@ build_vec_init (tree base, tree maxindex, tree init,
9944 {
9945 if (cxx_dialect >= cxx11 && AGGREGATE_TYPE_P (type))
9946 {
9947 - init = build_constructor (init_list_type_node, NULL);
9948 + if (BRACE_ENCLOSED_INITIALIZER_P (init)
9949 + && CONSTRUCTOR_NELTS (init) == 0)
9950 + /* Reuse it. */;
9951 + else
9952 + init = build_constructor (init_list_type_node, NULL);
9953 CONSTRUCTOR_IS_DIRECT_INIT (init) = true;
9954 }
9955 else
9956 diff --git a/gcc/cp/lambda.c b/gcc/cp/lambda.c
9957 index 7391dd9..6acbdd9 100644
9958 --- a/gcc/cp/lambda.c
9959 +++ b/gcc/cp/lambda.c
9960 @@ -764,9 +764,8 @@ maybe_resolve_dummy (tree object)
9961 /* In a lambda, need to go through 'this' capture. */
9962 tree lam = CLASSTYPE_LAMBDA_EXPR (current_class_type);
9963 tree cap = lambda_expr_this_capture (lam);
9964 - if (cap && cap != error_mark_node)
9965 - object = build_x_indirect_ref (EXPR_LOCATION (object), cap,
9966 - RO_NULL, tf_warning_or_error);
9967 + object = build_x_indirect_ref (EXPR_LOCATION (object), cap,
9968 + RO_NULL, tf_warning_or_error);
9969 }
9970
9971 return object;
9972 diff --git a/gcc/cp/name-lookup.c b/gcc/cp/name-lookup.c
9973 index b76cf08..0137c3f 100644
9974 --- a/gcc/cp/name-lookup.c
9975 +++ b/gcc/cp/name-lookup.c
9976 @@ -3381,7 +3381,7 @@ do_class_using_decl (tree scope, tree name)
9977 tf_warning_or_error);
9978 if (b_kind < bk_proper_base)
9979 {
9980 - if (!bases_dependent_p || b_kind == bk_same_type)
9981 + if (!bases_dependent_p)
9982 {
9983 error_not_base_type (scope, current_class_type);
9984 return NULL_TREE;
9985 diff --git a/gcc/cp/pt.c b/gcc/cp/pt.c
9986 index 60e9671..fc8300a 100644
9987 --- a/gcc/cp/pt.c
9988 +++ b/gcc/cp/pt.c
9989 @@ -13912,7 +13912,7 @@ tsubst_expr (tree t, tree args, tsubst_flags_t complain, tree in_decl,
9990 tmp = tsubst_omp_clauses (OMP_TARGET_UPDATE_CLAUSES (t), false,
9991 args, complain, in_decl);
9992 t = copy_node (t);
9993 - OMP_TARGET_UPDATE_CLAUSES (t) = tmp;
9994 + OMP_CLAUSES (t) = tmp;
9995 add_stmt (t);
9996 break;
9997
9998 diff --git a/gcc/df.h b/gcc/df.h
9999 index e78b34b..878f507 100644
10000 --- a/gcc/df.h
10001 +++ b/gcc/df.h
10002 @@ -1134,22 +1134,20 @@ df_get_artificial_uses (unsigned int bb_index)
10003
10004 /* web */
10005
10006 -class web_entry_base
10007 +/* This entry is allocated for each reference in the insn stream. */
10008 +struct web_entry
10009 {
10010 - private:
10011 - /* Reference to the parent in the union/find tree. */
10012 - web_entry_base *pred_pvt;
10013 -
10014 - public:
10015 - /* Accessors. */
10016 - web_entry_base *pred () { return pred_pvt; }
10017 - void set_pred (web_entry_base *p) { pred_pvt = p; }
10018 -
10019 - /* Find representative in union-find tree. */
10020 - web_entry_base *unionfind_root ();
10021 -
10022 - /* Union with another set, returning TRUE if they are already unioned. */
10023 - friend bool unionfind_union (web_entry_base *first, web_entry_base *second);
10024 + /* Pointer to the parent in the union/find tree. */
10025 + struct web_entry *pred;
10026 + /* Newly assigned register to the entry. Set only for roots. */
10027 + rtx reg;
10028 + void* extra_info;
10029 };
10030
10031 +extern struct web_entry *unionfind_root (struct web_entry *);
10032 +extern bool unionfind_union (struct web_entry *, struct web_entry *);
10033 +extern void union_defs (df_ref, struct web_entry *,
10034 + unsigned int *used, struct web_entry *,
10035 + bool (*fun) (struct web_entry *, struct web_entry *));
10036 +
10037 #endif /* GCC_DF_H */
10038 diff --git a/gcc/expr.c b/gcc/expr.c
10039 index b453ebf..8d1844a 100644
10040 --- a/gcc/expr.c
10041 +++ b/gcc/expr.c
10042 @@ -6576,12 +6576,11 @@ store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
10043 && mode != TYPE_MODE (TREE_TYPE (exp)))
10044 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
10045
10046 - /* If TEMP is not a PARALLEL (see below) and its mode and that of TARGET
10047 - are both BLKmode, both must be in memory and BITPOS must be aligned
10048 - on a byte boundary. If so, we simply do a block copy. Likewise for
10049 - a BLKmode-like TARGET. */
10050 - if (GET_CODE (temp) != PARALLEL
10051 - && GET_MODE (temp) == BLKmode
10052 + /* If the modes of TEMP and TARGET are both BLKmode, both
10053 + must be in memory and BITPOS must be aligned on a byte
10054 + boundary. If so, we simply do a block copy. Likewise
10055 + for a BLKmode-like TARGET. */
10056 + if (GET_MODE (temp) == BLKmode
10057 && (GET_MODE (target) == BLKmode
10058 || (MEM_P (target)
10059 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
10060 diff --git a/gcc/fold-const.c b/gcc/fold-const.c
10061 index 71e1e0a..901204f 100644
10062 --- a/gcc/fold-const.c
10063 +++ b/gcc/fold-const.c
10064 @@ -8324,14 +8324,9 @@ fold_unary_loc (location_t loc, enum tree_code code, tree type, tree op0)
10065 && integer_onep (TREE_OPERAND (arg0, 1)))
10066 || (TREE_CODE (arg0) == PLUS_EXPR
10067 && integer_all_onesp (TREE_OPERAND (arg0, 1)))))
10068 - {
10069 - /* Perform the negation in ARG0's type and only then convert
10070 - to TYPE as to avoid introducing undefined behavior. */
10071 - tree t = fold_build1_loc (loc, NEGATE_EXPR,
10072 - TREE_TYPE (TREE_OPERAND (arg0, 0)),
10073 - TREE_OPERAND (arg0, 0));
10074 - return fold_convert_loc (loc, type, t);
10075 - }
10076 + return fold_build1_loc (loc, NEGATE_EXPR, type,
10077 + fold_convert_loc (loc, type,
10078 + TREE_OPERAND (arg0, 0)));
10079 /* Convert ~(X ^ Y) to ~X ^ Y or X ^ ~Y if ~X or ~Y simplify. */
10080 else if (TREE_CODE (arg0) == BIT_XOR_EXPR
10081 && (tem = fold_unary_loc (loc, BIT_NOT_EXPR, type,
10082 diff --git a/gcc/fortran/class.c b/gcc/fortran/class.c
10083 index cd0330a..aee9666 100644
10084 --- a/gcc/fortran/class.c
10085 +++ b/gcc/fortran/class.c
10086 @@ -34,12 +34,6 @@ along with GCC; see the file COPYING3. If not see
10087 (pointer/allocatable/dimension/...).
10088 * _vptr: A pointer to the vtable entry (see below) of the dynamic type.
10089
10090 - Only for unlimited polymorphic classes:
10091 - * _len: An integer(4) to store the string length when the unlimited
10092 - polymorphic pointer is used to point to a char array. The '_len'
10093 - component will be zero when no character array is stored in
10094 - '_data'.
10095 -
10096 For each derived type we set up a "vtable" entry, i.e. a structure with the
10097 following fields:
10098 * _hash: A hash value serving as a unique identifier for this type.
10099 @@ -550,48 +544,10 @@ gfc_intrinsic_hash_value (gfc_typespec *ts)
10100 }
10101
10102
10103 -/* Get the _len component from a class/derived object storing a string.
10104 - For unlimited polymorphic entities a ref to the _data component is available
10105 - while a ref to the _len component is needed. This routine traverses the
10106 - ref-chain and strips the last ref to a _data from it replacing it with a
10107 - ref to the _len component. */
10108 -
10109 -gfc_expr *
10110 -gfc_get_len_component (gfc_expr *e)
10111 -{
10112 - gfc_expr *ptr;
10113 - gfc_ref *ref, **last;
10114 -
10115 - ptr = gfc_copy_expr (e);
10116 -
10117 - /* We need to remove the last _data component ref from ptr. */
10118 - last = &(ptr->ref);
10119 - ref = ptr->ref;
10120 - while (ref)
10121 - {
10122 - if (!ref->next
10123 - && ref->type == REF_COMPONENT
10124 - && strcmp ("_data", ref->u.c.component->name)== 0)
10125 - {
10126 - gfc_free_ref_list (ref);
10127 - *last = NULL;
10128 - break;
10129 - }
10130 - last = &(ref->next);
10131 - ref = ref->next;
10132 - }
10133 - /* And replace if with a ref to the _len component. */
10134 - gfc_add_component_ref (ptr, "_len");
10135 - return ptr;
10136 -}
10137 -
10138 -
10139 /* Build a polymorphic CLASS entity, using the symbol that comes from
10140 build_sym. A CLASS entity is represented by an encapsulating type,
10141 which contains the declared type as '_data' component, plus a pointer
10142 - component '_vptr' which determines the dynamic type. When this CLASS
10143 - entity is unlimited polymorphic, then also add a component '_len' to
10144 - store the length of string when that is stored in it. */
10145 + component '_vptr' which determines the dynamic type. */
10146
10147 bool
10148 gfc_build_class_symbol (gfc_typespec *ts, symbol_attribute *attr,
10149 @@ -689,28 +645,19 @@ gfc_build_class_symbol (gfc_typespec *ts, symbol_attribute *attr,
10150 if (!gfc_add_component (fclass, "_vptr", &c))
10151 return false;
10152 c->ts.type = BT_DERIVED;
10153 - c->attr.access = ACCESS_PRIVATE;
10154 - c->attr.pointer = 1;
10155
10156 if (ts->u.derived->attr.unlimited_polymorphic)
10157 {
10158 vtab = gfc_find_derived_vtab (ts->u.derived);
10159 gcc_assert (vtab);
10160 c->ts.u.derived = vtab->ts.u.derived;
10161 -
10162 - /* Add component '_len'. Only unlimited polymorphic pointers may
10163 - have a string assigned to them, i.e., only those need the _len
10164 - component. */
10165 - if (!gfc_add_component (fclass, "_len", &c))
10166 - return false;
10167 - c->ts.type = BT_INTEGER;
10168 - c->ts.kind = 4;
10169 - c->attr.access = ACCESS_PRIVATE;
10170 - c->attr.artificial = 1;
10171 }
10172 else
10173 /* Build vtab later. */
10174 c->ts.u.derived = NULL;
10175 +
10176 + c->attr.access = ACCESS_PRIVATE;
10177 + c->attr.pointer = 1;
10178 }
10179
10180 if (!ts->u.derived->attr.unlimited_polymorphic)
10181 @@ -2487,9 +2434,18 @@ find_intrinsic_vtab (gfc_typespec *ts)
10182 gfc_symbol *copy = NULL, *src = NULL, *dst = NULL;
10183 int charlen = 0;
10184
10185 - if (ts->type == BT_CHARACTER && !ts->deferred && ts->u.cl && ts->u.cl->length
10186 - && ts->u.cl->length->expr_type == EXPR_CONSTANT)
10187 - charlen = mpz_get_si (ts->u.cl->length->value.integer);
10188 + if (ts->type == BT_CHARACTER)
10189 + {
10190 + if (ts->deferred)
10191 + {
10192 + gfc_error ("TODO: Deferred character length variable at %C cannot "
10193 + "yet be associated with unlimited polymorphic entities");
10194 + return NULL;
10195 + }
10196 + else if (ts->u.cl && ts->u.cl->length
10197 + && ts->u.cl->length->expr_type == EXPR_CONSTANT)
10198 + charlen = mpz_get_si (ts->u.cl->length->value.integer);
10199 + }
10200
10201 /* Find the top-level namespace. */
10202 for (ns = gfc_current_ns; ns; ns = ns->parent)
10203 diff --git a/gcc/fortran/decl.c b/gcc/fortran/decl.c
10204 index ea1b20e..eebecd5 100644
10205 --- a/gcc/fortran/decl.c
10206 +++ b/gcc/fortran/decl.c
10207 @@ -2851,7 +2851,6 @@ gfc_match_decl_type_spec (gfc_typespec *ts, int implicit_flag)
10208 return MATCH_ERROR;
10209 }
10210
10211 - gfc_save_symbol_data (sym);
10212 gfc_set_sym_referenced (sym);
10213 if (!sym->attr.generic
10214 && !gfc_add_generic (&sym->attr, sym->name, NULL))
10215 @@ -2876,8 +2875,6 @@ gfc_match_decl_type_spec (gfc_typespec *ts, int implicit_flag)
10216 sym->generic = intr;
10217 sym->attr.if_source = IFSRC_DECL;
10218 }
10219 - else
10220 - gfc_save_symbol_data (dt_sym);
10221
10222 gfc_set_sym_referenced (dt_sym);
10223
10224 diff --git a/gcc/fortran/gfortran.h b/gcc/fortran/gfortran.h
10225 index 11d3996..a193f53 100644
10226 --- a/gcc/fortran/gfortran.h
10227 +++ b/gcc/fortran/gfortran.h
10228 @@ -2815,7 +2815,6 @@ bool verify_bind_c_derived_type (gfc_symbol *);
10229 bool verify_com_block_vars_c_interop (gfc_common_head *);
10230 gfc_symtree *generate_isocbinding_symbol (const char *, iso_c_binding_symbol,
10231 const char *, gfc_symtree *, bool);
10232 -void gfc_save_symbol_data (gfc_symbol *);
10233 int gfc_get_sym_tree (const char *, gfc_namespace *, gfc_symtree **, bool);
10234 int gfc_get_ha_symbol (const char *, gfc_symbol **);
10235 int gfc_get_ha_sym_tree (const char *, gfc_symtree **);
10236 @@ -3174,7 +3173,6 @@ bool gfc_is_class_scalar_expr (gfc_expr *);
10237 bool gfc_is_class_container_ref (gfc_expr *e);
10238 gfc_expr *gfc_class_initializer (gfc_typespec *, gfc_expr *);
10239 unsigned int gfc_hash_value (gfc_symbol *);
10240 -gfc_expr *gfc_get_len_component (gfc_expr *e);
10241 bool gfc_build_class_symbol (gfc_typespec *, symbol_attribute *,
10242 gfc_array_spec **);
10243 gfc_symbol *gfc_find_derived_vtab (gfc_symbol *);
10244 diff --git a/gcc/fortran/resolve.c b/gcc/fortran/resolve.c
10245 index 1707e25..54d7176 100644
10246 --- a/gcc/fortran/resolve.c
10247 +++ b/gcc/fortran/resolve.c
10248 @@ -12864,13 +12864,10 @@ resolve_symbol (gfc_symbol *sym)
10249 {
10250 this_symtree = gfc_find_symtree (gfc_current_ns->sym_root,
10251 sym->name);
10252 - if (this_symtree->n.sym == sym)
10253 - {
10254 - symtree->n.sym->refs++;
10255 - gfc_release_symbol (sym);
10256 - this_symtree->n.sym = symtree->n.sym;
10257 - return;
10258 - }
10259 + gfc_release_symbol (sym);
10260 + symtree->n.sym->refs++;
10261 + this_symtree->n.sym = symtree->n.sym;
10262 + return;
10263 }
10264 }
10265
10266 diff --git a/gcc/fortran/simplify.c b/gcc/fortran/simplify.c
10267 index 3106d79..d205523 100644
10268 --- a/gcc/fortran/simplify.c
10269 +++ b/gcc/fortran/simplify.c
10270 @@ -3690,14 +3690,6 @@ gfc_simplify_len (gfc_expr *e, gfc_expr *kind)
10271 mpz_set (result->value.integer, e->ts.u.cl->length->value.integer);
10272 return range_check (result, "LEN");
10273 }
10274 - else if (e->expr_type == EXPR_VARIABLE && e->ts.type == BT_CHARACTER
10275 - && e->symtree->n.sym
10276 - && e->symtree->n.sym->assoc && e->symtree->n.sym->assoc->target
10277 - && e->symtree->n.sym->assoc->target->ts.type == BT_DERIVED)
10278 - /* The expression in assoc->target points to a ref to the _data component
10279 - of the unlimited polymorphic entity. To get the _len component the last
10280 - _data ref needs to be stripped and a ref to the _len component added. */
10281 - return gfc_get_len_component (e->symtree->n.sym->assoc->target);
10282 else
10283 return NULL;
10284 }
10285 diff --git a/gcc/fortran/symbol.c b/gcc/fortran/symbol.c
10286 index dca3220..8edd693 100644
10287 --- a/gcc/fortran/symbol.c
10288 +++ b/gcc/fortran/symbol.c
10289 @@ -2747,8 +2747,8 @@ single_undo_checkpoint_p (void)
10290
10291 /* Save symbol with the information necessary to back it out. */
10292
10293 -void
10294 -gfc_save_symbol_data (gfc_symbol *sym)
10295 +static void
10296 +save_symbol_data (gfc_symbol *sym)
10297 {
10298 gfc_symbol *s;
10299 unsigned i;
10300 @@ -2849,7 +2849,7 @@ gfc_get_sym_tree (const char *name, gfc_namespace *ns, gfc_symtree **result,
10301 p->mark = 1;
10302
10303 /* Copy in case this symbol is changed. */
10304 - gfc_save_symbol_data (p);
10305 + save_symbol_data (p);
10306 }
10307
10308 *result = st;
10309 @@ -2888,7 +2888,7 @@ gfc_get_ha_sym_tree (const char *name, gfc_symtree **result)
10310
10311 if (st != NULL)
10312 {
10313 - gfc_save_symbol_data (st->n.sym);
10314 + save_symbol_data (st->n.sym);
10315 *result = st;
10316 return i;
10317 }
10318 diff --git a/gcc/fortran/trans-expr.c b/gcc/fortran/trans-expr.c
10319 index b18ccd8..2b06304 100644
10320 --- a/gcc/fortran/trans-expr.c
10321 +++ b/gcc/fortran/trans-expr.c
10322 @@ -92,7 +92,6 @@ gfc_conv_scalar_to_descriptor (gfc_se *se, tree scalar, symbol_attribute attr)
10323 in future implementations. Use the corresponding APIs. */
10324 #define CLASS_DATA_FIELD 0
10325 #define CLASS_VPTR_FIELD 1
10326 -#define CLASS_LEN_FIELD 2
10327 #define VTABLE_HASH_FIELD 0
10328 #define VTABLE_SIZE_FIELD 1
10329 #define VTABLE_EXTENDS_FIELD 2
10330 @@ -147,20 +146,6 @@ gfc_class_vptr_get (tree decl)
10331 }
10332
10333
10334 -tree
10335 -gfc_class_len_get (tree decl)
10336 -{
10337 - tree len;
10338 - if (POINTER_TYPE_P (TREE_TYPE (decl)))
10339 - decl = build_fold_indirect_ref_loc (input_location, decl);
10340 - len = gfc_advance_chain (TYPE_FIELDS (TREE_TYPE (decl)),
10341 - CLASS_LEN_FIELD);
10342 - return fold_build3_loc (input_location, COMPONENT_REF,
10343 - TREE_TYPE (len), decl, len,
10344 - NULL_TREE);
10345 -}
10346 -
10347 -
10348 static tree
10349 gfc_vtable_field_get (tree decl, int field)
10350 {
10351 @@ -614,45 +599,6 @@ gfc_conv_intrinsic_to_class (gfc_se *parmse, gfc_expr *e,
10352 }
10353 }
10354
10355 - /* When the actual arg is a char array, then set the _len component of the
10356 - unlimited polymorphic entity, too. */
10357 - if (e->ts.type == BT_CHARACTER)
10358 - {
10359 - ctree = gfc_class_len_get (var);
10360 - /* Start with parmse->string_length because this seems to be set to a
10361 - correct value more often. */
10362 - if (parmse->string_length)
10363 - gfc_add_modify (&parmse->pre, ctree, parmse->string_length);
10364 - /* When the string_length is not yet set, then try the backend_decl of
10365 - the cl. */
10366 - else if (e->ts.u.cl->backend_decl)
10367 - gfc_add_modify (&parmse->pre, ctree, e->ts.u.cl->backend_decl);
10368 - /* If both of the above approaches fail, then try to generate an
10369 - expression from the input, which is only feasible currently, when the
10370 - expression can be evaluated to a constant one. */
10371 - else
10372 - {
10373 - /* Try to simplify the expression. */
10374 - gfc_simplify_expr (e, 0);
10375 - if (e->expr_type == EXPR_CONSTANT && !e->ts.u.cl->resolved)
10376 - {
10377 - /* Amazingly all data is present to compute the length of a
10378 - constant string, but the expression is not yet there. */
10379 - e->ts.u.cl->length = gfc_get_constant_expr (BT_INTEGER, 4,
10380 - &e->where);
10381 - mpz_set_ui (e->ts.u.cl->length->value.integer,
10382 - e->value.character.length);
10383 - gfc_conv_const_charlen (e->ts.u.cl);
10384 - e->ts.u.cl->resolved = 1;
10385 - gfc_add_modify (&parmse->pre, ctree, e->ts.u.cl->backend_decl);
10386 - }
10387 - else
10388 - {
10389 - gfc_error ("Can't compute the length of the char array at %L.",
10390 - &e->where);
10391 - }
10392 - }
10393 - }
10394 /* Pass the address of the class object. */
10395 parmse->expr = gfc_build_addr_expr (NULL_TREE, var);
10396 }
10397 @@ -1711,12 +1657,10 @@ gfc_conv_component_ref (gfc_se * se, gfc_ref * ref)
10398
10399 c = ref->u.c.component;
10400
10401 - if (c->backend_decl == NULL_TREE
10402 - && ref->u.c.sym != NULL)
10403 - gfc_get_derived_type (ref->u.c.sym);
10404 + gcc_assert (c->backend_decl);
10405
10406 field = c->backend_decl;
10407 - gcc_assert (field && TREE_CODE (field) == FIELD_DECL);
10408 + gcc_assert (TREE_CODE (field) == FIELD_DECL);
10409 decl = se->expr;
10410
10411 /* Components can correspond to fields of different containing
10412 @@ -6247,7 +6191,7 @@ gfc_conv_structure (gfc_se * se, gfc_expr * expr, int init)
10413 of EXPR_NULL,... by default, the static nullify is not needed
10414 since this is done every time we come into scope. */
10415 if (!c->expr || (cm->attr.allocatable && cm->attr.flavor != FL_PROCEDURE))
10416 - continue;
10417 + continue;
10418
10419 if (cm->initializer && cm->initializer->expr_type != EXPR_NULL
10420 && strcmp (cm->name, "_extends") == 0
10421 @@ -6265,10 +6209,6 @@ gfc_conv_structure (gfc_se * se, gfc_expr * expr, int init)
10422 val = TYPE_SIZE_UNIT (gfc_get_derived_type (cm->ts.u.derived));
10423 CONSTRUCTOR_APPEND_ELT (v, cm->backend_decl, val);
10424 }
10425 - else if (cm->ts.type == BT_INTEGER && strcmp (cm->name, "_len") == 0)
10426 - CONSTRUCTOR_APPEND_ELT (v, cm->backend_decl,
10427 - fold_convert (TREE_TYPE (cm->backend_decl),
10428 - integer_zero_node));
10429 else
10430 {
10431 val = gfc_conv_initializer (c->expr, &cm->ts,
10432 @@ -6345,8 +6285,7 @@ gfc_conv_expr (gfc_se * se, gfc_expr * expr)
10433 null_pointer_node. C_PTR and C_FUNPTR are converted to match the
10434 typespec for the C_PTR and C_FUNPTR symbols, which has already been
10435 updated to be an integer with a kind equal to the size of a (void *). */
10436 - if (expr->ts.type == BT_DERIVED && expr->ts.u.derived->ts.f90_type == BT_VOID
10437 - && expr->ts.u.derived->attr.is_bind_c)
10438 + if (expr->ts.type == BT_DERIVED && expr->ts.u.derived->ts.f90_type == BT_VOID)
10439 {
10440 if (expr->expr_type == EXPR_VARIABLE
10441 && (expr->symtree->n.sym->intmod_sym_id == ISOCBINDING_NULL_PTR
10442 @@ -6611,27 +6550,6 @@ gfc_trans_pointer_assignment (gfc_expr * expr1, gfc_expr * expr2)
10443 rse.expr = build_fold_indirect_ref_loc (input_location,
10444 rse.expr);
10445
10446 - /* For string assignments to unlimited polymorphic pointers add an
10447 - assignment of the string_length to the _len component of the
10448 - pointer. */
10449 - if ((expr1->ts.type == BT_CLASS || expr1->ts.type == BT_DERIVED)
10450 - && expr1->ts.u.derived->attr.unlimited_polymorphic
10451 - && (expr2->ts.type == BT_CHARACTER ||
10452 - ((expr2->ts.type == BT_DERIVED || expr2->ts.type == BT_CLASS)
10453 - && expr2->ts.u.derived->attr.unlimited_polymorphic)))
10454 - {
10455 - gfc_expr *len_comp;
10456 - gfc_se se;
10457 - len_comp = gfc_get_len_component (expr1);
10458 - gfc_init_se (&se, NULL);
10459 - gfc_conv_expr (&se, len_comp);
10460 -
10461 - /* ptr % _len = len (str) */
10462 - gfc_add_modify (&block, se.expr, rse.string_length);
10463 - lse.string_length = se.expr;
10464 - gfc_free_expr (len_comp);
10465 - }
10466 -
10467 gfc_add_block_to_block (&block, &lse.pre);
10468 gfc_add_block_to_block (&block, &rse.pre);
10469
10470 @@ -6743,7 +6661,6 @@ gfc_trans_pointer_assignment (gfc_expr * expr1, gfc_expr * expr2)
10471 bound, bound, 0,
10472 GFC_ARRAY_POINTER_CONT, false);
10473 tmp = gfc_create_var (tmp, "ptrtemp");
10474 - lse.descriptor_only = 0;
10475 lse.expr = tmp;
10476 lse.direct_byref = 1;
10477 gfc_conv_expr_descriptor (&lse, expr2);
10478 @@ -6759,7 +6676,6 @@ gfc_trans_pointer_assignment (gfc_expr * expr1, gfc_expr * expr2)
10479 else if (expr2->expr_type == EXPR_VARIABLE)
10480 {
10481 /* Assign directly to the LHS's descriptor. */
10482 - lse.descriptor_only = 0;
10483 lse.direct_byref = 1;
10484 gfc_conv_expr_descriptor (&lse, expr2);
10485 strlen_rhs = lse.string_length;
10486 @@ -6810,7 +6726,6 @@ gfc_trans_pointer_assignment (gfc_expr * expr1, gfc_expr * expr2)
10487 /* Assign to a temporary descriptor and then copy that
10488 temporary to the pointer. */
10489 tmp = gfc_create_var (TREE_TYPE (desc), "ptrtemp");
10490 - lse.descriptor_only = 0;
10491 lse.expr = tmp;
10492 lse.direct_byref = 1;
10493 gfc_conv_expr_descriptor (&lse, expr2);
10494 diff --git a/gcc/fortran/trans-stmt.c b/gcc/fortran/trans-stmt.c
10495 index 508346d..62a63d6 100644
10496 --- a/gcc/fortran/trans-stmt.c
10497 +++ b/gcc/fortran/trans-stmt.c
10498 @@ -1133,22 +1133,6 @@ gfc_trans_critical (gfc_code *code)
10499 }
10500
10501
10502 -/* Return true, when the class has a _len component. */
10503 -
10504 -static bool
10505 -class_has_len_component (gfc_symbol *sym)
10506 -{
10507 - gfc_component *comp = sym->ts.u.derived->components;
10508 - while (comp)
10509 - {
10510 - if (strcmp (comp->name, "_len") == 0)
10511 - return true;
10512 - comp = comp->next;
10513 - }
10514 - return false;
10515 -}
10516 -
10517 -
10518 /* Do proper initialization for ASSOCIATE names. */
10519
10520 static void
10521 @@ -1162,8 +1146,6 @@ trans_associate_var (gfc_symbol *sym, gfc_wrapped_block *block)
10522 tree offset;
10523 tree dim;
10524 int n;
10525 - tree charlen;
10526 - bool need_len_assign;
10527
10528 gcc_assert (sym->assoc);
10529 e = sym->assoc->target;
10530 @@ -1174,20 +1156,6 @@ trans_associate_var (gfc_symbol *sym, gfc_wrapped_block *block)
10531
10532 unlimited = UNLIMITED_POLY (e);
10533
10534 - /* Assignments to the string length need to be generated, when
10535 - ( sym is a char array or
10536 - sym has a _len component)
10537 - and the associated expression is unlimited polymorphic, which is
10538 - not (yet) correctly in 'unlimited', because for an already associated
10539 - BT_DERIVED the u-poly flag is not set, i.e.,
10540 - __tmp_CHARACTER_0_1 => w => arg
10541 - ^ generated temp ^ from code, the w does not have the u-poly
10542 - flag set, where UNLIMITED_POLY(e) expects it. */
10543 - need_len_assign = ((unlimited || (e->ts.type == BT_DERIVED
10544 - && e->ts.u.derived->attr.unlimited_polymorphic))
10545 - && (sym->ts.type == BT_CHARACTER
10546 - || ((sym->ts.type == BT_CLASS || sym->ts.type == BT_DERIVED)
10547 - && class_has_len_component (sym))));
10548 /* Do a `pointer assignment' with updated descriptor (or assign descriptor
10549 to array temporary) for arrays with either unknown shape or if associating
10550 to a variable. */
10551 @@ -1287,11 +1255,8 @@ trans_associate_var (gfc_symbol *sym, gfc_wrapped_block *block)
10552 unconditionally associate pointers and the symbol is scalar. */
10553 if (sym->ts.type == BT_CLASS && CLASS_DATA (sym)->attr.dimension)
10554 {
10555 - tree target_expr;
10556 /* For a class array we need a descriptor for the selector. */
10557 gfc_conv_expr_descriptor (&se, e);
10558 - /* Needed to get/set the _len component below. */
10559 - target_expr = se.expr;
10560
10561 /* Obtain a temporary class container for the result. */
10562 gfc_conv_class_to_class (&se, e, sym->ts, false, true, false, false);
10563 @@ -1311,23 +1276,6 @@ trans_associate_var (gfc_symbol *sym, gfc_wrapped_block *block)
10564 gfc_array_index_type,
10565 offset, tmp);
10566 }
10567 - if (need_len_assign)
10568 - {
10569 - /* Get the _len comp from the target expr by stripping _data
10570 - from it and adding component-ref to _len. */
10571 - tmp = gfc_class_len_get (TREE_OPERAND (target_expr, 0));
10572 - /* Get the component-ref for the temp structure's _len comp. */
10573 - charlen = gfc_class_len_get (se.expr);
10574 - /* Add the assign to the beginning of the the block... */
10575 - gfc_add_modify (&se.pre, charlen,
10576 - fold_convert (TREE_TYPE (charlen), tmp));
10577 - /* and the oposite way at the end of the block, to hand changes
10578 - on the string length back. */
10579 - gfc_add_modify (&se.post, tmp,
10580 - fold_convert (TREE_TYPE (tmp), charlen));
10581 - /* Length assignment done, prevent adding it again below. */
10582 - need_len_assign = false;
10583 - }
10584 gfc_conv_descriptor_offset_set (&se.pre, desc, offset);
10585 }
10586 else if (sym->ts.type == BT_CLASS && e->ts.type == BT_CLASS
10587 @@ -1342,13 +1290,7 @@ trans_associate_var (gfc_symbol *sym, gfc_wrapped_block *block)
10588 se.expr = build_fold_indirect_ref_loc (input_location, se.expr);
10589 }
10590 else
10591 - {
10592 - /* For BT_CLASS and BT_DERIVED, this boils down to a pointer assign,
10593 - which has the string length included. For CHARACTERS it is still
10594 - needed and will be done at the end of this routine. */
10595 - gfc_conv_expr (&se, e);
10596 - need_len_assign = need_len_assign && sym->ts.type == BT_CHARACTER;
10597 - }
10598 + gfc_conv_expr (&se, e);
10599
10600 tmp = TREE_TYPE (sym->backend_decl);
10601 tmp = gfc_build_addr_expr (tmp, se.expr);
10602 @@ -1369,30 +1311,21 @@ trans_associate_var (gfc_symbol *sym, gfc_wrapped_block *block)
10603 gfc_add_init_cleanup (block, tmp, NULL_TREE);
10604 }
10605
10606 - /* Set the stringlength, when needed. */
10607 - if (need_len_assign)
10608 + /* Set the stringlength from the vtable size. */
10609 + if (sym->ts.type == BT_CHARACTER && sym->attr.select_type_temporary)
10610 {
10611 + tree charlen;
10612 gfc_se se;
10613 gfc_init_se (&se, NULL);
10614 - if (e->symtree->n.sym->ts.type == BT_CHARACTER)
10615 - {
10616 - /* What about deferred strings? */
10617 - gcc_assert (!e->symtree->n.sym->ts.deferred);
10618 - tmp = e->symtree->n.sym->ts.u.cl->backend_decl;
10619 - }
10620 - else
10621 - tmp = gfc_class_len_get (gfc_get_symbol_decl (e->symtree->n.sym));
10622 + gcc_assert (UNLIMITED_POLY (e->symtree->n.sym));
10623 + tmp = gfc_get_symbol_decl (e->symtree->n.sym);
10624 + tmp = gfc_vtable_size_get (tmp);
10625 gfc_get_symbol_decl (sym);
10626 - charlen = sym->ts.type == BT_CHARACTER ? sym->ts.u.cl->backend_decl
10627 - : gfc_class_len_get (sym->backend_decl);
10628 - /* Prevent adding a noop len= len. */
10629 - if (tmp != charlen)
10630 - {
10631 - gfc_add_modify (&se.pre, charlen,
10632 - fold_convert (TREE_TYPE (charlen), tmp));
10633 - gfc_add_init_cleanup (block, gfc_finish_block (&se.pre),
10634 - gfc_finish_block (&se.post));
10635 - }
10636 + charlen = sym->ts.u.cl->backend_decl;
10637 + gfc_add_modify (&se.pre, charlen,
10638 + fold_convert (TREE_TYPE (charlen), tmp));
10639 + gfc_add_init_cleanup (block, gfc_finish_block( &se.pre),
10640 + gfc_finish_block (&se.post));
10641 }
10642 }
10643
10644 @@ -5105,15 +5038,6 @@ gfc_trans_allocate (gfc_code * code)
10645 gfc_add_modify (&se.pre, se.string_length,
10646 fold_convert (TREE_TYPE (se.string_length),
10647 memsz));
10648 - else if ((al->expr->ts.type == BT_DERIVED
10649 - || al->expr->ts.type == BT_CLASS)
10650 - && expr->ts.u.derived->attr.unlimited_polymorphic)
10651 - {
10652 - tmp = gfc_class_len_get (al->expr->symtree->n.sym->backend_decl);
10653 - gfc_add_modify (&se.pre, tmp,
10654 - fold_convert (TREE_TYPE (tmp),
10655 - memsz));
10656 - }
10657
10658 /* Convert to size in bytes, using the character KIND. */
10659 if (unlimited_char)
10660 diff --git a/gcc/fortran/trans-types.c b/gcc/fortran/trans-types.c
10661 index 20069e2..22f456e 100644
10662 --- a/gcc/fortran/trans-types.c
10663 +++ b/gcc/fortran/trans-types.c
10664 @@ -2415,24 +2415,9 @@ gfc_get_derived_type (gfc_symbol * derived)
10665 /* Its components' backend_decl have been built or we are
10666 seeing recursion through the formal arglist of a procedure
10667 pointer component. */
10668 - if (TYPE_FIELDS (derived->backend_decl))
10669 + if (TYPE_FIELDS (derived->backend_decl)
10670 + || derived->attr.proc_pointer_comp)
10671 return derived->backend_decl;
10672 - else if (derived->attr.abstract
10673 - && derived->attr.proc_pointer_comp)
10674 - {
10675 - /* If an abstract derived type with procedure pointer
10676 - components has no other type of component, return the
10677 - backend_decl. Otherwise build the components if any of the
10678 - non-procedure pointer components have no backend_decl. */
10679 - for (c = derived->components; c; c = c->next)
10680 - {
10681 - if (!c->attr.proc_pointer && c->backend_decl == NULL)
10682 - break;
10683 - else if (c->next == NULL)
10684 - return derived->backend_decl;
10685 - }
10686 - typenode = derived->backend_decl;
10687 - }
10688 else
10689 typenode = derived->backend_decl;
10690 }
10691 diff --git a/gcc/fortran/trans.h b/gcc/fortran/trans.h
10692 index fe2779a..b55460f 100644
10693 --- a/gcc/fortran/trans.h
10694 +++ b/gcc/fortran/trans.h
10695 @@ -347,7 +347,6 @@ gfc_wrapped_block;
10696 /* Class API functions. */
10697 tree gfc_class_data_get (tree);
10698 tree gfc_class_vptr_get (tree);
10699 -tree gfc_class_len_get (tree);
10700 void gfc_reset_vptr (stmtblock_t *, gfc_expr *);
10701 tree gfc_class_set_static_fields (tree, tree, tree);
10702 tree gfc_vtable_hash_get (tree);
10703 diff --git a/gcc/function.c b/gcc/function.c
10704 index b377667..1a8682b 100644
10705 --- a/gcc/function.c
10706 +++ b/gcc/function.c
10707 @@ -7193,15 +7193,6 @@ match_asm_constraints_1 (rtx insn, rtx *p_sets, int noutputs)
10708 df_insn_rescan (insn);
10709 }
10710
10711 -/* Add the decl D to the local_decls list of FUN. */
10712 -
10713 -void
10714 -add_local_decl (struct function *fun, tree d)
10715 -{
10716 - gcc_assert (TREE_CODE (d) == VAR_DECL);
10717 - vec_safe_push (fun->local_decls, d);
10718 -}
10719 -
10720 static unsigned
10721 rest_of_match_asm_constraints (void)
10722 {
10723 diff --git a/gcc/function.h b/gcc/function.h
10724 index fd4639c..38a0fc4 100644
10725 --- a/gcc/function.h
10726 +++ b/gcc/function.h
10727 @@ -674,7 +674,11 @@ struct GTY(()) function {
10728
10729 /* Add the decl D to the local_decls list of FUN. */
10730
10731 -void add_local_decl (struct function *fun, tree d);
10732 +static inline void
10733 +add_local_decl (struct function *fun, tree d)
10734 +{
10735 + vec_safe_push (fun->local_decls, d);
10736 +}
10737
10738 #define FOR_EACH_LOCAL_DECL(FUN, I, D) \
10739 FOR_EACH_VEC_SAFE_ELT_REVERSE ((FUN)->local_decls, I, D)
579810740 diff --git a/gcc/ira-color.c b/gcc/ira-color.c
579910741 index 1f4c96e..0562367 100644
580010742 --- a/gcc/ira-color.c
582110763 continue;
582210764 full_costs[j] -= conflict_costs[k];
582310765 }
10766 diff --git a/gcc/lra-assigns.c b/gcc/lra-assigns.c
10767 index 2ec160b..ac5ffd4 100644
10768 --- a/gcc/lra-assigns.c
10769 +++ b/gcc/lra-assigns.c
10770 @@ -849,7 +849,6 @@ spill_for (int regno, bitmap spilled_pseudo_bitmap, bool first_p)
10771 enum reg_class rclass;
10772 unsigned int spill_regno, reload_regno, uid;
10773 int insn_pseudos_num, best_insn_pseudos_num;
10774 - int bad_spills_num, smallest_bad_spills_num;
10775 lra_live_range_t r;
10776 bitmap_iterator bi;
10777
10778 @@ -868,7 +867,6 @@ spill_for (int regno, bitmap spilled_pseudo_bitmap, bool first_p)
10779 best_hard_regno = -1;
10780 best_cost = INT_MAX;
10781 best_insn_pseudos_num = INT_MAX;
10782 - smallest_bad_spills_num = INT_MAX;
10783 rclass_size = ira_class_hard_regs_num[rclass];
10784 mode = PSEUDO_REGNO_MODE (regno);
10785 /* Invalidate try_hard_reg_pseudos elements. */
10786 @@ -897,7 +895,6 @@ spill_for (int regno, bitmap spilled_pseudo_bitmap, bool first_p)
10787 && ! bitmap_bit_p (&lra_optional_reload_pseudos, spill_regno))
10788 goto fail;
10789 insn_pseudos_num = 0;
10790 - bad_spills_num = 0;
10791 if (lra_dump_file != NULL)
10792 fprintf (lra_dump_file, " Trying %d:", hard_regno);
10793 sparseset_clear (live_range_reload_inheritance_pseudos);
10794 @@ -905,8 +902,6 @@ spill_for (int regno, bitmap spilled_pseudo_bitmap, bool first_p)
10795 {
10796 if (bitmap_bit_p (&insn_conflict_pseudos, spill_regno))
10797 insn_pseudos_num++;
10798 - if (spill_regno >= (unsigned int) lra_bad_spill_regno_start)
10799 - bad_spills_num++;
10800 for (r = lra_reg_info[spill_regno].live_ranges;
10801 r != NULL;
10802 r = r->next)
10803 @@ -977,19 +972,15 @@ spill_for (int regno, bitmap spilled_pseudo_bitmap, bool first_p)
10804 }
10805 if (best_insn_pseudos_num > insn_pseudos_num
10806 || (best_insn_pseudos_num == insn_pseudos_num
10807 - && (bad_spills_num < smallest_bad_spills_num
10808 - || (bad_spills_num == smallest_bad_spills_num
10809 - && best_cost > cost))))
10810 + && best_cost > cost))
10811 {
10812 best_insn_pseudos_num = insn_pseudos_num;
10813 - smallest_bad_spills_num = bad_spills_num;
10814 best_cost = cost;
10815 best_hard_regno = hard_regno;
10816 bitmap_copy (&best_spill_pseudos_bitmap, &spill_pseudos_bitmap);
10817 if (lra_dump_file != NULL)
10818 - fprintf (lra_dump_file,
10819 - " Now best %d(cost=%d, bad_spills=%d, insn_pseudos=%d)\n",
10820 - hard_regno, cost, bad_spills_num, insn_pseudos_num);
10821 + fprintf (lra_dump_file, " Now best %d(cost=%d)\n",
10822 + hard_regno, cost);
10823 }
10824 assign_temporarily (regno, -1);
10825 for (j = 0; j < n; j++)
10826 diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
10827 index ae8f3cd..8746968 100644
10828 --- a/gcc/lra-constraints.c
10829 +++ b/gcc/lra-constraints.c
10830 @@ -144,10 +144,6 @@ static basic_block curr_bb;
10831 static lra_insn_recog_data_t curr_id;
10832 static struct lra_static_insn_data *curr_static_id;
10833 static enum machine_mode curr_operand_mode[MAX_RECOG_OPERANDS];
10834 -/* Mode of the register substituted by its equivalence with VOIDmode
10835 - (e.g. constant) and whose subreg is given operand of the current
10836 - insn. VOIDmode in all other cases. */
10837 -static machine_mode original_subreg_reg_mode[MAX_RECOG_OPERANDS];
10838
10839
10840
10841 @@ -1239,13 +1235,13 @@ static int valid_address_p (enum machine_mode mode, rtx addr, addr_space_t as);
10842
10843 /* Make reloads for subreg in operand NOP with internal subreg mode
10844 REG_MODE, add new reloads for further processing. Return true if
10845 - any change was done. */
10846 + any reload was generated. */
10847 static bool
10848 simplify_operand_subreg (int nop, enum machine_mode reg_mode)
10849 {
10850 int hard_regno;
10851 rtx before, after;
10852 - enum machine_mode mode, innermode;
10853 + enum machine_mode mode;
10854 rtx reg, new_reg;
10855 rtx operand = *curr_id->operand_loc[nop];
10856 enum reg_class regclass;
10857 @@ -1258,7 +1254,6 @@ simplify_operand_subreg (int nop, enum machine_mode reg_mode)
10858
10859 mode = GET_MODE (operand);
10860 reg = SUBREG_REG (operand);
10861 - innermode = GET_MODE (reg);
10862 type = curr_static_id->operand[nop].type;
10863 /* If we change address for paradoxical subreg of memory, the
10864 address might violate the necessary alignment or the access might
10865 @@ -1277,7 +1272,7 @@ simplify_operand_subreg (int nop, enum machine_mode reg_mode)
10866 alter_subreg (curr_id->operand_loc[nop], false);
10867 subst = *curr_id->operand_loc[nop];
10868 lra_assert (MEM_P (subst));
10869 - if (! valid_address_p (innermode, XEXP (reg, 0),
10870 + if (! valid_address_p (GET_MODE (reg), XEXP (reg, 0),
10871 MEM_ADDR_SPACE (reg))
10872 || valid_address_p (GET_MODE (subst), XEXP (subst, 0),
10873 MEM_ADDR_SPACE (subst)))
10874 @@ -1292,20 +1287,6 @@ simplify_operand_subreg (int nop, enum machine_mode reg_mode)
10875 alter_subreg (curr_id->operand_loc[nop], false);
10876 return true;
10877 }
10878 - else if (CONSTANT_P (reg))
10879 - {
10880 - /* Try to simplify subreg of constant. It is usually result of
10881 - equivalence substitution. */
10882 - if (innermode == VOIDmode
10883 - && (innermode = original_subreg_reg_mode[nop]) == VOIDmode)
10884 - innermode = curr_static_id->operand[nop].mode;
10885 - if ((new_reg = simplify_subreg (mode, reg, innermode,
10886 - SUBREG_BYTE (operand))) != NULL_RTX)
10887 - {
10888 - *curr_id->operand_loc[nop] = new_reg;
10889 - return true;
10890 - }
10891 - }
10892 /* Put constant into memory when we have mixed modes. It generates
10893 a better code in most cases as it does not need a secondary
10894 reload memory. It also prevents LRA looping when LRA is using
10895 @@ -1325,9 +1306,9 @@ simplify_operand_subreg (int nop, enum machine_mode reg_mode)
10896 && (hard_regno = lra_get_regno_hard_regno (REGNO (reg))) >= 0
10897 /* Don't reload paradoxical subregs because we could be looping
10898 having repeatedly final regno out of hard regs range. */
10899 - && (hard_regno_nregs[hard_regno][innermode]
10900 + && (hard_regno_nregs[hard_regno][GET_MODE (reg)]
10901 >= hard_regno_nregs[hard_regno][mode])
10902 - && simplify_subreg_regno (hard_regno, innermode,
10903 + && simplify_subreg_regno (hard_regno, GET_MODE (reg),
10904 SUBREG_BYTE (operand), mode) < 0
10905 /* Don't reload subreg for matching reload. It is actually
10906 valid subreg in LRA. */
10907 @@ -1353,7 +1334,7 @@ simplify_operand_subreg (int nop, enum machine_mode reg_mode)
10908 bitmap_set_bit (&lra_subreg_reload_pseudos, REGNO (new_reg));
10909
10910 insert_before = (type != OP_OUT
10911 - || GET_MODE_SIZE (innermode) > GET_MODE_SIZE (mode));
10912 + || GET_MODE_SIZE (GET_MODE (reg)) > GET_MODE_SIZE (mode));
10913 insert_after = (type != OP_IN);
10914 insert_move_for_subreg (insert_before ? &before : NULL,
10915 insert_after ? &after : NULL,
10916 @@ -1396,7 +1377,7 @@ simplify_operand_subreg (int nop, enum machine_mode reg_mode)
10917 else if (REG_P (reg)
10918 && REGNO (reg) >= FIRST_PSEUDO_REGISTER
10919 && (hard_regno = lra_get_regno_hard_regno (REGNO (reg))) >= 0
10920 - && (hard_regno_nregs[hard_regno][innermode]
10921 + && (hard_regno_nregs[hard_regno][GET_MODE (reg)]
10922 < hard_regno_nregs[hard_regno][mode])
10923 && (regclass = lra_get_allocno_class (REGNO (reg)))
10924 && (type != OP_IN
10925 @@ -1414,7 +1395,7 @@ simplify_operand_subreg (int nop, enum machine_mode reg_mode)
10926 bool insert_before, insert_after;
10927
10928 PUT_MODE (new_reg, mode);
10929 - subreg = simplify_gen_subreg (innermode, new_reg, mode, 0);
10930 + subreg = simplify_gen_subreg (GET_MODE (reg), new_reg, mode, 0);
10931 bitmap_set_bit (&lra_subreg_reload_pseudos, REGNO (new_reg));
10932
10933 insert_before = (type != OP_OUT);
10934 @@ -3203,9 +3184,6 @@ swap_operands (int nop)
10935 enum machine_mode mode = curr_operand_mode[nop];
10936 curr_operand_mode[nop] = curr_operand_mode[nop + 1];
10937 curr_operand_mode[nop + 1] = mode;
10938 - mode = original_subreg_reg_mode[nop];
10939 - original_subreg_reg_mode[nop] = original_subreg_reg_mode[nop + 1];
10940 - original_subreg_reg_mode[nop + 1] = mode;
10941 rtx x = *curr_id->operand_loc[nop];
10942 *curr_id->operand_loc[nop] = *curr_id->operand_loc[nop + 1];
10943 *curr_id->operand_loc[nop + 1] = x;
10944 @@ -3302,19 +3280,14 @@ curr_insn_transform (void)
10945 if (GET_CODE (old) == SUBREG)
10946 old = SUBREG_REG (old);
10947 subst = get_equiv_with_elimination (old, curr_insn);
10948 - original_subreg_reg_mode[i] = VOIDmode;
10949 if (subst != old)
10950 {
10951 subst = copy_rtx (subst);
10952 lra_assert (REG_P (old));
10953 - if (GET_CODE (op) != SUBREG)
10954 - *curr_id->operand_loc[i] = subst;
10955 + if (GET_CODE (op) == SUBREG)
10956 + SUBREG_REG (op) = subst;
10957 else
10958 - {
10959 - SUBREG_REG (op) = subst;
10960 - if (GET_MODE (subst) == VOIDmode)
10961 - original_subreg_reg_mode[i] = GET_MODE (old);
10962 - }
10963 + *curr_id->operand_loc[i] = subst;
10964 if (lra_dump_file != NULL)
10965 {
10966 fprintf (lra_dump_file,
10967 diff --git a/gcc/lra-int.h b/gcc/lra-int.h
10968 index 7af67f3..7262087 100644
10969 --- a/gcc/lra-int.h
10970 +++ b/gcc/lra-int.h
10971 @@ -312,7 +312,6 @@ extern bool lra_former_scratch_operand_p (rtx, int);
10972
10973 extern int lra_new_regno_start;
10974 extern int lra_constraint_new_regno_start;
10975 -extern int lra_bad_spill_regno_start;
10976 extern bitmap_head lra_inheritance_pseudos;
10977 extern bitmap_head lra_split_regs;
10978 extern bitmap_head lra_subreg_reload_pseudos;
10979 diff --git a/gcc/lra.c b/gcc/lra.c
10980 index ed23da3..69b08dc 100644
10981 --- a/gcc/lra.c
10982 +++ b/gcc/lra.c
10983 @@ -2215,10 +2215,6 @@ int lra_new_regno_start;
10984 /* Start of reload pseudo regnos before the new spill pass. */
10985 int lra_constraint_new_regno_start;
10986
10987 -/* Avoid spilling pseudos with regno more than the following value if
10988 - it is possible. */
10989 -int lra_bad_spill_regno_start;
10990 -
10991 /* Inheritance pseudo regnos before the new spill pass. */
10992 bitmap_head lra_inheritance_pseudos;
10993
10994 @@ -2310,7 +2306,6 @@ lra (FILE *f)
10995 permit changing reg classes for pseudos created by this
10996 simplification. */
10997 lra_constraint_new_regno_start = lra_new_regno_start = max_reg_num ();
10998 - lra_bad_spill_regno_start = INT_MAX;
10999 remove_scratches ();
11000 scratch_p = lra_constraint_new_regno_start != max_reg_num ();
11001
11002 @@ -2423,12 +2418,6 @@ lra (FILE *f)
11003 some eliminations. So update the offsets here. */
11004 lra_eliminate (false, false);
11005 lra_constraint_new_regno_start = max_reg_num ();
11006 - if (lra_bad_spill_regno_start == INT_MAX
11007 - && lra_inheritance_iter > LRA_MAX_INHERITANCE_PASSES)
11008 - /* After switching off inheritance and rematerialization
11009 - passes, avoid spilling reload pseudos will be created to
11010 - prevent LRA cycling in some complicated cases. */
11011 - lra_bad_spill_regno_start = lra_constraint_new_regno_start;
11012 lra_constraint_new_insn_uid_start = get_max_uid ();
11013 lra_assignment_iter_after_spill = 0;
11014 }
582411015 diff --git a/gcc/params.def b/gcc/params.def
582511016 index c656eaf..09af9fc 100644
582611017 --- a/gcc/params.def
585811049 NEXT_PASS (pass_phiopt);
585911050 NEXT_PASS (pass_tail_recursion);
586011051 NEXT_PASS (pass_ch);
5861 diff --git a/gcc/testsuite/ChangeLog.arm b/gcc/testsuite/ChangeLog.arm
5862 new file mode 100644
5863 index 0000000..3b85694
5864 --- /dev/null
5865 +++ b/gcc/testsuite/ChangeLog.arm
5866 @@ -0,0 +1,26 @@
5867 +2014-12-02 Terry Guo <terry.guo@arm.com>
5868 +
5869 + Backport from mainline r211817
5870 + 2014-06-19 Terry Guo <terry.guo@arm.com>
5871 +
5872 + * gcc.target/arm/thumb1-load-64bit-constant-1.c: New test.
5873 + * gcc.target/arm/thumb1-load-64bit-constant-2.c: Ditto.
5874 + * gcc.target/arm/thumb1-load-64bit-constant-3.c: Ditto.
5875 +
5876 +2014-11-10 Hale Wang <hale.wang@arm.com>
5877 +
5878 + Backport from mainline r217175
5879 + 2014-11-06 Hale Wang <hale.wang@arm.com>
5880 +
5881 + * gcc.target/arm/small-multiply-m0-1.c: New test for
5882 + target -mcpu=cortex-m0.small-multiply.
5883 + * gcc.target/arm/small-multiply-m0-2.c: Likewise.
5884 + * gcc.target/arm/small-multiply-m0-3.c: Likewise.
5885 + * gcc.target/arm/small-multiply-m0plus-1.c: New test for
5886 + target -mcpu=cortex-m0plus.small-multiply.
5887 + * gcc.target/arm/small-multiply-m0plus-2.c: Likewise.
5888 + * gcc.target/arm/small-multiply-m0plus-3.c: Likewise.
5889 + * gcc.target/arm/small-multiply-m1-1.c: New test for
5890 + target -mcpu=cortex-m1.small-multiply.
5891 + * gcc.target/arm/small-multiply-m1-2.c: Likewise.
5892 + * gcc.target/arm/small-multiply-m1-3.c: Likewise.
11052 diff --git a/gcc/recog.c b/gcc/recog.c
11053 index be305de..0481d7d 100644
11054 --- a/gcc/recog.c
11055 +++ b/gcc/recog.c
11056 @@ -2627,14 +2627,9 @@ constrain_operands (int strict)
11057 break;
11058 win = 1;
11059 }
11060 - /* Before reload, accept what reload can turn into a mem. */
11061 + /* Before reload, accept what reload can turn into mem. */
11062 else if (strict < 0 && CONSTANT_P (op))
11063 win = 1;
11064 - /* Before reload, accept a pseudo,
11065 - since LRA can turn it into a mem. */
11066 - else if (strict < 0 && targetm.lra_p () && REG_P (op)
11067 - && REGNO (op) >= FIRST_PSEUDO_REGISTER)
11068 - win = 1;
11069 /* During reload, accept a pseudo */
11070 else if (reload_in_progress && REG_P (op)
11071 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
11072 @@ -2713,10 +2708,6 @@ constrain_operands (int strict)
11073 /* Before reload, accept what reload can handle. */
11074 || (strict < 0
11075 && (CONSTANT_P (op) || MEM_P (op)))
11076 - /* Before reload, accept a pseudo,
11077 - since LRA can turn it into a mem. */
11078 - || (strict < 0 && targetm.lra_p () && REG_P (op)
11079 - && REGNO (op) >= FIRST_PSEUDO_REGISTER)
11080 /* During reload, accept a pseudo */
11081 || (reload_in_progress && REG_P (op)
11082 && REGNO (op) >= FIRST_PSEUDO_REGISTER))
11083 @@ -2748,12 +2739,8 @@ constrain_operands (int strict)
11084 /* Every memory operand can be reloaded to fit. */
11085 && ((strict < 0 && MEM_P (op))
11086 /* Before reload, accept what reload can turn
11087 - into a mem. */
11088 + into mem. */
11089 || (strict < 0 && CONSTANT_P (op))
11090 - /* Before reload, accept a pseudo,
11091 - since LRA can turn it into a mem. */
11092 - || (strict < 0 && targetm.lra_p () && REG_P (op)
11093 - && REGNO (op) >= FIRST_PSEUDO_REGISTER)
11094 /* During reload, accept a pseudo */
11095 || (reload_in_progress && REG_P (op)
11096 && REGNO (op) >= FIRST_PSEUDO_REGISTER)))
11097 diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
11098 index 037adef..04af01e 100644
11099 --- a/gcc/simplify-rtx.c
11100 +++ b/gcc/simplify-rtx.c
11101 @@ -3633,21 +3633,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
11102 while (GET_MODE (vec) != mode
11103 && GET_CODE (vec) == VEC_CONCAT)
11104 {
11105 - HOST_WIDE_INT vec_size;
11106 -
11107 - if (CONST_INT_P (XEXP (vec, 0)))
11108 - {
11109 - /* vec_concat of two const_ints doesn't make sense with
11110 - respect to modes. */
11111 - if (CONST_INT_P (XEXP (vec, 1)))
11112 - return 0;
11113 -
11114 - vec_size = GET_MODE_SIZE (GET_MODE (trueop0))
11115 - - GET_MODE_SIZE (GET_MODE (XEXP (vec, 1)));
11116 - }
11117 - else
11118 - vec_size = GET_MODE_SIZE (GET_MODE (XEXP (vec, 0)));
11119 -
11120 + HOST_WIDE_INT vec_size = GET_MODE_SIZE (GET_MODE (XEXP (vec, 0)));
11121 if (offset < vec_size)
11122 vec = XEXP (vec, 0);
11123 else
11124 diff --git a/gcc/testsuite/c-c++-common/ubsan/pr56917.c b/gcc/testsuite/c-c++-common/ubsan/pr56917.c
11125 deleted file mode 100644
11126 index 0eb8492..0000000
11127 --- a/gcc/testsuite/c-c++-common/ubsan/pr56917.c
11128 +++ /dev/null
11129 @@ -1,43 +0,0 @@
11130 -/* PR middle-end/56917 */
11131 -/* { dg-do run } */
11132 -/* { dg-options "-fsanitize=undefined" } */
11133 -
11134 -#include <stdio.h>
11135 -
11136 -#define INT_MIN (-__INT_MAX__ - 1)
11137 -#define LONG_MIN (-__LONG_MAX__ - 1L)
11138 -#define LLONG_MIN (-__LONG_LONG_MAX__ - 1LL)
11139 -
11140 -int __attribute__ ((noinline,noclone))
11141 -fn1 (unsigned int u)
11142 -{
11143 - return (-(int) (u - 1U)) - 1;
11144 -}
11145 -
11146 -long __attribute__ ((noinline,noclone))
11147 -fn2 (unsigned long int ul)
11148 -{
11149 - return (-(long) (ul - 1UL)) - 1L;
11150 -}
11151 -
11152 -long long __attribute__ ((noinline,noclone))
11153 -fn3 (unsigned long long int ull)
11154 -{
11155 - return (-(long long) (ull - 1ULL)) - 1LL;
11156 -}
11157 -
11158 -int
11159 -main (void)
11160 -{
11161 - fputs ("UBSAN TEST START\n", stderr);
11162 -
11163 - if (fn1 (__INT_MAX__ + 1U) != INT_MIN
11164 - || fn2 (__LONG_MAX__ + 1UL) != LONG_MIN
11165 - || fn3 (__LONG_LONG_MAX__ + 1ULL) != LLONG_MIN)
11166 - __builtin_abort ();
11167 -
11168 - fputs ("UBSAN TEST END\n", stderr);
11169 - return 0;
11170 -}
11171 -
11172 -/* { dg-output "UBSAN TEST START(\n|\r\n|\r)UBSAN TEST END" } */
11173 diff --git a/gcc/testsuite/g++.dg/abi/anon4.C b/gcc/testsuite/g++.dg/abi/anon4.C
11174 deleted file mode 100644
11175 index 088ba99..0000000
11176 --- a/gcc/testsuite/g++.dg/abi/anon4.C
11177 +++ /dev/null
11178 @@ -1,41 +0,0 @@
11179 -// PR c++/65209
11180 -// { dg-final { scan-assembler-not "comdat" } }
11181 -
11182 -// Everything involving the anonymous namespace bits should be private, not
11183 -// COMDAT.
11184 -
11185 -struct Bar
11186 -{
11187 - static Bar *self();
11188 - char pad[24];
11189 -};
11190 -
11191 -template <Bar *(&holderFunction)()>
11192 -struct BarGlobalStatic
11193 -{
11194 - Bar *operator()() { return holderFunction(); }
11195 -};
11196 -
11197 -namespace {
11198 - namespace Q_QGS_s_self {
11199 - inline Bar *innerFunction() {
11200 - static struct Holder {
11201 - Bar value;
11202 - ~Holder() {}
11203 - } holder;
11204 - return &holder.value;
11205 - }
11206 - }
11207 -}
11208 -static BarGlobalStatic<Q_QGS_s_self::innerFunction> s_self;
11209 -
11210 -Bar *Bar::self()
11211 -{
11212 - return s_self();
11213 -}
11214 -
11215 -int main(int argc, char *argv[])
11216 -{
11217 - Bar* bar = Bar::self();
11218 - return 0;
11219 -}
11220 diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-ptrmem4.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-ptrmem4.C
11221 deleted file mode 100644
11222 index 68788ca..0000000
11223 --- a/gcc/testsuite/g++.dg/cpp0x/constexpr-ptrmem4.C
11224 +++ /dev/null
11225 @@ -1,26 +0,0 @@
11226 -// PR c++/65695
11227 -// { dg-do compile { target c++11 } }
11228 -
11229 -struct Foo;
11230 -
11231 -struct Bar
11232 -{
11233 - using MemberFuncT = int (Foo::*)();
11234 -
11235 - MemberFuncT h_;
11236 - constexpr Bar(MemberFuncT h) : h_{h}
11237 - {
11238 - }
11239 -};
11240 -
11241 -struct Foo
11242 -{
11243 - int test()
11244 - {
11245 - return -1;
11246 - }
11247 -
11248 - static constexpr Bar bar {&Foo::test};
11249 -};
11250 -
11251 -constexpr Bar Foo::bar;
11252 diff --git a/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-decltype2.C b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-decltype2.C
11253 deleted file mode 100644
11254 index 51bf0ec..0000000
11255 --- a/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-decltype2.C
11256 +++ /dev/null
11257 @@ -1,25 +0,0 @@
11258 -// PR c++/65727
11259 -// { dg-do compile { target c++11 } }
11260 -
11261 -struct type_a { void(*cb)(); };
11262 -
11263 -struct type_b
11264 -{
11265 - type_b(type_a p);
11266 - void dummy();
11267 -};
11268 -
11269 -template<class T>
11270 -constexpr T function_c(T**t) {return **t;}
11271 -
11272 -class type_d {
11273 - public:
11274 - static void dummy();
11275 -};
11276 -class type_e {
11277 - public:
11278 - static type_b b;
11279 - type_d *d[1];
11280 -};
11281 -
11282 -type_b type_e::b = {{[](){decltype(function_c(type_e::d))::dummy();}}};
11283 diff --git a/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice3.C b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice3.C
11284 index 09e046f..03a7a4b 100644
11285 --- a/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice3.C
11286 +++ b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice3.C
11287 @@ -3,7 +3,7 @@
11288
11289 class Klass
11290 {
11291 - unsigned int local; // { dg-message "" }
11292 + unsigned int local;
11293 public:
11294 bool dostuff();
11295 };
11296 @@ -11,7 +11,7 @@ public:
11297 bool Klass::dostuff()
11298 {
11299 auto f = []() -> bool {
11300 - if (local & 1) { return true; } // { dg-error "" }
11301 + if (local & 1) { return true; } // { dg-error "not captured" }
11302 return false;
11303 };
11304 }
11305 diff --git a/gcc/testsuite/g++.dg/cpp1y/auto-fn26.C b/gcc/testsuite/g++.dg/cpp1y/auto-fn26.C
11306 deleted file mode 100644
11307 index c05c954..0000000
11308 --- a/gcc/testsuite/g++.dg/cpp1y/auto-fn26.C
11309 +++ /dev/null
11310 @@ -1,6 +0,0 @@
11311 -// PR c++/59766
11312 -// { dg-do compile { target c++1y } }
11313 -
11314 -struct T {
11315 - friend auto f() { }
11316 -};
11317 diff --git a/gcc/testsuite/g++.dg/gomp/tpl-target-update.C b/gcc/testsuite/g++.dg/gomp/tpl-target-update.C
11318 deleted file mode 100644
11319 index 6226ebf..0000000
11320 --- a/gcc/testsuite/g++.dg/gomp/tpl-target-update.C
11321 +++ /dev/null
11322 @@ -1,20 +0,0 @@
11323 -// { dg-do compile }
11324 -
11325 -template <typename T>
11326 -void f(T A, T B)
11327 -{
11328 - extern int *v;
11329 - T a = 2;
11330 - T b = 4;
11331 -
11332 -#pragma omp target update to(v[a:b])
11333 - v[a] = 0;
11334 -
11335 -#pragma omp target update to(v[A:B])
11336 - v[a] = 0;
11337 -}
11338 -
11339 -void g()
11340 -{
11341 - f(1, 5);
11342 -}
11343 diff --git a/gcc/testsuite/g++.dg/init/array39.C b/gcc/testsuite/g++.dg/init/array39.C
11344 deleted file mode 100644
11345 index 2fd8937..0000000
11346 --- a/gcc/testsuite/g++.dg/init/array39.C
11347 +++ /dev/null
11348 @@ -1,46 +0,0 @@
11349 -// PR c++/65154
11350 -// { dg-do run { target c++11 } }
11351 -
11352 -int cnt1 = 0,
11353 - cnt2 = 0;
11354 -
11355 -struct S_empty
11356 -{
11357 - S_empty () {
11358 - cnt1++;
11359 - };
11360 -};
11361 -
11362 -struct C1
11363 -{
11364 - S_empty s;
11365 -};
11366 -
11367 -struct S_init
11368 -{
11369 - S_init () : i(42)
11370 - {
11371 - cnt2++;
11372 - };
11373 - int i;
11374 -};
11375 -
11376 -struct C2
11377 -{
11378 - S_init a, b;
11379 -};
11380 -
11381 -int
11382 -main ()
11383 -{
11384 - C1 c1[5]{};
11385 - C2 c2[1]{};
11386 -
11387 - if (c2[0].a.i != 42 || c2[0].b.i != 42)
11388 - return 1;
11389 -
11390 - if (cnt1 != 5 || cnt2 != 2)
11391 - return 1;
11392 -
11393 - return 0;
11394 -}
11395 diff --git a/gcc/testsuite/g++.dg/ipa/pr63551.C b/gcc/testsuite/g++.dg/ipa/pr63551.C
11396 deleted file mode 100644
11397 index 03e0339..0000000
11398 --- a/gcc/testsuite/g++.dg/ipa/pr63551.C
11399 +++ /dev/null
11400 @@ -1,23 +0,0 @@
11401 -// { dg-options "-O -Wno-psabi" }
11402 -// { dg-do compile }
11403 -
11404 -struct A { int a; };
11405 -template <typename T, typename V> struct B { V operator[] (T); };
11406 -union U { long double ld; void *v; };
11407 -A a;
11408 -
11409 -void
11410 -bar (U &x)
11411 -{
11412 - if (x.v) *reinterpret_cast <A *>(x.v) = a;
11413 -}
11414 -
11415 -struct C { C (A) { c.ld = 0; bar (c); } U c; };
11416 -struct D { A d, e; void foo () { f[0][d] = e; } B <int, B <A, C> > f; };
11417 -
11418 -void
11419 -baz ()
11420 -{
11421 - D d;
11422 - d.foo ();
11423 -}
11424 diff --git a/gcc/testsuite/g++.dg/ipa/pr63587-1.C b/gcc/testsuite/g++.dg/ipa/pr63587-1.C
11425 deleted file mode 100644
11426 index cbf872e..0000000
11427 --- a/gcc/testsuite/g++.dg/ipa/pr63587-1.C
11428 +++ /dev/null
11429 @@ -1,92 +0,0 @@
11430 -// PR ipa/63587
11431 -// { dg-do compile { target c++11 } }
11432 -// { dg-options "-O2 -fno-strict-aliasing" }
11433 -
11434 -template <class> struct A
11435 -{
11436 -};
11437 -template <typename> struct B
11438 -{
11439 - template <typename> struct C;
11440 -};
11441 -class D;
11442 -template <typename> class F;
11443 -struct G
11444 -{
11445 - void operator()(const D &, D);
11446 -};
11447 -class D
11448 -{
11449 -public:
11450 - D (int);
11451 -};
11452 -struct H
11453 -{
11454 - H (int);
11455 -};
11456 -template <typename _Key, typename, typename, typename _Compare, typename>
11457 -class I
11458 -{
11459 - typedef _Key key_type;
11460 - template <typename _Key_compare> struct J
11461 - {
11462 - _Key_compare _M_key_compare;
11463 - };
11464 - J<_Compare> _M_impl;
11465 -
11466 -public:
11467 - A<int> _M_get_insert_unique_pos (const key_type &);
11468 - A<int> _M_get_insert_hint_unique_pos (H &);
11469 - template <typename... _Args> int _M_emplace_hint_unique (H, _Args &&...);
11470 -};
11471 -template <typename _Key, typename _Tp, typename _Compare = G,
11472 - typename _Alloc = F<A<_Tp> > >
11473 -class K
11474 -{
11475 - typedef _Key key_type;
11476 - typedef _Key value_type;
11477 - typedef typename B<_Alloc>::template C<value_type> _Pair_alloc_type;
11478 - I<key_type, value_type, int, _Compare, _Pair_alloc_type> _M_t;
11479 -
11480 -public:
11481 - void operator[](key_type)
11482 - {
11483 - _M_t._M_emplace_hint_unique (0);
11484 - }
11485 -};
11486 -template <typename _Key, typename _Val, typename _KeyOfValue,
11487 - typename _Compare, typename _Alloc>
11488 -A<int>
11489 -I<_Key, _Val, _KeyOfValue, _Compare, _Alloc>::_M_get_insert_unique_pos (
11490 - const key_type &p1)
11491 -{
11492 - _M_impl._M_key_compare (p1, 0);
11493 -}
11494 -template <typename _Key, typename _Val, typename _KeyOfValue,
11495 - typename _Compare, typename _Alloc>
11496 -A<int>
11497 -I<_Key, _Val, _KeyOfValue, _Compare, _Alloc>::_M_get_insert_hint_unique_pos (
11498 - H &)
11499 -{
11500 - _M_get_insert_unique_pos (0);
11501 -}
11502 -template <typename _Key, typename _Val, typename _KeyOfValue,
11503 - typename _Compare, typename _Alloc>
11504 -template <typename... _Args>
11505 -int
11506 -I<_Key, _Val, _KeyOfValue, _Compare, _Alloc>::_M_emplace_hint_unique (
11507 - H p1, _Args &&...)
11508 -{
11509 - _M_get_insert_hint_unique_pos (p1);
11510 -}
11511 -namespace {
11512 -struct L;
11513 -}
11514 -void
11515 -fn1 ()
11516 -{
11517 - K<D, L> a;
11518 - a[0];
11519 - K<D, int> b;
11520 - b[0];
11521 -}
11522 diff --git a/gcc/testsuite/g++.dg/ipa/pr63587-2.C b/gcc/testsuite/g++.dg/ipa/pr63587-2.C
11523 deleted file mode 100644
11524 index f31c5bd..0000000
11525 --- a/gcc/testsuite/g++.dg/ipa/pr63587-2.C
11526 +++ /dev/null
11527 @@ -1,250 +0,0 @@
11528 -// PR ipa/63587
11529 -// { dg-do compile { target c++11 } }
11530 -// { dg-options "-O2" }
11531 -
11532 -namespace boost {
11533 -class basic_cstring
11534 -{
11535 -public:
11536 - basic_cstring (char *);
11537 -};
11538 -template <typename> struct identity
11539 -{
11540 -};
11541 -struct make_identity;
11542 -struct function_buffer
11543 -{
11544 -};
11545 -template <typename FunctionObj> struct function_obj_invoker0
11546 -{
11547 - static int
11548 - invoke (function_buffer &)
11549 - {
11550 - FunctionObj f;
11551 - f ();
11552 - }
11553 -};
11554 -template <typename FunctionObj> struct get_function_obj_invoker0
11555 -{
11556 - typedef function_obj_invoker0<FunctionObj> type;
11557 -};
11558 -template <typename FunctionObj> struct apply
11559 -{
11560 - typedef typename get_function_obj_invoker0<FunctionObj>::type invoker_type;
11561 -};
11562 -struct basic_vtable0
11563 -{
11564 - typedef int (*invoker_type)(function_buffer &);
11565 - template <typename F> void assign_to (F, function_buffer);
11566 - invoker_type invoker;
11567 -};
11568 -class function0
11569 -{
11570 -public:
11571 - template <typename Functor> function0 (Functor)
11572 - {
11573 - typedef typename apply<Functor>::invoker_type invoker_type;
11574 - basic_vtable0 stored_vtable { invoker_type::invoke };
11575 - stored_vtable.assign_to (0, functor);
11576 - }
11577 - function_buffer functor;
11578 -};
11579 -class function : function0
11580 -{
11581 -public:
11582 - template <typename Functor> function (Functor f) : function0 (f) {}
11583 -};
11584 -class test_unit_generator
11585 -{
11586 -};
11587 -class test_case
11588 -{
11589 -public:
11590 - test_case (basic_cstring, basic_cstring, int, function);
11591 -};
11592 -struct auto_test_unit_registrar
11593 -{
11594 - auto_test_unit_registrar (test_unit_generator);
11595 -};
11596 -template <typename F> F unwrap (F, int);
11597 -struct for_each_impl
11598 -{
11599 - template <typename Iterator, typename LastIterator, typename TransformFunc,
11600 - typename F>
11601 - static void
11602 - execute (Iterator, LastIterator, TransformFunc, F f)
11603 - {
11604 - identity<char> __trans_tmp_1;
11605 - unwrap (f, 0)(__trans_tmp_1);
11606 - }
11607 -};
11608 -template <typename, typename, typename F>
11609 -void
11610 -for_each (F f)
11611 -{
11612 - for_each_impl::execute (0, 0, 0, f);
11613 -}
11614 -template <typename TestCaseTemplate> class test_case_template_invoker
11615 -{
11616 -public:
11617 - void operator()()
11618 - {
11619 - TestCaseTemplate::run (0);
11620 - }
11621 -};
11622 -template <typename Generator, typename TestCaseTemplate>
11623 -struct generate_test_case_4_type
11624 -{
11625 - generate_test_case_4_type (basic_cstring, basic_cstring, int, Generator G)
11626 - : m_test_case_name (0), m_test_case_file (0), m_holder (G)
11627 - {
11628 - }
11629 - template <typename TestType> void operator()(identity<TestType>)
11630 - {
11631 - test_case (0, 0, 0, test_case_template_invoker<TestCaseTemplate> ());
11632 - }
11633 - basic_cstring m_test_case_name;
11634 - basic_cstring m_test_case_file;
11635 - Generator m_holder;
11636 -};
11637 -template <typename TestCaseTemplate>
11638 -class template_test_case_gen : public test_unit_generator
11639 -{
11640 -public:
11641 - template_test_case_gen (basic_cstring, basic_cstring, int)
11642 - {
11643 - for_each<int, make_identity> (
11644 - generate_test_case_4_type<template_test_case_gen, TestCaseTemplate> (
11645 - 0, 0, 0, *this));
11646 - }
11647 -};
11648 -class attribute_name
11649 -{
11650 - int m_id;
11651 -
11652 -public:
11653 - attribute_name (char);
11654 -};
11655 -template <typename> struct term;
11656 -namespace exprns_ {
11657 -template <typename> struct expr;
11658 -}
11659 -using exprns_::expr;
11660 -template <typename T> struct Trans_NS_proto_terminal
11661 -{
11662 - typedef expr<term<T> > type;
11663 -};
11664 -namespace exprns_ {
11665 -template <typename Arg0> struct expr<term<Arg0> >
11666 -{
11667 - Arg0 child0;
11668 -};
11669 -}
11670 -template <typename Expr> struct actor
11671 -{
11672 - typename Trans_NS_proto_terminal<Expr>::type proto_expr_;
11673 -};
11674 -template <template <typename> class Actor = actor> struct terminal
11675 -{
11676 - typedef Actor<int> type;
11677 -};
11678 -namespace log {
11679 -struct to_log_fun
11680 -{
11681 -};
11682 -class value_extractor;
11683 -template <typename, typename = value_extractor, typename = void,
11684 - template <typename> class = actor>
11685 -class attribute_actor;
11686 -class attribute_terminal
11687 -{
11688 -public:
11689 - attribute_name m_name;
11690 - attribute_name
11691 - get_name ()
11692 - {
11693 - return m_name;
11694 - }
11695 -};
11696 -template <typename, typename, typename, template <typename> class ActorT>
11697 -class attribute_actor : ActorT<attribute_terminal>
11698 -{
11699 -public:
11700 - typedef int value_type;
11701 - attribute_name
11702 - get_name ()
11703 - {
11704 - return this->proto_expr_.child0.get_name ();
11705 - }
11706 -};
11707 -template <typename AttributeValueT>
11708 -attribute_actor<AttributeValueT> attr (attribute_name);
11709 -terminal<>::type stream;
11710 -template <typename LeftT, typename ImplT> class attribute_output_terminal
11711 -{
11712 -public:
11713 - template <typename U>
11714 - attribute_output_terminal (LeftT, attribute_name, ImplT, U);
11715 -};
11716 -template <typename LeftT> struct make_output_expression
11717 -{
11718 - typedef attribute_output_terminal<LeftT, to_log_fun> type;
11719 - template <typename RightT>
11720 - static type
11721 - make (LeftT left, RightT &right)
11722 - {
11723 - type (left, right.get_name (), to_log_fun (), 0);
11724 - }
11725 -};
11726 -template <typename, typename RightT, typename = typename RightT::value_type>
11727 -struct make_output_actor;
11728 -template <template <typename> class ActorT, typename LeftExprT,
11729 - typename RightT, typename ValueT>
11730 -struct make_output_actor<ActorT<LeftExprT>, RightT, ValueT>
11731 -{
11732 - typedef make_output_expression<ActorT<LeftExprT> > make_expression;
11733 - typedef ActorT<typename make_expression::type> type;
11734 - static type
11735 - make (ActorT<LeftExprT> left, RightT &right)
11736 - {
11737 - type { make_expression::make (left, right) };
11738 - }
11739 -};
11740 -template <typename LeftExprT, typename T, typename FallbackPolicyT,
11741 - typename TagT>
11742 -typename make_output_actor<actor<LeftExprT>, attribute_actor<TagT> >::type
11743 -operator<<(actor<LeftExprT> left,
11744 - attribute_actor<T, FallbackPolicyT, TagT> right)
11745 -{
11746 - make_output_actor<actor<LeftExprT>, attribute_actor<T> >::make (left, right);
11747 -}
11748 -}
11749 -}
11750 -namespace logging = boost::log;
11751 -namespace expr = logging;
11752 -namespace {
11753 -class my_class;
11754 -}
11755 -template <typename> struct default_formatting
11756 -{
11757 - void test_method ();
11758 -};
11759 -struct default_formatting_invoker
11760 -{
11761 - static void
11762 - run (void *)
11763 - {
11764 - default_formatting<int> t;
11765 - t.test_method ();
11766 - }
11767 -};
11768 -boost::auto_test_unit_registrar default_formatting_registrar56 (
11769 - boost::template_test_case_gen<default_formatting_invoker> (0, 0, 0));
11770 -template <typename CharT>
11771 -void
11772 -default_formatting<CharT>::test_method ()
11773 -{
11774 - expr::stream << expr::attr<my_class> (0);
11775 - expr::stream << expr::attr<int> (0) << expr::attr<int> (0)
11776 - << expr::attr<int> (0);
11777 -}
11778 diff --git a/gcc/testsuite/g++.dg/ipa/pr64896.C b/gcc/testsuite/g++.dg/ipa/pr64896.C
11779 deleted file mode 100644
11780 index 0a78220..0000000
11781 --- a/gcc/testsuite/g++.dg/ipa/pr64896.C
11782 +++ /dev/null
11783 @@ -1,29 +0,0 @@
11784 -// PR ipa/64896
11785 -// { dg-do compile }
11786 -// { dg-options "-O2" }
11787 -
11788 -struct A { int a, b; };
11789 -struct B { A c; int d; };
11790 -struct C { virtual B fn1 () const; };
11791 -struct D { B fn2 () const; int fn3 () const; C *fn4 () const; };
11792 -
11793 -int
11794 -D::fn3 () const
11795 -{
11796 - fn4 ()->fn1 ();
11797 -}
11798 -
11799 -B
11800 -D::fn2 () const
11801 -{
11802 - return B ();
11803 -}
11804 -
11805 -class F : C
11806 -{
11807 - B
11808 - fn1 () const
11809 - {
11810 - return B ();
11811 - }
11812 -};
11813 diff --git a/gcc/testsuite/g++.dg/lookup/using55.C b/gcc/testsuite/g++.dg/lookup/using55.C
11814 deleted file mode 100644
11815 index 61098b1..0000000
11816 --- a/gcc/testsuite/g++.dg/lookup/using55.C
11817 +++ /dev/null
11818 @@ -1,19 +0,0 @@
11819 -// PR c++/65721
11820 -
11821 -template<typename T>
11822 -struct A {
11823 - typedef T D;
11824 -};
11825 -
11826 -template<typename X>
11827 -class B : public A<X> {
11828 - using typename B::D; // { dg-error "not a base" }
11829 -public:
11830 - D echo(D x) { // { dg-error "D" }
11831 - return x;
11832 - }
11833 -};
11834 -
11835 -int main() {
11836 - B<int> b;
11837 -}
11838 diff --git a/gcc/testsuite/g++.dg/other/dump-ada-spec-3.C b/gcc/testsuite/g++.dg/other/dump-ada-spec-3.C
11839 deleted file mode 100644
11840 index ae4985c..0000000
11841 --- a/gcc/testsuite/g++.dg/other/dump-ada-spec-3.C
11842 +++ /dev/null
11843 @@ -1,24 +0,0 @@
11844 -/* { dg-do compile } */
11845 -/* { dg-options "-fdump-ada-spec" } */
11846 -
11847 -using namespace std;
11848 -
11849 -class Base {
11850 - public:
11851 - int My_V;
11852 - virtual void Primitive ();
11853 -
11854 - Base ();
11855 -};
11856 -
11857 -void Base::Primitive () {
11858 -}
11859 -
11860 -Base::Base () {
11861 -}
11862 -
11863 -void Dispatch (Base * B) {
11864 - B->Primitive ();
11865 -}
11866 -
11867 -/* { dg-final { cleanup-ada-spec } } */
11868 diff --git a/gcc/testsuite/g++.dg/pr64688-2.C b/gcc/testsuite/g++.dg/pr64688-2.C
11869 deleted file mode 100644
11870 index c4a22b8..0000000
11871 --- a/gcc/testsuite/g++.dg/pr64688-2.C
11872 +++ /dev/null
11873 @@ -1,136 +0,0 @@
11874 -// { dg-do compile { target i?86-*-* x86_64-*-* } }
11875 -// { dg-options "-std=c++11 -O3 -march=westmere" }
11876 -
11877 -template <int> struct int_ {};
11878 -template <typename> struct add_const { typedef int type; };
11879 -template <typename> struct add_reference { typedef int type; };
11880 -template <typename T> struct next { typedef typename T::next type; };
11881 -template <typename> struct size_impl;
11882 -template <typename T> struct msvc_eti_base : T {};
11883 -template <int N> struct long_ {
11884 - static const int value = N;
11885 - typedef long_<N + 1> next;
11886 -};
11887 -template <typename Sequence>
11888 -struct size : msvc_eti_base<typename size_impl<
11889 -typename Sequence::tag>::template apply<Sequence>> {};
11890 -template <typename Base> struct v_item : Base {
11891 - typedef typename next<typename Base::size>::type size;
11892 -};
11893 -template <typename = int> struct vector0 {
11894 - typedef int tag;
11895 - typedef long_<0> size;
11896 -};
11897 -template <> struct size_impl<int> {
11898 - template <typename Vector> struct apply : Vector::size {};
11899 -};
11900 -template <typename> struct vector3 : v_item<v_item<v_item<vector0<>>>> {};
11901 -template <typename> struct layout { typedef vector3<int> color_space_t; };
11902 -template <typename> struct kth_element_const_reference_type;
11903 -template <typename> struct iterator_adaptor_get_base;
11904 -template <typename, typename, int> struct homogeneous_color_base;
11905 -template <typename> struct element_const_reference_type;
11906 -template <typename Element, typename Layout>
11907 - struct homogeneous_color_base<Element, Layout, 3> {
11908 - Element _v0, _v1, _v2;
11909 - typename element_const_reference_type<homogeneous_color_base>::type
11910 - at(int_<0>) {
11911 - return _v0;
11912 - }
11913 - typename element_const_reference_type<homogeneous_color_base>::type
11914 - at(int_<1>) {
11915 - return _v1;
11916 - }
11917 - typename element_const_reference_type<homogeneous_color_base>::type
11918 - at(int_<2>) {
11919 - return _v2;
11920 - }
11921 -};
11922 -template <typename Element, typename Layout, int K1>
11923 - struct kth_element_const_reference_type<
11924 - homogeneous_color_base<Element, Layout, K1>>
11925 - : add_reference<typename add_const<Element>::type> {};
11926 -template <int K, typename E, typename L, int N>
11927 - typename add_reference<typename add_const<E>::type>::type
11928 - at_c(homogeneous_color_base<E, L, N> p1) {
11929 - return p1.at(int_<K>());
11930 -}
11931 -template <typename> class memory_based_step_iterator;
11932 -template <typename> class memory_based_2d_locator;
11933 -template <typename> class image_view;
11934 -template <typename, typename> struct pixel;
11935 -struct iterator_type_from_pixel {
11936 - typedef pixel<unsigned char, layout<vector3<int>>> *type;
11937 -};
11938 -template <typename XIterator> struct type_from_x_iterator {
11939 - typedef image_view<
11940 - memory_based_2d_locator<memory_based_step_iterator<XIterator>>> view_t;
11941 -};
11942 -template <typename>
11943 -struct element_const_reference_type
11944 -: kth_element_const_reference_type<
11945 -homogeneous_color_base<unsigned, layout<int>, 3>> {};
11946 -template <typename, typename>
11947 - struct pixel : homogeneous_color_base<unsigned char, layout<int>,
11948 - size<layout<int>::color_space_t>::value> {
11949 -};
11950 -template <typename Iterator>
11951 -struct iterator_adaptor_get_base<memory_based_step_iterator<Iterator>> {
11952 - typedef Iterator type;
11953 -};
11954 -template <typename> class memory_based_2d_locator {
11955 - public:
11956 - typedef iterator_adaptor_get_base<memory_based_step_iterator<
11957 - pixel<unsigned, layout<vector3<int>>> *>>::type x_iterator;
11958 -};
11959 -template <typename> class image_view {
11960 - public:
11961 - typedef memory_based_2d_locator<int>::x_iterator x_iterator;
11962 - x_iterator row_begin___trans_tmp_2;
11963 - x_iterator row_begin(int) { return row_begin___trans_tmp_2; }
11964 -};
11965 -template <typename, bool, typename = int> class image {
11966 - public:
11967 - typedef type_from_x_iterator<iterator_type_from_pixel::type>::view_t view_t;
11968 - image(int);
11969 -};
11970 -template <typename Pixel, bool IsPlanar, typename Alloc>
11971 - typename image<Pixel, 0>::view_t view(image<Pixel, IsPlanar, Alloc>);
11972 -template <typename Op> void measure_time(Op p1) {
11973 - for (;;)
11974 - p1();
11975 -}
11976 -template <typename, typename> struct fill_nongil_t;
11977 -template <typename T, typename P>
11978 - struct fill_nongil_t<
11979 - image_view<memory_based_2d_locator<
11980 - memory_based_step_iterator<pixel<T, layout<vector3<int>>> *>>>,
11981 - P> {
11982 - typedef image_view<memory_based_2d_locator<
11983 - memory_based_step_iterator<pixel<T, layout<vector3<int>>> *>>> View;
11984 - View _v;
11985 - P _p;
11986 - fill_nongil_t(View p1, P) : _v(p1) {}
11987 - void operator()() {
11988 - T *first = (T *)_v.row_begin(0);
11989 - T last;
11990 - while (first != &last) {
11991 - first[0] = at_c<0>(_p);
11992 - first[1] = at_c<1>(_p);
11993 - first[2] = at_c<2>(_p);
11994 - first += 3;
11995 - }
11996 - }
11997 -};
11998 -template <typename, typename> void test_fill(int) {
11999 - image<int, 0>::view_t __trans_tmp_1;
12000 - image<int, 0> im(0);
12001 - __trans_tmp_1 = view(im);
12002 - measure_time(fill_nongil_t<
12003 - image_view<memory_based_2d_locator<memory_based_step_iterator<
12004 - pixel<unsigned char, layout<vector3<int>>> *>>>,
12005 - pixel<unsigned, int>>(__trans_tmp_1, pixel<unsigned, int>()));
12006 -}
12007 -void performance_testtest_method() {
12008 - test_fill<image_view<int>, pixel<unsigned, int>>(0);
12009 -}
12010 diff --git a/gcc/testsuite/g++.dg/pr65049.C b/gcc/testsuite/g++.dg/pr65049.C
12011 deleted file mode 100644
12012 index 7ced500..0000000
12013 --- a/gcc/testsuite/g++.dg/pr65049.C
12014 +++ /dev/null
12015 @@ -1,19 +0,0 @@
12016 -// PR middle-end/65409
12017 -// Reported by Ignacy Gawedzki <bugs@qult.net>
12018 -
12019 -struct Foo
12020 -{
12021 - Foo() {}
12022 - int a;
12023 - int b;
12024 - char c;
12025 -};
12026 -
12027 -Foo copy_foo(Foo);
12028 -
12029 -struct Bar : Foo
12030 -{
12031 - Bar(Foo t) : Foo(copy_foo(t)) {}
12032 -};
12033 -
12034 -Bar a = Foo();
12035 diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-24.c b/gcc/testsuite/gcc.dg/vect/bb-slp-24.c
12036 index 67a6017..d0c1d69 100644
12037 --- a/gcc/testsuite/gcc.dg/vect/bb-slp-24.c
12038 +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-24.c
12039 @@ -54,8 +54,6 @@ int main (void)
12040 return 0;
12041 }
12042
12043 -/* Exclude POWER8 (only POWER cpu for which vect_element_align is true)
12044 - because loops have vectorized before SLP gets a shot. */
12045 -/* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp" { target { vect_element_align && { ! powerpc*-*-* } } } } } */
12046 +/* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp" { target vect_element_align } } } */
12047 /* { dg-final { cleanup-tree-dump "slp" } } */
12048
12049 diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-25.c b/gcc/testsuite/gcc.dg/vect/bb-slp-25.c
12050 index edd17ec..737b3b0 100644
12051 --- a/gcc/testsuite/gcc.dg/vect/bb-slp-25.c
12052 +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-25.c
12053 @@ -54,8 +54,6 @@ int main (void)
12054 return 0;
12055 }
12056
12057 -/* Exclude POWER8 (only POWER cpu for which vect_element_align is true)
12058 - because loops have vectorized before SLP gets a shot. */
12059 -/* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp" { target { vect_element_align && { ! powerpc*-*-* } } } } } */
12060 +/* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp" { target vect_element_align } } } */
12061 /* { dg-final { cleanup-tree-dump "slp" } } */
12062
12063 diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-29.c b/gcc/testsuite/gcc.dg/vect/bb-slp-29.c
12064 index 17f5c83..c5b3134 100644
12065 --- a/gcc/testsuite/gcc.dg/vect/bb-slp-29.c
12066 +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-29.c
12067 @@ -54,8 +54,6 @@ int main (void)
12068 return 0;
12069 }
12070
12071 -/* Exclude POWER8 (only POWER cpu for which vect_element_align is true)
12072 - because loops have vectorized before SLP gets a shot. */
12073 -/* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp" { target { { vect_int_mult && vect_element_align } && { ! powerpc*-*-* } } } } } */
12074 +/* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp" { target { vect_int_mult && vect_element_align } } } } */
12075 /* { dg-final { cleanup-tree-dump "slp" } } */
12076
12077 diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-32.c b/gcc/testsuite/gcc.dg/vect/bb-slp-32.c
12078 index 09232ef..6d69d15 100644
12079 --- a/gcc/testsuite/gcc.dg/vect/bb-slp-32.c
12080 +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-32.c
12081 @@ -19,5 +19,5 @@ int foo (int *p)
12082 return tem0 + tem1 + tem2 + tem3;
12083 }
12084
12085 -/* { dg-final { scan-tree-dump "vectorization is not profitable" "slp" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12086 +/* { dg-final { scan-tree-dump "vectorization is not profitable" "slp" { xfail vect_no_align } } } */
12087 /* { dg-final { cleanup-tree-dump "slp" } } */
12088 diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-9.c b/gcc/testsuite/gcc.dg/vect/bb-slp-9.c
12089 index f1c10e4..9f1a587 100644
12090 --- a/gcc/testsuite/gcc.dg/vect/bb-slp-9.c
12091 +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-9.c
12092 @@ -46,6 +46,6 @@ int main (void)
12093 return 0;
12094 }
12095
12096 -/* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12097 +/* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp" { xfail vect_no_align } } } */
12098 /* { dg-final { cleanup-tree-dump "slp" } } */
12099
12100 diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c
12101 deleted file mode 100644
12102 index 73c0afa..0000000
12103 --- a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c
12104 +++ /dev/null
12105 @@ -1,30 +0,0 @@
12106 -/* { dg-require-effective-target vect_int } */
12107 -/* { dg-do compile } */
12108 -
12109 -#define N 16
12110 -
12111 -const unsigned int in[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
12112 -unsigned int out[N];
12113 -
12114 -__attribute__ ((noinline)) int
12115 -main1 (void)
12116 -{
12117 - const unsigned int *pin = &in[1];
12118 - unsigned int *pout = &out[0];
12119 -
12120 - /* Misaligned load. */
12121 - *pout++ = *pin++;
12122 - *pout++ = *pin++;
12123 - *pout++ = *pin++;
12124 - *pout++ = *pin++;
12125 -
12126 - return 0;
12127 -}
12128 -
12129 -/* Verify that the assembly contains vector instructions alone
12130 - with no word loads (lw, lwu, lwz, lwzu, or their indexed forms)
12131 - or word stores (stw, stwu, stwx, stwux, or their indexed forms). */
12132 -
12133 -/* { dg-final { scan-assembler "\t\(lxv|lvsr|stxv\)" } } */
12134 -/* { dg-final { scan-assembler-not "\tlwz?u?x? " } } */
12135 -/* { dg-final { scan-assembler-not "\tstwu?x? " } } */
12136 diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a.c b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a.c
12137 index f0e302a..4e8d71b 100644
12138 --- a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a.c
12139 +++ b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a.c
12140 @@ -1,5 +1,6 @@
12141 /* { dg-require-effective-target vect_int } */
12142
12143 +#include <stdarg.h>
12144 #include "../../tree-vect.h"
12145
12146 #define N 16
12147 @@ -8,10 +9,12 @@ unsigned int out[N];
12148 unsigned int in[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
12149
12150 __attribute__ ((noinline)) int
12151 -main1 (void)
12152 +main1 (unsigned int x, unsigned int y)
12153 {
12154 + int i;
12155 unsigned int *pin = &in[1];
12156 unsigned int *pout = &out[0];
12157 + unsigned int a0, a1, a2, a3;
12158
12159 /* Misaligned load. */
12160 *pout++ = *pin++;
12161 @@ -19,6 +22,13 @@ main1 (void)
12162 *pout++ = *pin++;
12163 *pout++ = *pin++;
12164
12165 + /* Check results. */
12166 + if (out[0] != in[1]
12167 + || out[1] != in[2]
12168 + || out[2] != in[3]
12169 + || out[3] != in[4])
12170 + abort();
12171 +
12172 return 0;
12173 }
12174
12175 @@ -26,18 +36,11 @@ int main (void)
12176 {
12177 check_vect ();
12178
12179 - main1 ();
12180 -
12181 - /* Check results. */
12182 - if (out[0] != in[1]
12183 - || out[1] != in[2]
12184 - || out[2] != in[3]
12185 - || out[3] != in[4])
12186 - abort();
12187 + main1 (2, 3);
12188
12189 return 0;
12190 }
12191
12192 -/* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12193 +/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 1 "slp" { xfail vect_no_align } } } */
12194 /* { dg-final { cleanup-tree-dump "slp" } } */
12195
12196 diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-33.c b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-33.c
12197 index 9bc3ea5..9cae12f 100644
12198 --- a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-33.c
12199 +++ b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-33.c
12200 @@ -41,5 +41,5 @@ int main (void)
12201 }
12202
12203 /* { dg-final { scan-tree-dump-times "vectorization not profitable" 1 "vect" } } */
12204 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_hw_misalign } } } } */
12205 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */
12206 /* { dg-final { cleanup-tree-dump "vect" } } */
12207 diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c
12208 index 161497f..272b3f0 100644
12209 --- a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c
12210 +++ b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c
12211 @@ -47,5 +47,5 @@ int main (void)
12212 }
12213
12214 /* { dg-final { scan-tree-dump-times "vectorization not profitable" 1 "vect" } } */
12215 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_hw_misalign } } } } */
12216 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */
12217 /* { dg-final { cleanup-tree-dump "vect" } } */
12218 diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76b.c b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76b.c
12219 index 2d1ee97..d716b61 100644
12220 --- a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76b.c
12221 +++ b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76b.c
12222 @@ -43,8 +43,8 @@ int main (void)
12223 }
12224
12225 /* Peeling to align the store is used. Overhead of peeling is too high. */
12226 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { vector_alignment_reachable && {! vect_no_align} } } } } */
12227 -/* { dg-final { scan-tree-dump-times "vectorization not profitable" 1 "vect" { target { vector_alignment_reachable && {! vect_hw_misalign} } } } } */
12228 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target vector_alignment_reachable } } } */
12229 +/* { dg-final { scan-tree-dump-times "vectorization not profitable" 1 "vect" { target { vector_alignment_reachable && {! vect_no_align} } } } } */
12230
12231 /* Versioning to align the store is used. Overhead of versioning is not too high. */
12232 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_no_align || {! vector_alignment_reachable} } } } } */
12233 diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-outer-fir.c b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-outer-fir.c
12234 index 5123950..efab046 100644
12235 --- a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-outer-fir.c
12236 +++ b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-outer-fir.c
12237 @@ -67,5 +67,5 @@ int main (void)
12238 return 0;
12239 }
12240
12241 -/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12242 +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" { xfail vect_no_align } } } */
12243 /* { dg-final { cleanup-tree-dump "vect" } } */
12244 diff --git a/gcc/testsuite/gcc.dg/vect/if-cvt-stores-vect-ifcvt-18.c b/gcc/testsuite/gcc.dg/vect/if-cvt-stores-vect-ifcvt-18.c
12245 index cdf687a..38906a9 100644
12246 --- a/gcc/testsuite/gcc.dg/vect/if-cvt-stores-vect-ifcvt-18.c
12247 +++ b/gcc/testsuite/gcc.dg/vect/if-cvt-stores-vect-ifcvt-18.c
12248 @@ -65,5 +65,5 @@ main (void)
12249 return 0;
12250 }
12251
12252 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || { ! vect_strided2 } } } } } */
12253 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align || { ! vect_strided2 } } } } } */
12254 /* { dg-final { cleanup-tree-dump "vect" } } */
12255 diff --git a/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-6-global.c b/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-6-global.c
12256 index 4aa4a5e..9447524 100644
12257 --- a/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-6-global.c
12258 +++ b/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-6-global.c
12259 @@ -52,5 +52,5 @@ int main (void)
12260 return 0;
12261 }
12262
12263 -/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12264 +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail vect_no_align } } } */
12265 /* { dg-final { cleanup-tree-dump "vect" } } */
12266 diff --git a/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-6.c b/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-6.c
12267 index 187a78c..70cf520 100644
12268 --- a/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-6.c
12269 +++ b/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-6.c
12270 @@ -51,6 +51,6 @@ int main (void)
12271 return 0;
12272 }
12273
12274 -/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { unaligned_stack || { vect_no_align && { ! vect_hw_misalign } } } } } } */
12275 +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { unaligned_stack || vect_no_align } } } } */
12276 /* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" { xfail *-*-* } } } */
12277 /* { dg-final { cleanup-tree-dump "vect" } } */
12278 diff --git a/gcc/testsuite/gcc.dg/vect/no-vfa-vect-43.c b/gcc/testsuite/gcc.dg/vect/no-vfa-vect-43.c
12279 index d09cd41..16a01d1 100644
12280 --- a/gcc/testsuite/gcc.dg/vect/no-vfa-vect-43.c
12281 +++ b/gcc/testsuite/gcc.dg/vect/no-vfa-vect-43.c
12282 @@ -90,5 +90,5 @@ int main (void)
12283 }
12284
12285 /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 2 "vect" } } */
12286 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 6 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12287 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 6 "vect" { target vect_no_align } } } */
12288 /* { dg-final { cleanup-tree-dump "vect" } } */
12289 diff --git a/gcc/testsuite/gcc.dg/vect/no-vfa-vect-57.c b/gcc/testsuite/gcc.dg/vect/no-vfa-vect-57.c
12290 index fd4288c..63d332a 100644
12291 --- a/gcc/testsuite/gcc.dg/vect/no-vfa-vect-57.c
12292 +++ b/gcc/testsuite/gcc.dg/vect/no-vfa-vect-57.c
12293 @@ -71,5 +71,5 @@ int main (void)
12294 return 0;
12295 }
12296
12297 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12298 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_align } } } */
12299 /* { dg-final { cleanup-tree-dump "vect" } } */
12300 diff --git a/gcc/testsuite/gcc.dg/vect/no-vfa-vect-61.c b/gcc/testsuite/gcc.dg/vect/no-vfa-vect-61.c
12301 index 8b1b6c6..2df45fd 100644
12302 --- a/gcc/testsuite/gcc.dg/vect/no-vfa-vect-61.c
12303 +++ b/gcc/testsuite/gcc.dg/vect/no-vfa-vect-61.c
12304 @@ -73,5 +73,5 @@ int main (void)
12305 return 0;
12306 }
12307
12308 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12309 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_align } } } */
12310 /* { dg-final { cleanup-tree-dump "vect" } } */
12311 diff --git a/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-1.c b/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-1.c
12312 index 2be1604..5679ff7 100644
12313 --- a/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-1.c
12314 +++ b/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-1.c
12315 @@ -50,7 +50,7 @@ int main (void)
12316 return main1 ();
12317 }
12318
12319 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" {xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12320 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" {xfail vect_no_align } } } */
12321 /* { dg-final { scan-tree-dump-times "dependence distance negative" 1 "vect" } } */
12322 /* { dg-final { cleanup-tree-dump "vect" } } */
12323
12324 diff --git a/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-2.c b/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-2.c
12325 index 54f66ea..f84528a 100644
12326 --- a/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-2.c
12327 +++ b/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-2.c
12328 @@ -50,6 +50,6 @@ int main (void)
12329 return main1 ();
12330 }
12331
12332 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" {xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12333 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" {xfail vect_no_align } } } */
12334 /* { dg-final { scan-tree-dump-times "dependence distance negative" 1 "vect" } } */
12335 /* { dg-final { cleanup-tree-dump "vect" } } */
12336 diff --git a/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-3.c b/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-3.c
12337 index 8a3dd54..8f937a0 100644
12338 --- a/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-3.c
12339 +++ b/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-3.c
12340 @@ -182,6 +182,6 @@ int main ()
12341 return main1 ();
12342 }
12343
12344 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" {xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12345 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" {xfail vect_no_align } } } */
12346 /* { dg-final { scan-tree-dump-times "dependence distance negative" 4 "vect" } } */
12347 /* { dg-final { cleanup-tree-dump "vect" } } */
12348 diff --git a/gcc/testsuite/gcc.dg/vect/pr16105.c b/gcc/testsuite/gcc.dg/vect/pr16105.c
12349 index 50c16c4..c59fe05 100644
12350 --- a/gcc/testsuite/gcc.dg/vect/pr16105.c
12351 +++ b/gcc/testsuite/gcc.dg/vect/pr16105.c
12352 @@ -18,5 +18,5 @@ void square(const float * __restrict__ a,
12353 }
12354
12355 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12356 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12357 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { target vect_no_align } } } */
12358 /* { dg-final { cleanup-tree-dump "vect" } } */
12359 diff --git a/gcc/testsuite/gcc.dg/vect/pr20122.c b/gcc/testsuite/gcc.dg/vect/pr20122.c
12360 index c9c523c..9d21fc6 100644
12361 --- a/gcc/testsuite/gcc.dg/vect/pr20122.c
12362 +++ b/gcc/testsuite/gcc.dg/vect/pr20122.c
12363 @@ -52,5 +52,5 @@ int main (int argc, char **argv)
12364 /* The loops in VecBug and VecBug2 require versioning for alignment.
12365 The loop in main is aligned. */
12366 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 3 "vect" } } */
12367 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12368 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { target vect_no_align } } } */
12369 /* { dg-final { cleanup-tree-dump "vect" } } */
12370 diff --git a/gcc/testsuite/gcc.dg/vect/pr33804.c b/gcc/testsuite/gcc.dg/vect/pr33804.c
12371 index c7f3b6f..a4fb386 100644
12372 --- a/gcc/testsuite/gcc.dg/vect/pr33804.c
12373 +++ b/gcc/testsuite/gcc.dg/vect/pr33804.c
12374 @@ -11,6 +11,6 @@ void f(unsigned char *s, unsigned char *d, int n) {
12375 }
12376 }
12377
12378 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12379 -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12380 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_align } } } */
12381 +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail vect_no_align } } } */
12382 /* { dg-final { cleanup-tree-dump "vect" } } */
12383 diff --git a/gcc/testsuite/gcc.dg/vect/pr33953.c b/gcc/testsuite/gcc.dg/vect/pr33953.c
12384 index 3a88269..f501a45 100644
12385 --- a/gcc/testsuite/gcc.dg/vect/pr33953.c
12386 +++ b/gcc/testsuite/gcc.dg/vect/pr33953.c
12387 @@ -28,8 +28,8 @@ void blockmove_NtoN_blend_noremap32 (const UINT32 *srcdata, int srcwidth,
12388 }
12389 }
12390
12391 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12392 -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12393 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" {xfail vect_no_align } } } */
12394 +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" {xfail vect_no_align } } } */
12395 /* { dg-final { cleanup-tree-dump "vect" } } */
12396
12397
12398 diff --git a/gcc/testsuite/gcc.dg/vect/pr56787.c b/gcc/testsuite/gcc.dg/vect/pr56787.c
12399 index 0b09c86..77fe4d8 100644
12400 --- a/gcc/testsuite/gcc.dg/vect/pr56787.c
12401 +++ b/gcc/testsuite/gcc.dg/vect/pr56787.c
12402 @@ -31,5 +31,5 @@ foo (unsigned long n, const float *__restrict u0,
12403 }
12404 }
12405
12406 -/* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12407 +/* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail vect_no_align } } } */
12408 /* { dg-final { cleanup-tree-dump "vect" } } */
12409 diff --git a/gcc/testsuite/gcc.dg/vect/pr58508.c b/gcc/testsuite/gcc.dg/vect/pr58508.c
12410 index 60c68be..80ba9cc 100644
12411 --- a/gcc/testsuite/gcc.dg/vect/pr58508.c
12412 +++ b/gcc/testsuite/gcc.dg/vect/pr58508.c
12413 @@ -67,5 +67,5 @@ void test5 (int* a, int* b)
12414 }
12415
12416 /* { dg-final { scan-tree-dump-times "hoist" 8 "vect" { xfail *-*-* } } } */
12417 -/* { dg-final { scan-tree-dump-times "hoist" 3 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12418 +/* { dg-final { scan-tree-dump-times "hoist" 3 "vect" { xfail vect_no_align } } } */
12419 /* { dg-final { cleanup-tree-dump "vect" } } */
12420 diff --git a/gcc/testsuite/gcc.dg/vect/slp-25.c b/gcc/testsuite/gcc.dg/vect/slp-25.c
12421 index d69be28..e5e5e3b 100644
12422 --- a/gcc/testsuite/gcc.dg/vect/slp-25.c
12423 +++ b/gcc/testsuite/gcc.dg/vect/slp-25.c
12424 @@ -56,5 +56,5 @@ int main (void)
12425
12426 /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
12427 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
12428 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || { ! vect_natural_alignment } } } } } */
12429 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail { vect_no_align || { ! vect_natural_alignment } } } } } */
12430 /* { dg-final { cleanup-tree-dump "vect" } } */
12431 diff --git a/gcc/testsuite/gcc.dg/vect/vect-105-big-array.c b/gcc/testsuite/gcc.dg/vect/vect-105-big-array.c
12432 index 0a4746e..f99a2af 100644
12433 --- a/gcc/testsuite/gcc.dg/vect/vect-105-big-array.c
12434 +++ b/gcc/testsuite/gcc.dg/vect/vect-105-big-array.c
12435 @@ -100,7 +100,7 @@ int main (void)
12436 }
12437
12438 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12439 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12440 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { target vect_no_align } } } */
12441 /* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 0 "vect" } } */
12442 /* { dg-final { cleanup-tree-dump "vect" } } */
12443
12444 diff --git a/gcc/testsuite/gcc.dg/vect/vect-105.c b/gcc/testsuite/gcc.dg/vect/vect-105.c
12445 index 79d31c1..bbf42af 100644
12446 --- a/gcc/testsuite/gcc.dg/vect/vect-105.c
12447 +++ b/gcc/testsuite/gcc.dg/vect/vect-105.c
12448 @@ -66,7 +66,7 @@ int main (void)
12449 }
12450
12451 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12452 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12453 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { target vect_no_align } } } */
12454 /* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 0 "vect" } } */
12455 /* { dg-final { cleanup-tree-dump "vect" } } */
12456
12457 diff --git a/gcc/testsuite/gcc.dg/vect/vect-27.c b/gcc/testsuite/gcc.dg/vect/vect-27.c
12458 index 36c23fa..4a2da22 100644
12459 --- a/gcc/testsuite/gcc.dg/vect/vect-27.c
12460 +++ b/gcc/testsuite/gcc.dg/vect/vect-27.c
12461 @@ -43,8 +43,8 @@ int main (void)
12462 }
12463
12464 /* The initialization induction loop (with aligned access) is also vectorized. */
12465 -/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12466 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12467 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12468 +/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { xfail vect_no_align } } } */
12469 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_no_align } } } */
12470 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail vect_no_align } } } */
12471 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
12472 /* { dg-final { cleanup-tree-dump "vect" } } */
12473 diff --git a/gcc/testsuite/gcc.dg/vect/vect-29.c b/gcc/testsuite/gcc.dg/vect/vect-29.c
12474 index 6e62ee9..0ad2848 100644
12475 --- a/gcc/testsuite/gcc.dg/vect/vect-29.c
12476 +++ b/gcc/testsuite/gcc.dg/vect/vect-29.c
12477 @@ -50,7 +50,7 @@ int main (void)
12478
12479 /* The initialization induction loop (with aligned access) is also vectorized. */
12480 /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
12481 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12482 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail vect_no_align } } } */
12483 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
12484 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" {target { vect_no_align && { ! vect_hw_misalign } } } } } */
12485 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" {target vect_no_align } } } */
12486 /* { dg-final { cleanup-tree-dump "vect" } } */
12487 diff --git a/gcc/testsuite/gcc.dg/vect/vect-33.c b/gcc/testsuite/gcc.dg/vect/vect-33.c
12488 index d4126af..43daaa8 100644
12489 --- a/gcc/testsuite/gcc.dg/vect/vect-33.c
12490 +++ b/gcc/testsuite/gcc.dg/vect/vect-33.c
12491 @@ -38,7 +38,7 @@ int main (void)
12492
12493
12494 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12495 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target { ! vect_hw_misalign } } } } */
12496 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
12497 /* { dg-final { scan-tree-dump "Alignment of access forced using peeling" "vect" { target vector_alignment_reachable } } } */
12498 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } } */
12499 /* { dg-final { cleanup-tree-dump "vect" } } */
12500 diff --git a/gcc/testsuite/gcc.dg/vect/vect-42.c b/gcc/testsuite/gcc.dg/vect/vect-42.c
12501 index 6781ece..3181081 100644
12502 --- a/gcc/testsuite/gcc.dg/vect/vect-42.c
12503 +++ b/gcc/testsuite/gcc.dg/vect/vect-42.c
12504 @@ -64,7 +64,7 @@ int main (void)
12505 }
12506
12507 /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
12508 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 3 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12509 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 3 "vect" { target vect_no_align } } } */
12510 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { { ! vector_alignment_reachable } && { ! vect_element_align } } } } } */
12511 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" { xfail { vect_no_align || { { ! vector_alignment_reachable } || vect_element_align } } } } } */
12512 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 3 "vect" { target vect_element_align } } } */
12513 diff --git a/gcc/testsuite/gcc.dg/vect/vect-44.c b/gcc/testsuite/gcc.dg/vect/vect-44.c
12514 index 70f28db..ef1a463 100644
12515 --- a/gcc/testsuite/gcc.dg/vect/vect-44.c
12516 +++ b/gcc/testsuite/gcc.dg/vect/vect-44.c
12517 @@ -65,8 +65,8 @@ int main (void)
12518 two loads to be aligned). */
12519
12520 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12521 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12522 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || {! vector_alignment_reachable} } } } } */
12523 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 3 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12524 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align } } } } */
12525 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align || {! vector_alignment_reachable} } } } } */
12526 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 3 "vect" { target vect_no_align } } } */
12527 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { {! vector_alignment_reachable} && {{! vect_no_align} && {! vect_hw_misalign} } } } } } */
12528 /* { dg-final { cleanup-tree-dump "vect" } } */
12529 diff --git a/gcc/testsuite/gcc.dg/vect/vect-48.c b/gcc/testsuite/gcc.dg/vect/vect-48.c
12530 index 5da9737..d2eed3a 100644
12531 --- a/gcc/testsuite/gcc.dg/vect/vect-48.c
12532 +++ b/gcc/testsuite/gcc.dg/vect/vect-48.c
12533 @@ -55,7 +55,7 @@ int main (void)
12534 (The store is aligned). */
12535
12536 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12537 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12538 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail vect_no_align } } } */
12539 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
12540 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 2 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12541 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 2 "vect" { target vect_no_align } } } */
12542 /* { dg-final { cleanup-tree-dump "vect" } } */
12543 diff --git a/gcc/testsuite/gcc.dg/vect/vect-50.c b/gcc/testsuite/gcc.dg/vect/vect-50.c
12544 index 98ccf9a..068c804 100644
12545 --- a/gcc/testsuite/gcc.dg/vect/vect-50.c
12546 +++ b/gcc/testsuite/gcc.dg/vect/vect-50.c
12547 @@ -61,9 +61,9 @@ int main (void)
12548 align the store will not force the two loads to be aligned). */
12549
12550 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12551 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12552 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align } } } } */
12553 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { target vect_hw_misalign } } } */
12554 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || {! vector_alignment_reachable} } } } } */
12555 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 3 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12556 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align || {! vector_alignment_reachable} } } } } */
12557 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 3 "vect" { target vect_no_align } } } */
12558 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { {! vector_alignment_reachable} && { {! vect_no_align } && {! vect_hw_misalign } } } } } } */
12559 /* { dg-final { cleanup-tree-dump "vect" } } */
12560 diff --git a/gcc/testsuite/gcc.dg/vect/vect-52.c b/gcc/testsuite/gcc.dg/vect/vect-52.c
12561 index c7cf6ab..69c0979 100644
12562 --- a/gcc/testsuite/gcc.dg/vect/vect-52.c
12563 +++ b/gcc/testsuite/gcc.dg/vect/vect-52.c
12564 @@ -56,7 +56,7 @@ int main (void)
12565 (The store is aligned). */
12566
12567 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12568 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12569 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail vect_no_align } } } */
12570 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
12571 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 2 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12572 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 2 "vect" { target vect_no_align } } } */
12573 /* { dg-final { cleanup-tree-dump "vect" } } */
12574 diff --git a/gcc/testsuite/gcc.dg/vect/vect-56.c b/gcc/testsuite/gcc.dg/vect/vect-56.c
12575 index ced829e..5a8130b 100644
12576 --- a/gcc/testsuite/gcc.dg/vect/vect-56.c
12577 +++ b/gcc/testsuite/gcc.dg/vect/vect-56.c
12578 @@ -67,7 +67,7 @@ int main (void)
12579 return 0;
12580 }
12581
12582 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12583 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_align } } } */
12584 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align || vect_element_align } } } } */
12585 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { vect_element_align } } } } */
12586 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" { xfail { vect_element_align } } } } */
12587 diff --git a/gcc/testsuite/gcc.dg/vect/vect-60.c b/gcc/testsuite/gcc.dg/vect/vect-60.c
12588 index 8cfb8d9..838a9bc 100644
12589 --- a/gcc/testsuite/gcc.dg/vect/vect-60.c
12590 +++ b/gcc/testsuite/gcc.dg/vect/vect-60.c
12591 @@ -68,7 +68,7 @@ int main (void)
12592 return 0;
12593 }
12594
12595 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12596 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_align } } } */
12597 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align || vect_element_align } } } } */
12598 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { vect_element_align } } } } */
12599 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" { xfail { vect_element_align } } } } */
12600 diff --git a/gcc/testsuite/gcc.dg/vect/vect-72.c b/gcc/testsuite/gcc.dg/vect/vect-72.c
12601 index 5d23178..67a1975 100644
12602 --- a/gcc/testsuite/gcc.dg/vect/vect-72.c
12603 +++ b/gcc/testsuite/gcc.dg/vect/vect-72.c
12604 @@ -45,7 +45,7 @@ int main (void)
12605 return main1 ();
12606 }
12607
12608 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12609 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12610 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_align } } } */
12611 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail vect_no_align } } } */
12612 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
12613 /* { dg-final { cleanup-tree-dump "vect" } } */
12614 diff --git a/gcc/testsuite/gcc.dg/vect/vect-75-big-array.c b/gcc/testsuite/gcc.dg/vect/vect-75-big-array.c
12615 index 3524fa9..1c70cc2 100644
12616 --- a/gcc/testsuite/gcc.dg/vect/vect-75-big-array.c
12617 +++ b/gcc/testsuite/gcc.dg/vect/vect-75-big-array.c
12618 @@ -52,6 +52,6 @@ int main (void)
12619
12620
12621 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12622 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12623 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12624 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target vect_no_align } } } */
12625 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail vect_no_align } } } */
12626 /* { dg-final { cleanup-tree-dump "vect" } } */
12627 diff --git a/gcc/testsuite/gcc.dg/vect/vect-75.c b/gcc/testsuite/gcc.dg/vect/vect-75.c
12628 index 35336b9..092a301 100644
12629 --- a/gcc/testsuite/gcc.dg/vect/vect-75.c
12630 +++ b/gcc/testsuite/gcc.dg/vect/vect-75.c
12631 @@ -44,6 +44,6 @@ int main (void)
12632
12633
12634 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12635 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12636 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12637 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target vect_no_align } } } */
12638 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail vect_no_align } } } */
12639 /* { dg-final { cleanup-tree-dump "vect" } } */
12640 diff --git a/gcc/testsuite/gcc.dg/vect/vect-77-alignchecks.c b/gcc/testsuite/gcc.dg/vect/vect-77-alignchecks.c
12641 index 56a2197..4a05874 100644
12642 --- a/gcc/testsuite/gcc.dg/vect/vect-77-alignchecks.c
12643 +++ b/gcc/testsuite/gcc.dg/vect/vect-77-alignchecks.c
12644 @@ -49,8 +49,8 @@ int main (void)
12645 both for the load and the store. */
12646
12647 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12648 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12649 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align } } } } */
12650 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target { {! vect_no_align} && { unaligned_stack && vector_alignment_reachable } } } } } */
12651 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { { {! unaligned_stack} && { vect_no_align && { ! vect_hw_misalign } } } || {unaligned_stack && { {! vector_alignment_reachable} && {! vect_no_align } } } } } } } */
12652 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { { {! unaligned_stack} && vect_no_align } || {unaligned_stack && { {! vector_alignment_reachable} && {! vect_no_align} } } } } } } */
12653 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 2 "vect" { target { { unaligned_stack && { vector_alignment_reachable && vect_no_align } } || {unaligned_stack && { {! vector_alignment_reachable} && vect_no_align } } } } } } */
12654 /* { dg-final { cleanup-tree-dump "vect" } } */
12655 diff --git a/gcc/testsuite/gcc.dg/vect/vect-77-global.c b/gcc/testsuite/gcc.dg/vect/vect-77-global.c
12656 index 6236caf..ac29d7d 100644
12657 --- a/gcc/testsuite/gcc.dg/vect/vect-77-global.c
12658 +++ b/gcc/testsuite/gcc.dg/vect/vect-77-global.c
12659 @@ -47,7 +47,7 @@ int main (void)
12660 /* Requires versioning for aliasing. */
12661
12662 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12663 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12664 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align } } } } */
12665 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
12666 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12667 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target vect_no_align } } } */
12668 /* { dg-final { cleanup-tree-dump "vect" } } */
12669 diff --git a/gcc/testsuite/gcc.dg/vect/vect-78-alignchecks.c b/gcc/testsuite/gcc.dg/vect/vect-78-alignchecks.c
12670 index d420707..71c01ae 100644
12671 --- a/gcc/testsuite/gcc.dg/vect/vect-78-alignchecks.c
12672 +++ b/gcc/testsuite/gcc.dg/vect/vect-78-alignchecks.c
12673 @@ -50,8 +50,8 @@ int main (void)
12674 both for the load and the store. */
12675
12676 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12677 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12678 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align } } } } */
12679 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target { {! vect_no_align} && { unaligned_stack && vector_alignment_reachable } } } } } */
12680 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { { {! unaligned_stack} && { vect_no_align && { ! vect_hw_misalign } } } || {unaligned_stack && { {! vector_alignment_reachable} && { ! vect_no_align } } } } } } } */
12681 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { { {! unaligned_stack} && vect_no_align } || {unaligned_stack && { {! vector_alignment_reachable} && {! vect_no_align} } } } } } } */
12682 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 2 "vect" { target { { unaligned_stack && { vector_alignment_reachable && vect_no_align } } || {unaligned_stack && { {! vector_alignment_reachable} && vect_no_align } } } } } } */
12683 /* { dg-final { cleanup-tree-dump "vect" } } */
12684 diff --git a/gcc/testsuite/gcc.dg/vect/vect-78-global.c b/gcc/testsuite/gcc.dg/vect/vect-78-global.c
12685 index 22065bf..ec6520f 100644
12686 --- a/gcc/testsuite/gcc.dg/vect/vect-78-global.c
12687 +++ b/gcc/testsuite/gcc.dg/vect/vect-78-global.c
12688 @@ -47,7 +47,7 @@ int main (void)
12689 (The store is aligned). */
12690
12691 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12692 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12693 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align } } } } */
12694 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
12695 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12696 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target vect_no_align } } } */
12697 /* { dg-final { cleanup-tree-dump "vect" } } */
12698 diff --git a/gcc/testsuite/gcc.dg/vect/vect-93.c b/gcc/testsuite/gcc.dg/vect/vect-93.c
12699 index 52ba1ca..65403eb 100644
12700 --- a/gcc/testsuite/gcc.dg/vect/vect-93.c
12701 +++ b/gcc/testsuite/gcc.dg/vect/vect-93.c
12702 @@ -76,10 +76,10 @@ int main (void)
12703
12704 /* in main1: */
12705 /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target !powerpc*-*-* !i?86-*-* !x86_64-*-* } } } */
12706 -/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12707 +/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target vect_no_align } } } */
12708
12709 /* in main: */
12710 -/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12711 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12712 +/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target vect_no_align } } } */
12713 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align } } } } */
12714
12715 /* { dg-final { cleanup-tree-dump "vect" } } */
12716 diff --git a/gcc/testsuite/gcc.dg/vect/vect-95.c b/gcc/testsuite/gcc.dg/vect/vect-95.c
12717 index be560a6..c03d196 100644
12718 --- a/gcc/testsuite/gcc.dg/vect/vect-95.c
12719 +++ b/gcc/testsuite/gcc.dg/vect/vect-95.c
12720 @@ -64,6 +64,6 @@ int main (void)
12721
12722 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align || vect_element_align} } } } */
12723 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { xfail { vect_no_align || vect_element_align } } } } */
12724 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12725 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 4 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12726 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target vect_no_align } } } */
12727 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 4 "vect" { target vect_no_align } } } */
12728 /* { dg-final { cleanup-tree-dump "vect" } } */
12729 diff --git a/gcc/testsuite/gcc.dg/vect/vect-96.c b/gcc/testsuite/gcc.dg/vect/vect-96.c
12730 index 7d8c92a..0060d4e 100644
12731 --- a/gcc/testsuite/gcc.dg/vect/vect-96.c
12732 +++ b/gcc/testsuite/gcc.dg/vect/vect-96.c
12733 @@ -46,5 +46,5 @@ int main (void)
12734 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12735 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { {! vect_no_align} && vector_alignment_reachable } } } } */
12736 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align } || { { ! vector_alignment_reachable} || vect_element_align } } } } } */
12737 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { { vect_no_align && { ! vect_hw_misalign } } || { {! vector_alignment_reachable} && {! vect_element_align} } } } } } */
12738 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { vect_no_align || { {! vector_alignment_reachable} && {! vect_element_align} } } } } } */
12739 /* { dg-final { cleanup-tree-dump "vect" } } */
12740 diff --git a/gcc/testsuite/gcc.dg/vect/vect-cond-1.c b/gcc/testsuite/gcc.dg/vect/vect-cond-1.c
12741 index bd2d2fb..e42752f 100644
12742 --- a/gcc/testsuite/gcc.dg/vect/vect-cond-1.c
12743 +++ b/gcc/testsuite/gcc.dg/vect/vect-cond-1.c
12744 @@ -51,7 +51,7 @@ int main (void)
12745 return 0;
12746 }
12747
12748 -/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12749 +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail vect_no_align } } } */
12750 /* { dg-final { cleanup-tree-dump "vect" } } */
12751
12752
12753 diff --git a/gcc/testsuite/gcc.dg/vect/vect-cond-3.c b/gcc/testsuite/gcc.dg/vect/vect-cond-3.c
12754 index 0f36e84..32ebf0f 100644
12755 --- a/gcc/testsuite/gcc.dg/vect/vect-cond-3.c
12756 +++ b/gcc/testsuite/gcc.dg/vect/vect-cond-3.c
12757 @@ -59,7 +59,7 @@ int main (void)
12758 return 0;
12759 }
12760
12761 -/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12762 +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail vect_no_align } } } */
12763 /* { dg-final { cleanup-tree-dump "vect" } } */
12764
12765
12766 diff --git a/gcc/testsuite/gcc.dg/vect/vect-cond-4.c b/gcc/testsuite/gcc.dg/vect/vect-cond-4.c
12767 index 9a6e117..3c37c68 100644
12768 --- a/gcc/testsuite/gcc.dg/vect/vect-cond-4.c
12769 +++ b/gcc/testsuite/gcc.dg/vect/vect-cond-4.c
12770 @@ -56,7 +56,7 @@ int main (void)
12771 return 0;
12772 }
12773
12774 -/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12775 +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail vect_no_align } } } */
12776 /* { dg-final { cleanup-tree-dump "vect" } } */
12777
12778
12779 diff --git a/gcc/testsuite/gcc.dg/vect/vect-cselim-1.c b/gcc/testsuite/gcc.dg/vect/vect-cselim-1.c
12780 index ce2db7d..3c21918 100644
12781 --- a/gcc/testsuite/gcc.dg/vect/vect-cselim-1.c
12782 +++ b/gcc/testsuite/gcc.dg/vect/vect-cselim-1.c
12783 @@ -82,5 +82,5 @@ main (void)
12784 return 0;
12785 }
12786
12787 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || { ! vect_strided2 } } } } } */
12788 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align || { ! vect_strided2 } } } } } */
12789 /* { dg-final { cleanup-tree-dump "vect" } } */
12790 diff --git a/gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c b/gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c
12791 index 7fbfa3c..7ab21f1 100644
12792 --- a/gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c
12793 +++ b/gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c
12794 @@ -80,8 +80,8 @@ int main (void)
12795 return 0;
12796 }
12797
12798 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12799 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail {{ vect_no_align && { ! vect_hw_misalign } } || {vect_sizes_32B_16B }}} } } */
12800 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" { xfail {{ vect_no_align && { ! vect_hw_misalign } } || {vect_sizes_32B_16B }}} } } */
12801 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail { vect_no_align } } } } */
12802 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail {{ vect_no_align } || {vect_sizes_32B_16B }}} } } */
12803 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" { xfail {{ vect_no_align } || {vect_sizes_32B_16B }}} } } */
12804 /* { dg-final { cleanup-tree-dump "vect" } } */
12805
12806 diff --git a/gcc/testsuite/gcc.dg/vect/vect-multitypes-3.c b/gcc/testsuite/gcc.dg/vect/vect-multitypes-3.c
12807 index 2fdd4b7..93796d0 100644
12808 --- a/gcc/testsuite/gcc.dg/vect/vect-multitypes-3.c
12809 +++ b/gcc/testsuite/gcc.dg/vect/vect-multitypes-3.c
12810 @@ -54,7 +54,7 @@ int main (void)
12811 }
12812
12813 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
12814 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 3 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12815 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 3 "vect" {xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12816 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 3 "vect" { target vect_no_align } } } */
12817 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 3 "vect" {xfail { vect_no_align } } } } */
12818 /* { dg-final { cleanup-tree-dump "vect" } } */
12819
12820 diff --git a/gcc/testsuite/gcc.dg/vect/vect-multitypes-4.c b/gcc/testsuite/gcc.dg/vect/vect-multitypes-4.c
12821 index 44891af..ed6ac6e 100644
12822 --- a/gcc/testsuite/gcc.dg/vect/vect-multitypes-4.c
12823 +++ b/gcc/testsuite/gcc.dg/vect/vect-multitypes-4.c
12824 @@ -91,7 +91,7 @@ int main (void)
12825 return 0;
12826 }
12827
12828 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12829 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail { vect_no_align } } } } */
12830 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" { target { vect_element_align} } } } */
12831 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail { vect_no_align || vect_element_align } } } } */
12832 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 8 "vect" { xfail { vect_no_align || vect_element_align } } } } */
12833 diff --git a/gcc/testsuite/gcc.dg/vect/vect-multitypes-6.c b/gcc/testsuite/gcc.dg/vect/vect-multitypes-6.c
12834 index a337ca4..7f72785 100644
12835 --- a/gcc/testsuite/gcc.dg/vect/vect-multitypes-6.c
12836 +++ b/gcc/testsuite/gcc.dg/vect/vect-multitypes-6.c
12837 @@ -61,7 +61,7 @@ int main (void)
12838 }
12839
12840 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { sparc*-*-* && ilp32 } }} } */
12841 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 6 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
12842 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 6 "vect" {xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12843 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 6 "vect" { target vect_no_align } } } */
12844 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 6 "vect" {xfail { vect_no_align } } } } */
12845 /* { dg-final { cleanup-tree-dump "vect" } } */
12846
12847 diff --git a/gcc/testsuite/gcc.dg/vect/vect-nest-cycle-1.c b/gcc/testsuite/gcc.dg/vect/vect-nest-cycle-1.c
12848 index 588751e..84883ca 100644
12849 --- a/gcc/testsuite/gcc.dg/vect/vect-nest-cycle-1.c
12850 +++ b/gcc/testsuite/gcc.dg/vect/vect-nest-cycle-1.c
12851 @@ -43,6 +43,6 @@ int main ()
12852 return 0;
12853 }
12854
12855 -/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12856 +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail vect_no_align } } } */
12857 /* { dg-final { cleanup-tree-dump "vect" } } */
12858
12859 diff --git a/gcc/testsuite/gcc.dg/vect/vect-nest-cycle-2.c b/gcc/testsuite/gcc.dg/vect/vect-nest-cycle-2.c
12860 index 247d327..22b1d98 100644
12861 --- a/gcc/testsuite/gcc.dg/vect/vect-nest-cycle-2.c
12862 +++ b/gcc/testsuite/gcc.dg/vect/vect-nest-cycle-2.c
12863 @@ -42,6 +42,6 @@ int main ()
12864 return 0;
12865 }
12866
12867 -/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12868 +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail vect_no_align } } } */
12869 /* { dg-final { cleanup-tree-dump "vect" } } */
12870
12871 diff --git a/gcc/testsuite/gcc.dg/vect/vect-outer-3a-big-array.c b/gcc/testsuite/gcc.dg/vect/vect-outer-3a-big-array.c
12872 index a3e5ed8..ecb2d90 100644
12873 --- a/gcc/testsuite/gcc.dg/vect/vect-outer-3a-big-array.c
12874 +++ b/gcc/testsuite/gcc.dg/vect/vect-outer-3a-big-array.c
12875 @@ -48,6 +48,6 @@ int main (void)
12876 return 0;
12877 }
12878
12879 -/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12880 +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail vect_no_align } } } */
12881 /* { dg-final { scan-tree-dump-times "step doesn't divide the vector-size" 1 "vect" } } */
12882 /* { dg-final { cleanup-tree-dump "vect" } } */
12883 diff --git a/gcc/testsuite/gcc.dg/vect/vect-outer-3a.c b/gcc/testsuite/gcc.dg/vect/vect-outer-3a.c
12884 index 186d853..d0b4f80 100644
12885 --- a/gcc/testsuite/gcc.dg/vect/vect-outer-3a.c
12886 +++ b/gcc/testsuite/gcc.dg/vect/vect-outer-3a.c
12887 @@ -48,6 +48,6 @@ int main (void)
12888 return 0;
12889 }
12890
12891 -/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12892 +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail vect_no_align } } } */
12893 /* { dg-final { scan-tree-dump-times "step doesn't divide the vector-size" 1 "vect" } } */
12894 /* { dg-final { cleanup-tree-dump "vect" } } */
12895 diff --git a/gcc/testsuite/gcc.dg/vect/vect-outer-5.c b/gcc/testsuite/gcc.dg/vect/vect-outer-5.c
12896 index f0cdcae..2d37d6d 100644
12897 --- a/gcc/testsuite/gcc.dg/vect/vect-outer-5.c
12898 +++ b/gcc/testsuite/gcc.dg/vect/vect-outer-5.c
12899 @@ -78,5 +78,5 @@ int main ()
12900 is known. */
12901 /* { dg-final { scan-tree-dump-times "not vectorized: possible dependence between data-refs" 1 "vect" { xfail *-*-* } } } */
12902 /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
12903 -/* { dg-final { scan-tree-dump "zero step in outer loop." "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12904 +/* { dg-final { scan-tree-dump "zero step in outer loop." "vect" { xfail vect_no_align } } } */
12905 /* { dg-final { cleanup-tree-dump "vect" } } */
12906 diff --git a/gcc/testsuite/gcc.dg/vect/vect-outer-fir-big-array.c b/gcc/testsuite/gcc.dg/vect/vect-outer-fir-big-array.c
12907 index 07db614..c69b7d7 100644
12908 --- a/gcc/testsuite/gcc.dg/vect/vect-outer-fir-big-array.c
12909 +++ b/gcc/testsuite/gcc.dg/vect/vect-outer-fir-big-array.c
12910 @@ -70,5 +70,5 @@ int main (void)
12911 return 0;
12912 }
12913
12914 -/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12915 +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" { xfail vect_no_align } } } */
12916 /* { dg-final { cleanup-tree-dump "vect" } } */
12917 diff --git a/gcc/testsuite/gcc.dg/vect/vect-outer-fir-lb-big-array.c b/gcc/testsuite/gcc.dg/vect/vect-outer-fir-lb-big-array.c
12918 index 505eef5..5ac62ac 100644
12919 --- a/gcc/testsuite/gcc.dg/vect/vect-outer-fir-lb-big-array.c
12920 +++ b/gcc/testsuite/gcc.dg/vect/vect-outer-fir-lb-big-array.c
12921 @@ -74,5 +74,5 @@ int main (void)
12922 return 0;
12923 }
12924
12925 -/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12926 +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" { xfail vect_no_align } } } */
12927 /* { dg-final { cleanup-tree-dump "vect" } } */
12928 diff --git a/gcc/testsuite/gcc.dg/vect/vect-outer-fir-lb.c b/gcc/testsuite/gcc.dg/vect/vect-outer-fir-lb.c
12929 index c1732d9..3c1a362 100644
12930 --- a/gcc/testsuite/gcc.dg/vect/vect-outer-fir-lb.c
12931 +++ b/gcc/testsuite/gcc.dg/vect/vect-outer-fir-lb.c
12932 @@ -74,5 +74,5 @@ int main (void)
12933 return 0;
12934 }
12935
12936 -/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12937 +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" { xfail vect_no_align } } } */
12938 /* { dg-final { cleanup-tree-dump "vect" } } */
12939 diff --git a/gcc/testsuite/gcc.dg/vect/vect-outer-fir.c b/gcc/testsuite/gcc.dg/vect/vect-outer-fir.c
12940 index fa10263..af787b9 100644
12941 --- a/gcc/testsuite/gcc.dg/vect/vect-outer-fir.c
12942 +++ b/gcc/testsuite/gcc.dg/vect/vect-outer-fir.c
12943 @@ -70,5 +70,5 @@ int main (void)
12944 return 0;
12945 }
12946
12947 -/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12948 +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" { xfail vect_no_align } } } */
12949 /* { dg-final { cleanup-tree-dump "vect" } } */
12950 diff --git a/gcc/testsuite/gcc.dg/vect/vect-peel-3.c b/gcc/testsuite/gcc.dg/vect/vect-peel-3.c
12951 index 312947a..5aab805 100644
12952 --- a/gcc/testsuite/gcc.dg/vect/vect-peel-3.c
12953 +++ b/gcc/testsuite/gcc.dg/vect/vect-peel-3.c
12954 @@ -47,7 +47,7 @@ int main (void)
12955 return main1 ();
12956 }
12957
12958 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12959 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || {vect_sizes_32B_16B } } } } } */
12960 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || {vect_sizes_32B_16B } } } } } */
12961 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_align } } } */
12962 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { { vect_no_align } || {vect_sizes_32B_16B } } } } } */
12963 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align } || {vect_sizes_32B_16B } } } } } */
12964 /* { dg-final { cleanup-tree-dump "vect" } } */
12965 diff --git a/gcc/testsuite/gcc.dg/vect/vect-peel-4.c b/gcc/testsuite/gcc.dg/vect/vect-peel-4.c
12966 index 53871c8..dffb858 100644
12967 --- a/gcc/testsuite/gcc.dg/vect/vect-peel-4.c
12968 +++ b/gcc/testsuite/gcc.dg/vect/vect-peel-4.c
12969 @@ -44,7 +44,7 @@ int main (void)
12970 return main1 ();
12971 }
12972
12973 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12974 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12975 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_align } } } */
12976 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail vect_no_align } } } */
12977 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
12978 /* { dg-final { cleanup-tree-dump "vect" } } */
12979 diff --git a/gcc/testsuite/gcc.dg/vect/vect-pre-interact.c b/gcc/testsuite/gcc.dg/vect/vect-pre-interact.c
12980 index 8b7a72b..096839f 100644
12981 --- a/gcc/testsuite/gcc.dg/vect/vect-pre-interact.c
12982 +++ b/gcc/testsuite/gcc.dg/vect/vect-pre-interact.c
12983 @@ -12,5 +12,5 @@ void foo (void)
12984 res[i] = data[i] + data[i + 1];
12985 }
12986
12987 -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
12988 +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_align } } } */
12989 /* { dg-final { cleanup-tree-dump "vect" } } */
12990 diff --git a/gcc/testsuite/gcc.target/aarch64/pr64304.c b/gcc/testsuite/gcc.target/aarch64/pr64304.c
12991 deleted file mode 100644
12992 index 721b6b9..0000000
12993 --- a/gcc/testsuite/gcc.target/aarch64/pr64304.c
12994 +++ /dev/null
12995 @@ -1,18 +0,0 @@
12996 -/* { dg-do compile } */
12997 -/* { dg-options "-O2 --save-temps" } */
12998 -
12999 -unsigned char byte = 0;
13000 -
13001 -void
13002 -set_bit (unsigned int bit, unsigned char value)
13003 -{
13004 - unsigned char mask = (unsigned char) (1 << (bit & 7));
13005 -
13006 - if (! value)
13007 - byte &= (unsigned char)~mask;
13008 - else
13009 - byte |= mask;
13010 - /* { dg-final { scan-assembler "and\tw\[0-9\]+, w\[0-9\]+, 7" } } */
13011 -}
13012 -
13013 -/* { dg-final { cleanup-saved-temps } } */
13014 diff --git a/gcc/testsuite/gcc.target/aarch64/pr65235_1.c b/gcc/testsuite/gcc.target/aarch64/pr65235_1.c
13015 deleted file mode 100644
13016 index ca12cd5..0000000
13017 --- a/gcc/testsuite/gcc.target/aarch64/pr65235_1.c
13018 +++ /dev/null
13019 @@ -1,30 +0,0 @@
13020 -/* { dg-do run } */
13021 -/* { dg-options "-O2" } */
13022 -
13023 -#include "arm_neon.h"
13024 -
13025 -int
13026 -main (int argc, char** argv)
13027 -{
13028 - int64x1_t val1;
13029 - int64x1_t val2;
13030 - int64x1_t val3;
13031 - uint64x1_t val13;
13032 - uint64x2_t val14;
13033 - uint64_t got;
13034 - uint64_t exp;
13035 - val1 = vcreate_s64(UINT64_C(0xffffffff80008000));
13036 - val2 = vcreate_s64(UINT64_C(0x0000f38d00000000));
13037 - val3 = vcreate_s64(UINT64_C(0xffff7fff0000809b));
13038 - /* Expect: "val13" = 8000000000001553. */
13039 - val13 = vcreate_u64 (UINT64_C(0x8000000000001553));
13040 - /* Expect: "val14" = 0010 0000 0000 0002 0000 0000 0000 0000. */
13041 - val14 = vcombine_u64(vcgt_s64(vqrshl_s64(val1, val2),
13042 - vshr_n_s64(val3, 18)),
13043 - vshr_n_u64(val13, 11));
13044 - /* Should be 0000000000000000. */
13045 - got = vgetq_lane_u64(val14, 0);
13046 - exp = 0;
13047 - if(exp != got)
13048 - __builtin_abort ();
13049 -}
13050 diff --git a/gcc/testsuite/gcc.target/aarch64/symbol-range-tiny.c b/gcc/testsuite/gcc.target/aarch64/symbol-range-tiny.c
13051 deleted file mode 100644
13052 index d7d2039..0000000
13053 --- a/gcc/testsuite/gcc.target/aarch64/symbol-range-tiny.c
13054 +++ /dev/null
13055 @@ -1,13 +0,0 @@
13056 -/* { dg-do compile } */
13057 -/* { dg-options "-O3 -save-temps -mcmodel=tiny" } */
13058 -
13059 -int fixed_regs[0x00200000];
13060 -
13061 -int
13062 -foo()
13063 -{
13064 - return fixed_regs[0x00080000];
13065 -}
13066 -
13067 -/* { dg-final { scan-assembler-not "adr\tx\[0-9\]+, fixed_regs\\\+" } } */
13068 -/* { dg-final {cleanup-saved-temps } } */
13069 diff --git a/gcc/testsuite/gcc.target/aarch64/symbol-range.c b/gcc/testsuite/gcc.target/aarch64/symbol-range.c
13070 deleted file mode 100644
13071 index f999bb3..0000000
13072 --- a/gcc/testsuite/gcc.target/aarch64/symbol-range.c
13073 +++ /dev/null
13074 @@ -1,13 +0,0 @@
13075 -/* { dg-do compile } */
13076 -/* { dg-options "-O3 -save-temps -mcmodel=small" } */
13077 -
13078 -int fixed_regs[0x200000000ULL];
13079 -
13080 -int
13081 -foo()
13082 -{
13083 - return fixed_regs[0x100000000ULL];
13084 -}
13085 -
13086 -/* { dg-final { scan-assembler-not "adrp\tx\[0-9\]+, fixed_regs\\\+" } } */
13087 -/* { dg-final {cleanup-saved-temps } } */
13088 diff --git a/gcc/testsuite/gcc.target/arm/constant-pool.c b/gcc/testsuite/gcc.target/arm/constant-pool.c
13089 deleted file mode 100644
13090 index 8427dfb..0000000
13091 --- a/gcc/testsuite/gcc.target/arm/constant-pool.c
13092 +++ /dev/null
13093 @@ -1,27 +0,0 @@
13094 -/* { dg-do run } */
13095 -/* { dg-options "-O1" } */
13096 -
13097 -unsigned short v = 0x5678;
13098 -int i;
13099 -int j = 0;
13100 -int *ptr = &j;
13101 -
13102 -int
13103 -func (void)
13104 -{
13105 - for (i = 0; i < 1; ++i)
13106 - {
13107 - *ptr = -1;
13108 - v = 0x1234;
13109 - }
13110 - return v;
13111 -}
13112 -
13113 -int
13114 -main (void)
13115 -{
13116 - func ();
13117 - if (v != 0x1234)
13118 - __builtin_abort ();
13119 - return 0;
13120 -}
589313121 diff --git a/gcc/testsuite/gcc.target/arm/get_address_cost_aligned_max_offset.c b/gcc/testsuite/gcc.target/arm/get_address_cost_aligned_max_offset.c
589413122 new file mode 100644
589513123 index 0000000..cc3e2f7
592413152 +
592513153 +/* { dg-final { scan-assembler-not "#22" } } */
592613154 +/* { dg-final { scan-assembler-not "#14" } } */
13155 diff --git a/gcc/testsuite/gcc.target/arm/no-volatile-in-it.c b/gcc/testsuite/gcc.target/arm/no-volatile-in-it.c
13156 new file mode 100644
13157 index 0000000..206afdb
13158 --- /dev/null
13159 +++ b/gcc/testsuite/gcc.target/arm/no-volatile-in-it.c
13160 @@ -0,0 +1,14 @@
13161 +/* { dg-do compile } */
13162 +/* { dg-require-effective-target arm_thumb2_ok } */
13163 +/* { dg-options "-Os -mthumb -mcpu=cortex-m7" } */
13164 +
13165 +int
13166 +foo (int a, int b, volatile int *c, volatile int *d)
13167 +{
13168 + if (a > b)
13169 + return c[0];
13170 + else
13171 + return d[0];
13172 +}
13173 +
13174 +/* { dg-final { scan-assembler-not "ldrgt" } } */
592713175 diff --git a/gcc/testsuite/gcc.target/arm/pr63210.c b/gcc/testsuite/gcc.target/arm/pr63210.c
592813176 new file mode 100644
592913177 index 0000000..c3ae928
594213190 + return (foo1 (c) || foo2 (c));
594313191 +}
594413192 +/* { dg-final { object-size text <= 28 } } */
13193 diff --git a/gcc/testsuite/gcc.target/arm/pr65647-2.c b/gcc/testsuite/gcc.target/arm/pr65647-2.c
13194 deleted file mode 100644
13195 index f2985f8..0000000
13196 --- a/gcc/testsuite/gcc.target/arm/pr65647-2.c
13197 +++ /dev/null
13198 @@ -1,32 +0,0 @@
13199 -/* { dg-do compile } */
13200 -/* { dg-options "-O3 -marm -march=armv6 -std=c99" } */
13201 -
13202 -typedef struct {
13203 - int i;
13204 -} x264_union32_t;
13205 -typedef struct {
13206 - int level_idx;
13207 -} trellis_node_t;
13208 -int a, c, d, f, h, i = (int)&c;
13209 -trellis_node_t b[1][1];
13210 -short *e = 0;
13211 -short g;
13212 -void fn1() {
13213 - int k[64 * 8 * 2];
13214 - trellis_node_t *l = b[0];
13215 - for (; i >= d; i--) {
13216 - if (e[i]) {
13217 - for (int j = 1; j < 8; j++) {
13218 - ((x264_union32_t *)&k[a])->i = l[j].level_idx;
13219 - l[j].level_idx = a;
13220 - a++;
13221 - }
13222 - continue;
13223 - }
13224 - for (int j;; j++)
13225 - ;
13226 - }
13227 - int m[6] __attribute__((aligned(16)));
13228 - for (; h; h++, f++)
13229 - g = m[h];
13230 -}
13231 diff --git a/gcc/testsuite/gcc.target/arm/pr65647.c b/gcc/testsuite/gcc.target/arm/pr65647.c
13232 deleted file mode 100644
13233 index d3b44b2..0000000
13234 --- a/gcc/testsuite/gcc.target/arm/pr65647.c
13235 +++ /dev/null
13236 @@ -1,58 +0,0 @@
13237 -/* { dg-do compile } */
13238 -/* { dg-options "-march=armv6-m -mthumb -O3 -w -mfloat-abi=soft" } */
13239 -
13240 -a, b, c, e, g = &e, h, i = 7, l = 1, m, n, o, q = &m, r, s = &r, u, w = 9, x,
13241 - y = 6, z, t6 = 7, t8, t9 = 1, t11 = 5, t12 = &t8, t13 = 3, t15,
13242 - t16 = &t15;
13243 -struct {
13244 - long long f3;
13245 - char f4
13246 -} p = {3}
13247 -
13248 - ,
13249 - t = {4};
13250 -
13251 -struct S1 {
13252 - long long f0;
13253 - short f1;
13254 - long long f2
13255 -} d;
13256 -long long f = 4073709551613, t7 = 8, t14 = 4073709551610;
13257 -j[];
13258 -k = j;
13259 -v = &d;
13260 -*t10 = j;
13261 -struct S1 fn1();
13262 -struct S1 fn2() {
13263 - signed char t1;
13264 - struct S1 t2;
13265 - long t3 = x;
13266 - short t4 = h;
13267 - short *t5 = &l;
13268 - fn1(t2, w, 1, o);
13269 - if (u) {
13270 - l = q;
13271 - t1 = a < b ?: b;
13272 - z = c >= 2 || t1 << c;
13273 - }
13274 - *t5 = t4 &= t3;
13275 - fn3(y);
13276 -}
13277 -
13278 -fn4() {
13279 - t6 = t.f3;
13280 - fn5(k, t7);
13281 -}
13282 -
13283 -struct S1 fn1() {
13284 - f = 0;
13285 - for (; i;)
13286 - ;
13287 - t11 = 0;
13288 - t13 = *t10 = t14 || n;
13289 - t9 = t12;
13290 - for (; p.f4;)
13291 - s = t16 <= fn6();
13292 - if (g)
13293 - v = 0;
13294 -}
594513295 diff --git a/gcc/testsuite/gcc.target/arm/small-multiply-m0-1.c b/gcc/testsuite/gcc.target/arm/small-multiply-m0-1.c
594613296 new file mode 100644
594713297 index 0000000..77ec603
616413514 +/* { dg-final { scan-assembler-not "ldr" } } */
616513515 +/* { dg-final { scan-assembler-times "neg" 1 } } */
616613516 +
13517 diff --git a/gcc/testsuite/gcc.target/avr/torture/pr64331.c b/gcc/testsuite/gcc.target/avr/torture/pr64331.c
13518 deleted file mode 100644
13519 index 1934ccf..0000000
13520 --- a/gcc/testsuite/gcc.target/avr/torture/pr64331.c
13521 +++ /dev/null
13522 @@ -1,37 +0,0 @@
13523 -/* { dg-do run } */
13524 -
13525 -typedef struct
13526 -{
13527 - unsigned a, b;
13528 -} T2;
13529 -
13530 -
13531 -__attribute__((__noinline__, __noclone__))
13532 -void foo2 (T2 *t, int x)
13533 -{
13534 - if (x != t->a)
13535 - {
13536 - t->a = x;
13537 -
13538 - if (x && x == t->b)
13539 - t->a = 20;
13540 - }
13541 -}
13542 -
13543 -
13544 -T2 t;
13545 -
13546 -int main (void)
13547 -{
13548 - t.a = 1;
13549 - t.b = 1234;
13550 -
13551 - foo2 (&t, 1234);
13552 -
13553 - if (t.a != 20)
13554 - __builtin_abort();
13555 -
13556 - __builtin_exit (0);
13557 -
13558 - return 0;
13559 -}
13560 diff --git a/gcc/testsuite/gcc.target/i386/pr60851.c b/gcc/testsuite/gcc.target/i386/pr60851.c
13561 deleted file mode 100644
13562 index 3b8d35d..0000000
13563 --- a/gcc/testsuite/gcc.target/i386/pr60851.c
13564 +++ /dev/null
13565 @@ -1,7 +0,0 @@
13566 -/* { dg-do compile } */
13567 -/* { dg-options "-O2 -flive-range-shrinkage -mtune=bdver4 -mdispatch-scheduler" } */
13568 -
13569 -long double ld (char c)
13570 -{
13571 - return c;
13572 -}
13573 diff --git a/gcc/testsuite/gcc.target/i386/pr65990.c b/gcc/testsuite/gcc.target/i386/pr65990.c
13574 deleted file mode 100644
13575 index c0e5bb6..0000000
13576 --- a/gcc/testsuite/gcc.target/i386/pr65990.c
13577 +++ /dev/null
13578 @@ -1,29 +0,0 @@
13579 -/* { dg-do compile } */
13580 -/* { dg-options "-mtune=btver2 -mmemcpy-strategy=rep_8byte:-1:noalign" }
13581 -
13582 -/* { dg-error "stringop strategy name rep_8byte specified for option -mmemcpy_strategy= not supported for 32-bit code" "" { target ia32 } 0 } */
13583 -
13584 -struct U9
13585 -{
13586 - unsigned a[9];
13587 -};
13588 -
13589 -struct U9 u9;
13590 -
13591 -void
13592 -foo ()
13593 -{
13594 - u9 = (struct U9) {
13595 - .a = {
13596 - 0xFF,
13597 - 0xFF,
13598 - 0xFF,
13599 - 0xFF,
13600 - 0xFF,
13601 - 0xFF,
13602 - 0xFF,
13603 - 0xFF,
13604 - 0xFF
13605 - }
13606 - };
13607 -}
13608 diff --git a/gcc/testsuite/gcc.target/i386/sse-25.c b/gcc/testsuite/gcc.target/i386/sse-25.c
13609 deleted file mode 100644
13610 index c4b334c..0000000
13611 --- a/gcc/testsuite/gcc.target/i386/sse-25.c
13612 +++ /dev/null
13613 @@ -1,6 +0,0 @@
13614 -/* PR target/65676 */
13615 -/* { dg-do compile } */
13616 -/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -funsigned-char" } */
13617 -/* { dg-add-options bind_pic_locally } */
13618 -
13619 -#include "sse-23.c"
13620 diff --git a/gcc/testsuite/gcc.target/powerpc/crypto-builtin-2.c b/gcc/testsuite/gcc.target/powerpc/crypto-builtin-2.c
13621 deleted file mode 100644
13622 index 0533f45..0000000
13623 --- a/gcc/testsuite/gcc.target/powerpc/crypto-builtin-2.c
13624 +++ /dev/null
13625 @@ -1,36 +0,0 @@
13626 -/* { dg-do compile { target { powerpc*-*-* } } } */
13627 -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
13628 -/* { dg-require-effective-target powerpc_p8vector_ok } */
13629 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
13630 -/* { dg-options "-O2 -mcpu=power8 -mno-crypto" } */
13631 -
13632 -void use_builtins_d (__vector unsigned long long *p, __vector unsigned long long *q, __vector unsigned long long *r, __vector unsigned long long *s)
13633 -{
13634 - p[0] = __builtin_crypto_vcipher (q[0], r[0]); /* { dg-error "Builtin function __builtin_crypto_vcipher is not supported with the current options" } */
13635 - p[1] = __builtin_crypto_vcipherlast (q[1], r[1]); /* { dg-error "Builtin function __builtin_crypto_vcipherlast is not supported with the current options" } */
13636 - p[2] = __builtin_crypto_vncipher (q[2], r[2]); /* { dg-error "Builtin function __builtin_crypto_vncipher is not supported with the current options" } */
13637 - p[3] = __builtin_crypto_vncipherlast (q[3], r[3]); /* { dg-error "Builtin function __builtin_crypto_vncipherlast is not supported with the current options" } */
13638 - p[4] = __builtin_crypto_vpermxor (q[4], r[4], s[4]);
13639 - p[5] = __builtin_crypto_vpmsumd (q[5], r[5]);
13640 - p[6] = __builtin_crypto_vshasigmad (q[6], 1, 15); /* { dg-error "Builtin function __builtin_crypto_vshasigmad is not supported with the current options" } */
13641 - p[7] = __builtin_crypto_vsbox (q[7]); /* { dg-error "Builtin function __builtin_crypto_vsbox is not supported with the current options" } */
13642 -}
13643 -
13644 -void use_builtins_w (__vector unsigned int *p, __vector unsigned int *q, __vector unsigned int *r, __vector unsigned int *s)
13645 -{
13646 - p[0] = __builtin_crypto_vpermxor (q[0], r[0], s[0]);
13647 - p[1] = __builtin_crypto_vpmsumw (q[1], r[1]);
13648 - p[2] = __builtin_crypto_vshasigmaw (q[2], 1, 15); /* { dg-error "Builtin function __builtin_crypto_vshasigmaw is not supported with the current options" } */
13649 -}
13650 -
13651 -void use_builtins_h (__vector unsigned short *p, __vector unsigned short *q, __vector unsigned short *r, __vector unsigned short *s)
13652 -{
13653 - p[0] = __builtin_crypto_vpermxor (q[0], r[0], s[0]);
13654 - p[1] = __builtin_crypto_vpmsumh (q[1], r[1]);
13655 -}
13656 -
13657 -void use_builtins_b (__vector unsigned char *p, __vector unsigned char *q, __vector unsigned char *r, __vector unsigned char *s)
13658 -{
13659 - p[0] = __builtin_crypto_vpermxor (q[0], r[0], s[0]);
13660 - p[1] = __builtin_crypto_vpmsumb (q[1], r[1]);
13661 -}
13662 diff --git a/gcc/testsuite/gcc.target/powerpc/htm-1.c b/gcc/testsuite/gcc.target/powerpc/htm-1.c
13663 deleted file mode 100644
13664 index f27e32c..0000000
13665 --- a/gcc/testsuite/gcc.target/powerpc/htm-1.c
13666 +++ /dev/null
13667 @@ -1,52 +0,0 @@
13668 -/* { dg-do run { target { powerpc*-*-* && htm_hw } } } */
13669 -/* { dg-require-effective-target powerpc_htm_ok } */
13670 -/* { dg-options "-mhtm" } */
13671 -
13672 -/* Program to test PowerPC HTM instructions. */
13673 -
13674 -#include <stdlib.h>
13675 -#include <htmintrin.h>
13676 -
13677 -int
13678 -main (void)
13679 -{
13680 - long i;
13681 - unsigned long mask = 0;
13682 -
13683 -repeat:
13684 - if (__builtin_tbegin (0))
13685 - {
13686 - mask++;
13687 - }
13688 - else
13689 - abort();
13690 -
13691 - if (mask == 1)
13692 - {
13693 - __builtin_tsuspend ();
13694 -
13695 - if (_HTM_STATE (__builtin_tcheck ()) != _HTM_SUSPENDED)
13696 - abort ();
13697 -
13698 - __builtin_tresume ();
13699 -
13700 - if (_HTM_STATE (__builtin_tcheck ()) != _HTM_TRANSACTIONAL)
13701 - abort ();
13702 - }
13703 - else
13704 - mask++;
13705 -
13706 - if (_HTM_STATE (__builtin_tendall ()) != _HTM_TRANSACTIONAL)
13707 - abort ();
13708 -
13709 - if (mask == 1)
13710 - goto repeat;
13711 -
13712 - if (_HTM_STATE (__builtin_tendall ()) != _HTM_NONTRANSACTIONAL)
13713 - abort ();
13714 -
13715 - if (mask != 3)
13716 - abort ();
13717 -
13718 - return 0;
13719 -}
13720 diff --git a/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c b/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c
13721 index b232580..3e4b729 100644
13722 --- a/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c
13723 +++ b/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c
13724 @@ -6,8 +6,8 @@
13725 /* { dg-final { scan-assembler-times "tbegin\\." 1 } } */
13726 /* { dg-final { scan-assembler-times "tend\\." 2 } } */
13727 /* { dg-final { scan-assembler-times "tabort\\." 2 } } */
13728 -/* { dg-final { scan-assembler-times "tabortdc\\." 1 { target lp64 } } } */
13729 -/* { dg-final { scan-assembler-times "tabortdci\\." 1 { target lp64 } } } */
13730 +/* { dg-final { scan-assembler-times "tabortdc\\." 1 } } */
13731 +/* { dg-final { scan-assembler-times "tabortdci\\." 1 } } */
13732 /* { dg-final { scan-assembler-times "tabortwc\\." 1 } } */
13733 /* { dg-final { scan-assembler-times "tabortwci\\." 2 } } */
13734 /* { dg-final { scan-assembler-times "tcheck" 1 } } */
13735 @@ -25,14 +25,12 @@ void use_builtins (long *p, char code, long *a, long *b)
13736 p[3] = __builtin_tabort (0);
13737 p[4] = __builtin_tabort (code);
13738
13739 -#ifdef __powerpc64__
13740 p[5] = __builtin_tabortdc (0xf, a[5], b[5]);
13741 p[6] = __builtin_tabortdci (0xf, a[6], 13);
13742 -#endif
13743 p[7] = __builtin_tabortwc (0xf, a[7], b[7]);
13744 p[8] = __builtin_tabortwci (0xf, a[8], 13);
13745
13746 - p[9] = __builtin_tcheck ();
13747 + p[9] = __builtin_tcheck (5);
13748 p[10] = __builtin_trechkpt ();
13749 p[11] = __builtin_treclaim (0);
13750 p[12] = __builtin_tresume ();
13751 diff --git a/gcc/testsuite/gcc.target/powerpc/pr53199.c b/gcc/testsuite/gcc.target/powerpc/pr53199.c
13752 index 7635cb0..89a0cad 100644
13753 --- a/gcc/testsuite/gcc.target/powerpc/pr53199.c
13754 +++ b/gcc/testsuite/gcc.target/powerpc/pr53199.c
13755 @@ -1,7 +1,7 @@
13756 /* { dg-do compile { target { powerpc*-*-* } } } */
13757 /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
13758 /* { dg-options "-O2 -mcpu=power6 -mavoid-indexed-addresses" } */
13759 -/* { dg-final { scan-assembler-times "lwbrx" 12 } } */
13760 +/* { dg-final { scan-assembler-times "lwbrx" 6 } } */
13761 /* { dg-final { scan-assembler-times "stwbrx" 6 } } */
13762
13763 /* PR 51399: bswap gets an error if -mavoid-indexed-addresses was used in
13764 @@ -25,24 +25,6 @@ load64_reverse_3 (long long *p, int i)
13765 return __builtin_bswap64 (p[i]);
13766 }
13767
13768 -long long
13769 -load64_reverse_4 (long long dummy __attribute__ ((unused)), long long *p)
13770 -{
13771 - return __builtin_bswap64 (*p);
13772 -}
13773 -
13774 -long long
13775 -load64_reverse_5 (long long dummy __attribute__ ((unused)), long long *p)
13776 -{
13777 - return __builtin_bswap64 (p[1]);
13778 -}
13779 -
13780 -long long
13781 -load64_reverse_6 (long long dummy __attribute__ ((unused)), long long *p, int i)
13782 -{
13783 - return __builtin_bswap64 (p[i]);
13784 -}
13785 -
13786 void
13787 store64_reverse_1 (long long *p, long long x)
13788 {
13789 @@ -62,13 +44,7 @@ store64_reverse_3 (long long *p, long long x, int i)
13790 }
13791
13792 long long
13793 -reg_reverse_1 (long long x)
13794 -{
13795 - return __builtin_bswap64 (x);
13796 -}
13797 -
13798 -long long
13799 -reg_reverse_2 (long long dummy __attribute__ ((unused)), long long x)
13800 +reg_reverse (long long x)
13801 {
13802 return __builtin_bswap64 (x);
13803 }
13804 diff --git a/gcc/testsuite/gcc.target/powerpc/pr65456.c b/gcc/testsuite/gcc.target/powerpc/pr65456.c
13805 deleted file mode 100644
13806 index 5a645c7..0000000
13807 --- a/gcc/testsuite/gcc.target/powerpc/pr65456.c
13808 +++ /dev/null
13809 @@ -1,65 +0,0 @@
13810 -/* { dg-do compile { target { powerpc64le-*-* } } } */
13811 -/* { dg-skip-if "do not override -mcpu" { powerpc64le-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
13812 -/* { dg-options "-mcpu=power8 -O3" } */
13813 -
13814 -/* Verify that swap optimization properly removes swaps for unaligned
13815 - vector stores. See PR65456. */
13816 -
13817 -typedef unsigned char UChar;
13818 -typedef unsigned short UShort;
13819 -typedef unsigned int UWord;
13820 -
13821 -typedef unsigned long SizeT;
13822 -typedef unsigned long Addr;
13823 -
13824 -void *memmove(void *dst, const void *src, SizeT len)
13825 -{
13826 - const Addr WS = sizeof(UWord);/* 8 or 4 */
13827 - const Addr WM = WS - 1;/* 7 or 3 */
13828 -
13829 - /* Copying backwards. */
13830 - SizeT n = len;
13831 - Addr d = (Addr) dst;
13832 - Addr s = (Addr) src;
13833 -
13834 - if (((s ^ d) & WM) == 0) {
13835 - /* s and d have same UWord alignment. */
13836 - /* Pull up to a UWord boundary. */
13837 - while ((s & WM) != 0 && n >= 1) {
13838 - *(UChar *) d = *(UChar *) s;
13839 - s += 1;
13840 - d += 1;
13841 - n -= 1;
13842 - }
13843 - /* Copy UWords. */
13844 - while (n >= WS) {
13845 - *(UWord *) d = *(UWord *) s;
13846 - s += WS;
13847 - d += WS;
13848 - n -= WS;
13849 - }
13850 - if (n == 0)
13851 - return dst;
13852 - }
13853 - if (((s | d) & 1) == 0) {
13854 - /* Both are 16-aligned; copy what we can thusly. */
13855 - while (n >= 2) {
13856 - *(UShort *) d = *(UShort *) s;
13857 - s += 2;
13858 - d += 2;
13859 - n -= 2;
13860 - }
13861 - }
13862 - /* Copy leftovers, or everything if misaligned. */
13863 - while (n >= 1) {
13864 - *(UChar *) d = *(UChar *) s;
13865 - s += 1;
13866 - d += 1;
13867 - n -= 1;
13868 - }
13869 -
13870 - return dst;
13871 -}
13872 -
13873 -/* { dg-final { scan-assembler-not "xxpermdi" } } */
13874 -/* { dg-final { scan-assembler-not "xxswapd" } } */
13875 diff --git a/gcc/testsuite/gcc.target/powerpc/pr65787.c b/gcc/testsuite/gcc.target/powerpc/pr65787.c
13876 deleted file mode 100644
13877 index c819be9..0000000
13878 --- a/gcc/testsuite/gcc.target/powerpc/pr65787.c
13879 +++ /dev/null
13880 @@ -1,21 +0,0 @@
13881 -/* { dg-do compile { target { powerpc64le-*-* } } } */
13882 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
13883 -/* { dg-options "-mcpu=power8 -O3" } */
13884 -/* { dg-final { scan-assembler "xxsldwi \[0-9\]*,\[0-9\]*,\[0-9\]*,3" } } */
13885 -/* { dg-final { scan-assembler-not "xxpermdi" } } */
13886 -
13887 -/* This test verifies that a vector extract operand properly has its
13888 - lane changed by the swap optimization. Element 2 of LE corresponds
13889 - to element 1 of BE. When doublewords are swapped, this becomes
13890 - element 3 of BE, so we need to shift the vector left by 3 words
13891 - to be able to extract the correct value from BE element zero. */
13892 -
13893 -typedef float v4f32 __attribute__ ((__vector_size__ (16)));
13894 -
13895 -void foo (float);
13896 -extern v4f32 x, y;
13897 -
13898 -int main() {
13899 - v4f32 z = x + y;
13900 - foo (z[2]);
13901 -}
13902 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-1.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-1.c
13903 deleted file mode 100644
13904 index ab85e91..0000000
13905 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-1.c
13906 +++ /dev/null
13907 @@ -1,35 +0,0 @@
13908 -/* { dg-do compile { target { powerpc64le-*-* } } } */
13909 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
13910 -/* { dg-options "-mcpu=power8 -O3" } */
13911 -/* { dg-final { scan-assembler "lxvd2x" } } */
13912 -/* { dg-final { scan-assembler "stxvd2x" } } */
13913 -/* { dg-final { scan-assembler-not "xxpermdi" } } */
13914 -
13915 -void abort();
13916 -
13917 -#define N 16
13918 -
13919 -signed char ca[N] __attribute__((aligned(16)));
13920 -signed char cb[] __attribute__((aligned(16)))
13921 - = {8, 7, 6, 5, 4, 3, 2, 1, 0, -1, -2, -3, -4, -5, -6, -7};
13922 -signed char cc[] __attribute__((aligned(16)))
13923 - = {1, 1, 2, 2, 3, 3, 2, 2, 1, 1, 0, 0, -1, -1, -2, -2};
13924 -
13925 -__attribute__((noinline)) void foo ()
13926 -{
13927 - int i;
13928 - for (i = 0; i < N; i++) {
13929 - ca[i] = cb[i] - cc[i];
13930 - }
13931 -}
13932 -
13933 -int main ()
13934 -{
13935 - signed char cd[] = {7, 6, 4, 3, 1, 0, 0, -1, -1, -2, -2, -3, -3, -4, -4, -5};
13936 - int i;
13937 - foo ();
13938 - for (i = 0; i < N; ++i)
13939 - if (ca[i] != cd[i])
13940 - abort ();
13941 - return 0;
13942 -}
13943 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-10.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-10.c
13944 deleted file mode 100644
13945 index 170649d..0000000
13946 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-10.c
13947 +++ /dev/null
13948 @@ -1,42 +0,0 @@
13949 -/* { dg-do run { target { powerpc64le-*-* } } } */
13950 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
13951 -/* { dg-options "-mcpu=power8 -O3" } */
13952 -
13953 -void abort ();
13954 -
13955 -#define N 4096
13956 -int ca[N] __attribute__((aligned(16)));
13957 -int cb[N] __attribute__((aligned(16)));
13958 -int cc[N] __attribute__((aligned(16)));
13959 -int cd[N] __attribute__((aligned(16)));
13960 -
13961 -__attribute__((noinline)) void foo ()
13962 -{
13963 - int i;
13964 - for (i = 0; i < N; i++) {
13965 - ca[i] = ((cb[i] + cc[i]) * cd[i]) >> 3;
13966 - }
13967 -}
13968 -
13969 -__attribute__((noinline)) void init ()
13970 -{
13971 - int i;
13972 - for (i = 0; i < N; ++i) {
13973 - cb[i] = 3 * i - 2048;
13974 - cc[i] = -5 * i + 93;
13975 - cd[i] = i % 2 ? 1 : -1;
13976 - }
13977 -}
13978 -
13979 -int main ()
13980 -{
13981 - int i;
13982 - init ();
13983 - foo ();
13984 - for (i = 0; i < N; ++i)
13985 - if (i % 2 == 1 && ca[i] != (-2 * i - 1955) >> 3)
13986 - abort ();
13987 - else if (i % 2 == 0 && ca[i] != (1955 + 2 * i) >> 3)
13988 - abort ();
13989 - return 0;
13990 -}
13991 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-11.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-11.c
13992 deleted file mode 100644
13993 index 699b5ba..0000000
13994 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-11.c
13995 +++ /dev/null
13996 @@ -1,53 +0,0 @@
13997 -/* { dg-do run { target { powerpc64le-*-* } } } */
13998 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
13999 -/* { dg-options "-mcpu=power8 -O3" } */
14000 -
14001 -#include <altivec.h>
14002 -void abort ();
14003 -
14004 -#define N 4096
14005 -int ca[N] __attribute__((aligned(16)));
14006 -int cb[N] __attribute__((aligned(16)));
14007 -int cc[N] __attribute__((aligned(16)));
14008 -int cd[N] __attribute__((aligned(16)));
14009 -int hey;
14010 -
14011 -__attribute__((noinline)) void foo ()
14012 -{
14013 - int i;
14014 - vector int va, vb, vc, vd, tmp;
14015 - vector unsigned int threes = vec_splat_u32(3);
14016 - for (i = 0; i < N; i+=4) {
14017 - vb = vec_vsx_ld (0, &cb[i]);
14018 - vc = vec_vsx_ld (0, &cc[i]);
14019 - vd = vec_vsx_ld (0, &cd[i]);
14020 - tmp = vec_add (vb, vc);
14021 - tmp = vec_sub (tmp, vd);
14022 - tmp = vec_sra (tmp, threes);
14023 - hey = tmp[3];
14024 - vec_vsx_st (tmp, 0, &ca[i]);
14025 - }
14026 -}
14027 -
14028 -__attribute__((noinline)) void init ()
14029 -{
14030 - int i;
14031 - for (i = 0; i < N; ++i) {
14032 - cb[i] = 3 * i - 2048;
14033 - cc[i] = -5 * i + 93;
14034 - cd[i] = i + 14;
14035 - }
14036 -}
14037 -
14038 -int main ()
14039 -{
14040 - int i;
14041 - init ();
14042 - foo ();
14043 - for (i = 0; i < N; ++i)
14044 - if (ca[i] != (-3 * i - 1969) >> 3)
14045 - abort ();
14046 - if (hey != ca[N-1])
14047 - abort ();
14048 - return 0;
14049 -}
14050 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-12.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-12.c
14051 deleted file mode 100644
14052 index 529d03e..0000000
14053 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-12.c
14054 +++ /dev/null
14055 @@ -1,56 +0,0 @@
14056 -/* { dg-do compile { target { powerpc64le-*-* } } } */
14057 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
14058 -/* { dg-options "-mcpu=power8 -O3" } */
14059 -/* { dg-final { scan-assembler "lxvd2x" } } */
14060 -/* { dg-final { scan-assembler "stxvd2x" } } */
14061 -/* { dg-final { scan-assembler-not "xxpermdi" } } */
14062 -
14063 -#include "altivec.h"
14064 -void abort ();
14065 -
14066 -#define N 4096
14067 -int ca[N] __attribute__((aligned(16)));
14068 -int cb[N] __attribute__((aligned(16)));
14069 -int cc[N] __attribute__((aligned(16)));
14070 -int cd[N] __attribute__((aligned(16)));
14071 -int hey;
14072 -
14073 -__attribute__((noinline)) void foo ()
14074 -{
14075 - int i;
14076 - vector int va, vb, vc, vd, tmp;
14077 - vector unsigned int threes = vec_splat_u32(3);
14078 - for (i = 0; i < N; i+=4) {
14079 - vb = vec_vsx_ld (0, &cb[i]);
14080 - vc = vec_vsx_ld (0, &cc[i]);
14081 - vd = vec_vsx_ld (0, &cd[i]);
14082 - tmp = vec_add (vb, vc);
14083 - tmp = vec_sub (tmp, vd);
14084 - tmp = vec_sra (tmp, threes);
14085 - hey = tmp[3];
14086 - vec_vsx_st (tmp, 0, &ca[i]);
14087 - }
14088 -}
14089 -
14090 -__attribute__((noinline)) void init ()
14091 -{
14092 - int i;
14093 - for (i = 0; i < N; ++i) {
14094 - cb[i] = 3 * i - 2048;
14095 - cc[i] = -5 * i + 93;
14096 - cd[i] = i + 14;
14097 - }
14098 -}
14099 -
14100 -int main ()
14101 -{
14102 - int i;
14103 - init ();
14104 - foo ();
14105 - for (i = 0; i < N; ++i)
14106 - if (ca[i] != (-3 * i - 1969) >> 3)
14107 - abort ();
14108 - if (hey != ca[N-1])
14109 - abort ();
14110 - return 0;
14111 -}
14112 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-13.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-13.c
14113 deleted file mode 100644
14114 index 787b02e..0000000
14115 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-13.c
14116 +++ /dev/null
14117 @@ -1,54 +0,0 @@
14118 -/* { dg-do run { target { powerpc64le-*-* } } } */
14119 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
14120 -/* { dg-options "-mcpu=power8 -O3" } */
14121 -
14122 -#include <altivec.h>
14123 -void abort ();
14124 -
14125 -#define N 4096
14126 -long long ca[N] __attribute__((aligned(16)));
14127 -long long cb[N] __attribute__((aligned(16)));
14128 -long long cc[N] __attribute__((aligned(16)));
14129 -long long cd[N] __attribute__((aligned(16)));
14130 -long long x;
14131 -
14132 -__attribute__((noinline)) void foo ()
14133 -{
14134 - int i;
14135 - vector long long va, vb, vc, vd, tmp;
14136 - volatile unsigned long long three = 3;
14137 - vector unsigned long long threes = vec_splats (three);
14138 - for (i = 0; i < N; i+=2) {
14139 - vb = vec_vsx_ld (0, (vector long long *)&cb[i]);
14140 - vc = vec_vsx_ld (0, (vector long long *)&cc[i]);
14141 - vd = vec_vsx_ld (0, (vector long long *)&cd[i]);
14142 - tmp = vec_add (vb, vc);
14143 - tmp = vec_sub (tmp, vd);
14144 - tmp = vec_sra (tmp, threes);
14145 - x = vec_extract (tmp, 0);
14146 - vec_vsx_st (tmp, 0, (vector long long *)&ca[i]);
14147 - }
14148 -}
14149 -
14150 -__attribute__((noinline)) void init ()
14151 -{
14152 - int i;
14153 - for (i = 0; i < N; ++i) {
14154 - cb[i] = 3 * i - 2048;
14155 - cc[i] = -5 * i + 93;
14156 - cd[i] = i + 14;
14157 - }
14158 -}
14159 -
14160 -int main ()
14161 -{
14162 - int i;
14163 - init ();
14164 - foo ();
14165 - for (i = 0; i < N; ++i)
14166 - if (ca[i] != (-3 * i - 1969) >> 3)
14167 - abort ();
14168 - if (x != ca[N-1])
14169 - abort ();
14170 - return 0;
14171 -}
14172 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-14.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-14.c
14173 deleted file mode 100644
14174 index 7ca6ad5..0000000
14175 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-14.c
14176 +++ /dev/null
14177 @@ -1,43 +0,0 @@
14178 -/* { dg-do compile { target { powerpc64le-*-* } } } */
14179 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
14180 -/* { dg-options "-mcpu=power8 -O3" } */
14181 -/* { dg-final { scan-assembler "lxvd2x" } } */
14182 -/* { dg-final { scan-assembler "stxvd2x" } } */
14183 -/* { dg-final { scan-assembler "stxsdx" } } */
14184 -/* { dg-final { scan-assembler-times "xxpermdi" 1 } } */
14185 -
14186 -/* The only xxpermdi expected is for the vec_splats. */
14187 -
14188 -#include <altivec.h>
14189 -void abort ();
14190 -
14191 -#define N 4096
14192 -long long ca[N] __attribute__((aligned(16)));
14193 -long long cb[N] __attribute__((aligned(16)));
14194 -long long cc[N] __attribute__((aligned(16)));
14195 -long long cd[N] __attribute__((aligned(16)));
14196 -long long x;
14197 -
14198 -__attribute__((noinline)) void foo ()
14199 -{
14200 - int i;
14201 - vector long long va, vb, vc, vd, tmp;
14202 - volatile unsigned long long three = 3;
14203 - vector unsigned long long threes = vec_splats (three);
14204 - for (i = 0; i < N; i+=2) {
14205 - vb = vec_vsx_ld (0, (vector long long *)&cb[i]);
14206 - vc = vec_vsx_ld (0, (vector long long *)&cc[i]);
14207 - vd = vec_vsx_ld (0, (vector long long *)&cd[i]);
14208 - tmp = vec_add (vb, vc);
14209 - tmp = vec_sub (tmp, vd);
14210 - tmp = vec_sra (tmp, threes);
14211 - x = vec_extract (tmp, 0);
14212 - vec_vsx_st (tmp, 0, (vector long long *)&ca[i]);
14213 - }
14214 -}
14215 -
14216 -int main ()
14217 -{
14218 - foo ();
14219 - return 0;
14220 -}
14221 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-15.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-15.c
14222 deleted file mode 100644
14223 index 172e4bd..0000000
14224 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-15.c
14225 +++ /dev/null
14226 @@ -1,51 +0,0 @@
14227 -/* { dg-do compile { target { powerpc64le-*-* } } } */
14228 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
14229 -/* { dg-options "-mcpu=power8 -O3" } */
14230 -/* { dg-final { scan-assembler "lxvd2x" } } */
14231 -/* { dg-final { scan-assembler "stxvd2x" } } */
14232 -/* { dg-final { scan-assembler "xxspltw" } } */
14233 -
14234 -/* Currently the analyze_swaps phase cannot optimize this loop because
14235 - of the presence of an UNSPEC_VSX_CVDPSPN. At such time as this is
14236 - handled, we need to add a 'scan-assembler-not "xxpermdi"' directive to
14237 - this test. */
14238 -#include <altivec.h>
14239 -void abort();
14240 -
14241 -#define N 4096
14242 -#define M 10000000
14243 -vector float ca[N][4] = {0};
14244 -vector float cb[N][4] = {0};
14245 -vector float cc[N][4] = {0};
14246 -
14247 -__attribute__((noinline)) void foo ()
14248 -{
14249 - int i;
14250 - for (i = 0; i < N; i++) {
14251 - cc[i][0] = vec_mul(vec_splats(cb[i][0][0]), ca[i][0]);
14252 - cc[i][0] = vec_madd(cc[i][0],vec_splats(cb[i][0][1]), ca[i][1]);
14253 - cc[i][0] = vec_madd(cc[i][0],vec_splats(cb[i][0][2]), ca[i][2]);
14254 - cc[i][0] = vec_madd(cc[i][0],vec_splats(cb[i][0][3]), ca[i][3]);
14255 -
14256 - cc[i][1] = vec_mul(vec_splats(cb[i][1][0]), ca[i][0]);
14257 - cc[i][1] = vec_madd(cc[i][0],vec_splats(cb[i][1][1]), ca[i][1]);
14258 - cc[i][1] = vec_madd(cc[i][0],vec_splats(cb[i][1][2]), ca[i][2]);
14259 - cc[i][1] = vec_madd(cc[i][0],vec_splats(cb[i][1][3]), ca[i][3]);
14260 -
14261 - cc[i][2] = vec_mul(vec_splats(cb[i][2][0]), ca[i][0]);
14262 - cc[i][2] = vec_madd(cc[i][0],vec_splats(cb[i][2][1]), ca[i][1]);
14263 - cc[i][2] = vec_madd(cc[i][0],vec_splats(cb[i][2][2]), ca[i][2]);
14264 - cc[i][2] = vec_madd(cc[i][0],vec_splats(cb[i][2][3]), ca[i][3]);
14265 -
14266 - cc[i][3] = vec_mul(vec_splats(cb[i][3][0]), ca[i][0]);
14267 - cc[i][3] = vec_madd(cc[i][0],vec_splats(cb[i][3][1]), ca[i][1]);
14268 - cc[i][3] = vec_madd(cc[i][0],vec_splats(cb[i][3][2]), ca[i][2]);
14269 - cc[i][3] = vec_madd(cc[i][0],vec_splats(cb[i][3][3]), ca[i][3]);
14270 - }
14271 -}
14272 -
14273 -int main ()
14274 -{
14275 - foo ();
14276 - return 0;
14277 -}
14278 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-16.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-16.c
14279 deleted file mode 100644
14280 index 2b7f73c..0000000
14281 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-16.c
14282 +++ /dev/null
14283 @@ -1,57 +0,0 @@
14284 -/* { dg-do compile { target { powerpc64le-*-* } } } */
14285 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
14286 -/* { dg-options "-mcpu=power8 -O3" } */
14287 -/* { dg-final { scan-assembler "lxvd2x" } } */
14288 -/* { dg-final { scan-assembler "stxvd2x" } } */
14289 -/* { dg-final { scan-assembler "vspltw" } } */
14290 -/* { dg-final { scan-assembler-not "xxpermdi" } } */
14291 -
14292 -#include <altivec.h>
14293 -void abort();
14294 -
14295 -typedef struct xx {vector double l; vector double h;} xx;
14296 -
14297 -#define N 4096
14298 -#define M 10000000
14299 -vector float ca[N][4] = {0};
14300 -vector float cb[N][4] = {0};
14301 -vector float cc[N][4] = {0};
14302 -
14303 -__attribute__((noinline)) void foo ()
14304 -{
14305 - int i;
14306 - vector float brow;
14307 -
14308 - for (i = 0; i < N; i++) {
14309 -
14310 - brow = cb[i][0];
14311 - cc[i][0] = vec_mul(vec_splats(brow[0]), ca[i][0]);
14312 - cc[i][0] = vec_madd(cc[i][0],vec_splats(brow[1]), ca[i][1]);
14313 - cc[i][0] = vec_madd(cc[i][0],vec_splats(brow[2]), ca[i][2]);
14314 - cc[i][0] = vec_madd(cc[i][0],vec_splats(brow[3]), ca[i][3]);
14315 -
14316 - brow = cb[i][1];
14317 - cc[i][1] = vec_mul(vec_splats(brow[0]), ca[i][0]);
14318 - cc[i][1] = vec_madd(cc[i][0],vec_splats(brow[1]), ca[i][1]);
14319 - cc[i][1] = vec_madd(cc[i][0],vec_splats(brow[2]), ca[i][2]);
14320 - cc[i][1] = vec_madd(cc[i][0],vec_splats(brow[3]), ca[i][3]);
14321 -
14322 - brow = cb[i][2];
14323 - cc[i][2] = vec_mul(vec_splats(brow[0]), ca[i][0]);
14324 - cc[i][2] = vec_madd(cc[i][0],vec_splats(brow[1]), ca[i][1]);
14325 - cc[i][2] = vec_madd(cc[i][0],vec_splats(brow[2]), ca[i][2]);
14326 - cc[i][2] = vec_madd(cc[i][0],vec_splats(brow[3]), ca[i][3]);
14327 -
14328 - brow = cb[i][3];
14329 - cc[i][3] = vec_mul(vec_splats(brow[0]), ca[i][0]);
14330 - cc[i][3] = vec_madd(cc[i][0],vec_splats(brow[1]), ca[i][1]);
14331 - cc[i][3] = vec_madd(cc[i][0],vec_splats(brow[2]), ca[i][2]);
14332 - cc[i][3] = vec_madd(cc[i][0],vec_splats(brow[3]), ca[i][3]);
14333 - }
14334 -}
14335 -
14336 -int main ()
14337 -{
14338 - foo ();
14339 - return 0;
14340 -}
14341 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-17.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-17.c
14342 deleted file mode 100644
14343 index 7a9cfbf..0000000
14344 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-17.c
14345 +++ /dev/null
14346 @@ -1,15 +0,0 @@
14347 -/* { dg-do compile { target { powerpc64le-*-* } } } */
14348 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
14349 -/* { dg-options "-mcpu=power8 -O1" } */
14350 -/* { dg-final { scan-assembler "lxvd2x" } } */
14351 -/* { dg-final { scan-assembler "xxpermdi" } } */
14352 -
14353 -/* Verify that we don't try to do permute removal in the presence of
14354 - vec_ste. This used to ICE. */
14355 -#include <altivec.h>
14356 -
14357 -void f (void *p)
14358 -{
14359 - vector unsigned int u32 = vec_vsx_ld (1, (const unsigned int *)p);
14360 - vec_ste (u32, 1, (unsigned int *)p);
14361 -}
14362 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-18.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-18.c
14363 deleted file mode 100644
14364 index c55f527..0000000
14365 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-18.c
14366 +++ /dev/null
14367 @@ -1,35 +0,0 @@
14368 -/* { dg-do compile { target { powerpc64le-*-* } } } */
14369 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
14370 -/* { dg-options "-mcpu=power8 -O3" } */
14371 -/* { dg-final { scan-assembler-not "xxpermdi" } } */
14372 -
14373 -/* This is a test for a specific convert-splat permute removal. */
14374 -
14375 -void compute (float*, float*, float*, int, int);
14376 -double test (void);
14377 -double gorp;
14378 -
14379 -int main (void)
14380 -{
14381 - float X[10000], Y[256], Z[2000];
14382 - int i;
14383 - for (i = 0; i < 2500; i++)
14384 - compute (X, Y, Z, 256, 2000);
14385 - gorp = test ();
14386 -}
14387 -
14388 -void compute(float *X, float *Y, float *Z, int m, int n)
14389 -{
14390 - int i, j;
14391 - float w, *x, *y;
14392 -
14393 - for (i = 0; i < n; i++)
14394 - {
14395 - w = 0.0;
14396 - x = X++;
14397 - y = Y;
14398 - for (j = 0; j < m; j++)
14399 - w += (*x++) * (*y++);
14400 - Z[i] = w;
14401 - }
14402 -}
14403 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-2.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-2.c
14404 deleted file mode 100644
14405 index 6ce041a..0000000
14406 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-2.c
14407 +++ /dev/null
14408 @@ -1,41 +0,0 @@
14409 -/* { dg-do compile { target { powerpc64le-*-* } } } */
14410 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
14411 -/* { dg-options "-mcpu=power8 -O3" } */
14412 -/* { dg-final { scan-assembler "lxvd2x" } } */
14413 -/* { dg-final { scan-assembler "stxvd2x" } } */
14414 -/* { dg-final { scan-assembler-not "xxpermdi" } } */
14415 -
14416 -void abort ();
14417 -
14418 -#define N 256
14419 -signed char ca[N] __attribute__((aligned(16)));
14420 -signed char cb[N] __attribute__((aligned(16)));
14421 -signed char cc[N] __attribute__((aligned(16)));
14422 -
14423 -__attribute__((noinline)) void foo ()
14424 -{
14425 - int i;
14426 - for (i = 0; i < N; i++) {
14427 - ca[i] = cb[i] - cc[i];
14428 - }
14429 -}
14430 -
14431 -__attribute__((noinline)) void init ()
14432 -{
14433 - int i;
14434 - for (i = 0; i < N; ++i) {
14435 - cb[i] = i - 128;
14436 - cc[i] = i/2 - 64;
14437 - }
14438 -}
14439 -
14440 -int main ()
14441 -{
14442 - int i;
14443 - init ();
14444 - foo ();
14445 - for (i = 0; i < N; ++i)
14446 - if (ca[i] != i - i/2 - 64)
14447 - abort ();
14448 - return 0;
14449 -}
14450 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-3.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-3.c
14451 deleted file mode 100644
14452 index 35dacd4..0000000
14453 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-3.c
14454 +++ /dev/null
14455 @@ -1,43 +0,0 @@
14456 -/* { dg-do compile { target { powerpc64le-*-* } } } */
14457 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
14458 -/* { dg-options "-mcpu=power8 -O3" } */
14459 -/* { dg-final { scan-assembler "lxvd2x" } } */
14460 -/* { dg-final { scan-assembler "stxvd2x" } } */
14461 -/* { dg-final { scan-assembler-not "xxpermdi" } } */
14462 -
14463 -void abort ();
14464 -
14465 -#define N 4096
14466 -signed char ca[N] __attribute__((aligned(16)));
14467 -signed char cb[N] __attribute__((aligned(16)));
14468 -signed char cc[N] __attribute__((aligned(16)));
14469 -
14470 -__attribute__((noinline)) void foo ()
14471 -{
14472 - int i;
14473 - for (i = 0; i < N; i++) {
14474 - ca[i] = cb[i] - cc[i];
14475 - }
14476 -}
14477 -
14478 -__attribute__((noinline)) void init ()
14479 -{
14480 - int i, ii;
14481 - for (i = 0, ii = 0; i < N; ++i, ii = (ii + 1) % 128) {
14482 - cb[i] = ii - 128;
14483 - cc[i] = ii/2 - 64;
14484 - }
14485 -}
14486 -
14487 -int main ()
14488 -{
14489 - int i, ii;
14490 - init ();
14491 - foo ();
14492 - for (i = 0; i < N; ++i) {
14493 - ii = i % 128;
14494 - if (ca[i] != ii - ii/2 - 64)
14495 - abort ();
14496 - }
14497 - return 0;
14498 -}
14499 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-4.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-4.c
14500 deleted file mode 100644
14501 index 61fe99b..0000000
14502 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-4.c
14503 +++ /dev/null
14504 @@ -1,45 +0,0 @@
14505 -/* { dg-do compile { target { powerpc64le-*-* } } } */
14506 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
14507 -/* { dg-options "-mcpu=power8 -O3" } */
14508 -/* { dg-final { scan-assembler "lxvd2x" } } */
14509 -/* { dg-final { scan-assembler "stxvd2x" } } */
14510 -/* { dg-final { scan-assembler-not "xxpermdi" } } */
14511 -
14512 -void abort ();
14513 -
14514 -#define N 4096
14515 -int ca[N] __attribute__((aligned(16)));
14516 -int cb[N] __attribute__((aligned(16)));
14517 -int cc[N] __attribute__((aligned(16)));
14518 -int cd[N] __attribute__((aligned(16)));
14519 -
14520 -__attribute__((noinline)) void foo ()
14521 -{
14522 - int i;
14523 - for (i = 0; i < N; i++) {
14524 - ca[i] = (cb[i] + cc[i]) * cd[i];
14525 - }
14526 -}
14527 -
14528 -__attribute__((noinline)) void init ()
14529 -{
14530 - int i;
14531 - for (i = 0; i < N; ++i) {
14532 - cb[i] = 3 * i - 2048;
14533 - cc[i] = -5 * i + 93;
14534 - cd[i] = i % 2 ? 1 : -1;
14535 - }
14536 -}
14537 -
14538 -int main ()
14539 -{
14540 - int i;
14541 - init ();
14542 - foo ();
14543 - for (i = 0; i < N; ++i)
14544 - if (i % 2 == 1 && ca[i] != -2 * i - 1955)
14545 - abort ();
14546 - else if (i % 2 == 0 && ca[i] != 1955 + 2 * i)
14547 - abort ();
14548 - return 0;
14549 -}
14550 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-5.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-5.c
14551 deleted file mode 100644
14552 index b367fb6..0000000
14553 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-5.c
14554 +++ /dev/null
14555 @@ -1,45 +0,0 @@
14556 -/* { dg-do compile { target { powerpc64le-*-* } } } */
14557 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
14558 -/* { dg-options "-mcpu=power8 -O3" } */
14559 -/* { dg-final { scan-assembler "lxvd2x" } } */
14560 -/* { dg-final { scan-assembler "stxvd2x" } } */
14561 -/* { dg-final { scan-assembler-not "xxpermdi" } } */
14562 -
14563 -void abort ();
14564 -
14565 -#define N 4096
14566 -int ca[N] __attribute__((aligned(16)));
14567 -int cb[N] __attribute__((aligned(16)));
14568 -int cc[N] __attribute__((aligned(16)));
14569 -int cd[N] __attribute__((aligned(16)));
14570 -
14571 -__attribute__((noinline)) void foo ()
14572 -{
14573 - int i;
14574 - for (i = 0; i < N; i++) {
14575 - ca[i] = ((cb[i] + cc[i]) * cd[i]) >> 3;
14576 - }
14577 -}
14578 -
14579 -__attribute__((noinline)) void init ()
14580 -{
14581 - int i;
14582 - for (i = 0; i < N; ++i) {
14583 - cb[i] = 3 * i - 2048;
14584 - cc[i] = -5 * i + 93;
14585 - cd[i] = i % 2 ? 1 : -1;
14586 - }
14587 -}
14588 -
14589 -int main ()
14590 -{
14591 - int i;
14592 - init ();
14593 - foo ();
14594 - for (i = 0; i < N; ++i)
14595 - if (i % 2 == 1 && ca[i] != (-2 * i - 1955) >> 3)
14596 - abort ();
14597 - else if (i % 2 == 0 && ca[i] != (1955 + 2 * i) >> 3)
14598 - abort ();
14599 - return 0;
14600 -}
14601 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-6.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-6.c
14602 deleted file mode 100644
14603 index f708452..0000000
14604 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-6.c
14605 +++ /dev/null
14606 @@ -1,32 +0,0 @@
14607 -/* { dg-do run { target { powerpc64le-*-* } } } */
14608 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
14609 -/* { dg-options "-mcpu=power8 -O3" } */
14610 -
14611 -void abort();
14612 -
14613 -#define N 16
14614 -
14615 -signed char ca[N] __attribute__((aligned(16)));
14616 -signed char cb[] __attribute__((aligned(16)))
14617 - = {8, 7, 6, 5, 4, 3, 2, 1, 0, -1, -2, -3, -4, -5, -6, -7};
14618 -signed char cc[] __attribute__((aligned(16)))
14619 - = {1, 1, 2, 2, 3, 3, 2, 2, 1, 1, 0, 0, -1, -1, -2, -2};
14620 -
14621 -__attribute__((noinline)) void foo ()
14622 -{
14623 - int i;
14624 - for (i = 0; i < N; i++) {
14625 - ca[i] = cb[i] - cc[i];
14626 - }
14627 -}
14628 -
14629 -int main ()
14630 -{
14631 - signed char cd[] = {7, 6, 4, 3, 1, 0, 0, -1, -1, -2, -2, -3, -3, -4, -4, -5};
14632 - int i;
14633 - foo ();
14634 - for (i = 0; i < N; ++i)
14635 - if (ca[i] != cd[i])
14636 - abort ();
14637 - return 0;
14638 -}
14639 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-7.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-7.c
14640 deleted file mode 100644
14641 index 27a31b7..0000000
14642 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-7.c
14643 +++ /dev/null
14644 @@ -1,38 +0,0 @@
14645 -/* { dg-do run { target { powerpc64le-*-* } } } */
14646 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
14647 -/* { dg-options "-mcpu=power8 -O3" } */
14648 -
14649 -void abort ();
14650 -
14651 -#define N 256
14652 -signed char ca[N] __attribute__((aligned(16)));
14653 -signed char cb[N] __attribute__((aligned(16)));
14654 -signed char cc[N] __attribute__((aligned(16)));
14655 -
14656 -__attribute__((noinline)) void foo ()
14657 -{
14658 - int i;
14659 - for (i = 0; i < N; i++) {
14660 - ca[i] = cb[i] - cc[i];
14661 - }
14662 -}
14663 -
14664 -__attribute__((noinline)) void init ()
14665 -{
14666 - int i;
14667 - for (i = 0; i < N; ++i) {
14668 - cb[i] = i - 128;
14669 - cc[i] = i/2 - 64;
14670 - }
14671 -}
14672 -
14673 -int main ()
14674 -{
14675 - int i;
14676 - init ();
14677 - foo ();
14678 - for (i = 0; i < N; ++i)
14679 - if (ca[i] != i - i/2 - 64)
14680 - abort ();
14681 - return 0;
14682 -}
14683 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-8.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-8.c
14684 deleted file mode 100644
14685 index 7264d25..0000000
14686 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-8.c
14687 +++ /dev/null
14688 @@ -1,40 +0,0 @@
14689 -/* { dg-do run { target { powerpc64le-*-* } } } */
14690 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
14691 -/* { dg-options "-mcpu=power8 -O3" } */
14692 -
14693 -void abort ();
14694 -
14695 -#define N 4096
14696 -signed char ca[N] __attribute__((aligned(16)));
14697 -signed char cb[N] __attribute__((aligned(16)));
14698 -signed char cc[N] __attribute__((aligned(16)));
14699 -
14700 -__attribute__((noinline)) void foo ()
14701 -{
14702 - int i;
14703 - for (i = 0; i < N; i++) {
14704 - ca[i] = cb[i] - cc[i];
14705 - }
14706 -}
14707 -
14708 -__attribute__((noinline)) void init ()
14709 -{
14710 - int i, ii;
14711 - for (i = 0, ii = 0; i < N; ++i, ii = (ii + 1) % 128) {
14712 - cb[i] = ii - 128;
14713 - cc[i] = ii/2 - 64;
14714 - }
14715 -}
14716 -
14717 -int main ()
14718 -{
14719 - int i, ii;
14720 - init ();
14721 - foo ();
14722 - for (i = 0; i < N; ++i) {
14723 - ii = i % 128;
14724 - if (ca[i] != ii - ii/2 - 64)
14725 - abort ();
14726 - }
14727 - return 0;
14728 -}
14729 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-9.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-9.c
14730 deleted file mode 100644
14731 index cdca070..0000000
14732 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-9.c
14733 +++ /dev/null
14734 @@ -1,42 +0,0 @@
14735 -/* { dg-do run { target { powerpc64le-*-* } } } */
14736 -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
14737 -/* { dg-options "-mcpu=power8 -O3" } */
14738 -
14739 -void abort ();
14740 -
14741 -#define N 4096
14742 -int ca[N] __attribute__((aligned(16)));
14743 -int cb[N] __attribute__((aligned(16)));
14744 -int cc[N] __attribute__((aligned(16)));
14745 -int cd[N] __attribute__((aligned(16)));
14746 -
14747 -__attribute__((noinline)) void foo ()
14748 -{
14749 - int i;
14750 - for (i = 0; i < N; i++) {
14751 - ca[i] = (cb[i] + cc[i]) * cd[i];
14752 - }
14753 -}
14754 -
14755 -__attribute__((noinline)) void init ()
14756 -{
14757 - int i;
14758 - for (i = 0; i < N; ++i) {
14759 - cb[i] = 3 * i - 2048;
14760 - cc[i] = -5 * i + 93;
14761 - cd[i] = i % 2 ? 1 : -1;
14762 - }
14763 -}
14764 -
14765 -int main ()
14766 -{
14767 - int i;
14768 - init ();
14769 - foo ();
14770 - for (i = 0; i < N; ++i)
14771 - if (i % 2 == 1 && ca[i] != -2 * i - 1955)
14772 - abort ();
14773 - else if (i % 2 == 0 && ca[i] != 1955 + 2 * i)
14774 - abort ();
14775 - return 0;
14776 -}
14777 diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c
14778 index c17fe28..7bb7db0 100644
14779 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c
14780 +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c
14781 @@ -58,7 +58,7 @@ int main (void)
14782 }
14783
14784 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
14785 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
14786 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail {! vect_hw_misalign } } } } */
14787 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" } } */
14788 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
14789 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" {xfail {! vect_hw_misalign } } } } */
14790 /* { dg-final { cleanup-tree-dump "vect" } } */
14791 diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c
14792 index 952a68e..ad6f8f0 100644
14793 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c
14794 +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c
14795 @@ -54,7 +54,7 @@ int main (void)
14796 }
14797
14798 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
14799 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
14800 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail {! vect_hw_misalign } } } } */
14801 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" } } */
14802 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 3 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
14803 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 3 "vect" {xfail {! vect_hw_misalign } } } } */
14804 /* { dg-final { cleanup-tree-dump "vect" } } */
14805 diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c
14806 index 1538cc1..8e6e288 100644
14807 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c
14808 +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c
14809 @@ -58,7 +58,7 @@ int main (void)
14810 }
14811
14812 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
14813 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
14814 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail {! vect_hw_misalign } } } } */
14815 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" } } */
14816 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
14817 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" {xfail {! vect_hw_misalign } } } } */
14818 /* { dg-final { cleanup-tree-dump "vect" } } */
14819 diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c
14820 index a45233b..c095835 100644
14821 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c
14822 +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c
14823 @@ -58,7 +58,7 @@ int main (void)
14824 }
14825
14826 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
14827 -/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
14828 +/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail {! vect_hw_misalign } } } } */
14829 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" } } */
14830 -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
14831 +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" {xfail {! vect_hw_misalign } } } } */
14832 /* { dg-final { cleanup-tree-dump "vect" } } */
14833 diff --git a/gcc/testsuite/gcc.target/s390/20140327-1.c b/gcc/testsuite/gcc.target/s390/20140327-1.c
14834 index 25c7391..f71c38f 100644
14835 --- a/gcc/testsuite/gcc.target/s390/20140327-1.c
14836 +++ b/gcc/testsuite/gcc.target/s390/20140327-1.c
14837 @@ -1,5 +1,5 @@
14838 -/* { dg-do compile { target { ! lp64 } } } */
14839 -/* { dg-options "-O3 -mzarch" } */
14840 +/* { dg-do compile } */
14841 +/* { dg-options "-O3 -m31 -mzarch" } */
14842
14843 void
14844 foo ()
14845 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-1.c b/gcc/testsuite/gcc.target/s390/hotpatch-1.c
14846 index b14fa90..61d8f39 100644
14847 --- a/gcc/testsuite/gcc.target/s390/hotpatch-1.c
14848 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-1.c
14849 @@ -11,9 +11,6 @@ void hp1(void)
14850 }
14851
14852 /* Check number of occurences of certain instructions. */
14853 -/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
14854 -/* { dg-final { scan-assembler-not "post-label NOPs" } } */
14855 /* { dg-final { scan-assembler-not "nopr\t%r7" } } */
14856 /* { dg-final { scan-assembler-not "nop\t0" } } */
14857 -/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
14858 -/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
14859 +/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
14860 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-10.c b/gcc/testsuite/gcc.target/s390/hotpatch-10.c
14861 index a990c4c..1097ab4 100644
14862 --- a/gcc/testsuite/gcc.target/s390/hotpatch-10.c
14863 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-10.c
14864 @@ -11,9 +11,6 @@ void hp1(void)
14865 }
14866
14867 /* Check number of occurences of certain instructions. */
14868 -/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
14869 -/* { dg-final { scan-assembler-not "post-label NOPs" } } */
14870 /* { dg-final { scan-assembler-not "nopr\t%r7" } } */
14871 /* { dg-final { scan-assembler-not "nop\t0" } } */
14872 -/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
14873 -/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
14874 +/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
14875 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-11.c b/gcc/testsuite/gcc.target/s390/hotpatch-11.c
14876 index 6f8a52b..be08acc 100644
14877 --- a/gcc/testsuite/gcc.target/s390/hotpatch-11.c
14878 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-11.c
14879 @@ -11,8 +11,6 @@ void hp1(void)
14880 }
14881
14882 /* Check number of occurences of certain instructions. */
14883 -/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
14884 -/* { dg-final { scan-assembler-not "post-label NOPs" } } */
14885 /* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
14886 /* { dg-final { scan-assembler-not "nop\t0" } } */
14887 -/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
14888 +/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
14889 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-12.c b/gcc/testsuite/gcc.target/s390/hotpatch-12.c
14890 index b73ca90..6e909c0 100644
14891 --- a/gcc/testsuite/gcc.target/s390/hotpatch-12.c
14892 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-12.c
14893 @@ -11,8 +11,6 @@ void hp1(void)
14894 }
14895
14896 /* Check number of occurences of certain instructions. */
14897 -/* { dg-final { scan-assembler "pre-label.*(999 halfwords)" } } */
14898 -/* { dg-final { scan-assembler-not "post-label NOPs" } } */
14899 /* { dg-final { scan-assembler-times "nopr\t%r7" 999 } } */
14900 /* { dg-final { scan-assembler-not "nop\t0" } } */
14901 -/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
14902 +/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
14903 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-13.c b/gcc/testsuite/gcc.target/s390/hotpatch-13.c
14904 index 150667a..959789c 100644
14905 --- a/gcc/testsuite/gcc.target/s390/hotpatch-13.c
14906 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-13.c
14907 @@ -12,10 +12,6 @@ void hp1(void)
14908 }
14909
14910 /* Check number of occurences of certain instructions. */
14911 -/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
14912 -/* { dg-final { scan-assembler-not "post-label NOPs" } } */
14913 /* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
14914 /* { dg-final { scan-assembler-not "nop\t0" } } */
14915 -/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
14916 -/* { dg-final { scan-assembler "alignment for hotpatch" } } */
14917 -/* { dg-final { scan-assembler-times "\.align\t8" 2 } } */
14918 +/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
14919 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-14.c b/gcc/testsuite/gcc.target/s390/hotpatch-14.c
14920 index c5f118c..0f1f41f 100644
14921 --- a/gcc/testsuite/gcc.target/s390/hotpatch-14.c
14922 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-14.c
14923 @@ -12,9 +12,6 @@ void hp1(void)
14924 }
14925
14926 /* Check number of occurences of certain instructions. */
14927 -/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
14928 -/* { dg-final { scan-assembler "post-label.*(2 halfwords)" } } */
14929 /* { dg-final { scan-assembler-not "nopr\t%r7" } } */
14930 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
14931 -/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
14932 -/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
14933 +/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
14934 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-15.c b/gcc/testsuite/gcc.target/s390/hotpatch-15.c
14935 index ef0fb74..e306495 100644
14936 --- a/gcc/testsuite/gcc.target/s390/hotpatch-15.c
14937 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-15.c
14938 @@ -12,8 +12,6 @@ void hp1(void)
14939 }
14940
14941 /* Check number of occurences of certain instructions. */
14942 -/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
14943 -/* { dg-final { scan-assembler "post-label.*(2 halfwords)" } } */
14944 /* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
14945 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
14946 -/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
14947 +/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
14948 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-16.c b/gcc/testsuite/gcc.target/s390/hotpatch-16.c
14949 index a34bf95..66f13fe 100644
14950 --- a/gcc/testsuite/gcc.target/s390/hotpatch-16.c
14951 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-16.c
14952 @@ -12,8 +12,6 @@ void hp1(void)
14953 }
14954
14955 /* Check number of occurences of certain instructions. */
14956 -/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
14957 -/* { dg-final { scan-assembler "post-label.*(2 halfwords)" } } */
14958 /* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
14959 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
14960 -/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
14961 +/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
14962 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-17.c b/gcc/testsuite/gcc.target/s390/hotpatch-17.c
14963 index 66ac725..b301c5c 100644
14964 --- a/gcc/testsuite/gcc.target/s390/hotpatch-17.c
14965 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-17.c
14966 @@ -12,9 +12,6 @@ void hp1(void)
14967 }
14968
14969 /* Check number of occurences of certain instructions. */
14970 -/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
14971 -/* { dg-final { scan-assembler-not "post-label NOPs" } } */
14972 /* { dg-final { scan-assembler-not "nopr\t%r7" } } */
14973 /* { dg-final { scan-assembler-not "nop\t0" } } */
14974 -/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
14975 -/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
14976 +/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
14977 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-18.c b/gcc/testsuite/gcc.target/s390/hotpatch-18.c
14978 index 8b076a4..1c06783 100644
14979 --- a/gcc/testsuite/gcc.target/s390/hotpatch-18.c
14980 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-18.c
14981 @@ -11,9 +11,6 @@ void hp1(void)
14982 }
14983
14984 /* Check number of occurences of certain instructions. */
14985 -/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
14986 -/* { dg-final { scan-assembler-not "post-label NOPs" } } */
14987 /* { dg-final { scan-assembler-not "nopr\t%r7" } } */
14988 /* { dg-final { scan-assembler-not "nop\t0" } } */
14989 -/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
14990 -/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
14991 +/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
14992 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-19.c b/gcc/testsuite/gcc.target/s390/hotpatch-19.c
14993 index 6993c7e..a1ec9c7 100644
14994 --- a/gcc/testsuite/gcc.target/s390/hotpatch-19.c
14995 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-19.c
14996 @@ -18,8 +18,6 @@ void hp1(void)
14997 }
14998
14999 /* Check number of occurences of certain instructions. */
15000 -/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
15001 -/* { dg-final { scan-assembler "post-label.*(2 halfwords)" } } */
15002 /* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
15003 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
15004 -/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
15005 +/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
15006 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-2.c b/gcc/testsuite/gcc.target/s390/hotpatch-2.c
15007 index 67189f8..0c82a5a 100644
15008 --- a/gcc/testsuite/gcc.target/s390/hotpatch-2.c
15009 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-2.c
15010 @@ -11,9 +11,6 @@ void hp1(void)
15011 }
15012
15013 /* Check number of occurences of certain instructions. */
15014 -/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
15015 -/* { dg-final { scan-assembler "post-label.*(1 halfwords)" } } */
15016 /* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
15017 /* { dg-final { scan-assembler-not "nop\t0" } } */
15018 -/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
15019 -/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
15020 +/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
15021 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-21.c b/gcc/testsuite/gcc.target/s390/hotpatch-21.c
15022 deleted file mode 100644
15023 index e909990..0000000
15024 --- a/gcc/testsuite/gcc.target/s390/hotpatch-21.c
15025 +++ /dev/null
15026 @@ -1,14 +0,0 @@
15027 -/* Functional tests for the function hotpatching feature. */
15028 -
15029 -/* { dg-do compile } */
15030 -/* { dg-options "-O3 -mzarch -mhotpatch=0,1" } */
15031 -
15032 -#include <stdio.h>
15033 -
15034 -void __attribute__ ((aligned(512))) hp1(void)
15035 -{
15036 - printf("hello, world!\n");
15037 -}
15038 -
15039 -/* Check number of occurences of certain instructions. */
15040 -/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
15041 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-22.c b/gcc/testsuite/gcc.target/s390/hotpatch-22.c
15042 deleted file mode 100644
15043 index d89d779..0000000
15044 --- a/gcc/testsuite/gcc.target/s390/hotpatch-22.c
15045 +++ /dev/null
15046 @@ -1,14 +0,0 @@
15047 -/* Functional tests for the function hotpatching feature. */
15048 -
15049 -/* { dg-do compile } */
15050 -/* { dg-options "-O3 -mzarch -mhotpatch=0,1 -falign-functions=1024" } */
15051 -
15052 -#include <stdio.h>
15053 -
15054 -void hp1(void)
15055 -{
15056 - printf("hello, world!\n");
15057 -}
15058 -
15059 -/* Check number of occurences of certain instructions. */
15060 -/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
15061 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-23.c b/gcc/testsuite/gcc.target/s390/hotpatch-23.c
15062 deleted file mode 100644
15063 index 1e05d12..0000000
15064 --- a/gcc/testsuite/gcc.target/s390/hotpatch-23.c
15065 +++ /dev/null
15066 @@ -1,14 +0,0 @@
15067 -/* Functional tests for the function hotpatching feature. */
15068 -
15069 -/* { dg-do compile } */
15070 -/* { dg-options "-O3 -mzarch -mhotpatch=0,1 -falign-functions=4096" } */
15071 -
15072 -#include <stdio.h>
15073 -
15074 -void __attribute__ ((aligned(2048))) hp1(void)
15075 -{
15076 - printf("hello, world!\n");
15077 -}
15078 -
15079 -/* Check number of occurences of certain instructions. */
15080 -/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
15081 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-24.c b/gcc/testsuite/gcc.target/s390/hotpatch-24.c
15082 deleted file mode 100644
15083 index fc64274..0000000
15084 --- a/gcc/testsuite/gcc.target/s390/hotpatch-24.c
15085 +++ /dev/null
15086 @@ -1,14 +0,0 @@
15087 -/* Functional tests for the function hotpatching feature. */
15088 -
15089 -/* { dg-do compile } */
15090 -/* { dg-options "-O3 -mzarch -mhotpatch=0,1 -falign-functions=2048" } */
15091 -
15092 -#include <stdio.h>
15093 -
15094 -void __attribute__ ((aligned(4096))) hp1(void)
15095 -{
15096 - printf("hello, world!\n");
15097 -}
15098 -
15099 -/* Check number of occurences of certain instructions. */
15100 -/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
15101 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-25.c b/gcc/testsuite/gcc.target/s390/hotpatch-25.c
15102 deleted file mode 100644
15103 index e9257e3..0000000
15104 --- a/gcc/testsuite/gcc.target/s390/hotpatch-25.c
15105 +++ /dev/null
15106 @@ -1,33 +0,0 @@
15107 -/* Functional tests for the function hotpatching feature. */
15108 -
15109 -/* { dg-do compile } */
15110 -/* { dg-options "-O3 -mzarch" } */
15111 -
15112 -typedef long (*fn_t)(void);
15113 -
15114 -__attribute__ ((hotpatch(1,2)))
15115 -fn_t outer(void)
15116 -{
15117 - __attribute__ ((hotpatch(4,8)))
15118 - long nested1(void)
15119 - {
15120 - __attribute__ ((hotpatch(16,32)))
15121 - long nested2(void)
15122 - {
15123 - return 2;
15124 - }
15125 - return (long)(void *)nested2;
15126 - }
15127 -
15128 - return nested1;
15129 -}
15130 -
15131 -/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
15132 -/* { dg-final { scan-assembler "pre-label.*(4 halfwords)" } } */
15133 -/* { dg-final { scan-assembler "pre-label.*(16 halfwords)" } } */
15134 -/* { dg-final { scan-assembler "post-label.*(2 halfwords)" } } */
15135 -/* { dg-final { scan-assembler "post-label.*(8 halfwords)" } } */
15136 -/* { dg-final { scan-assembler "post-label.*(32 halfwords)" } } */
15137 -/* { dg-final { scan-assembler-times "alignment for hotpatch" 3 } } */
15138 -/* { dg-final { scan-assembler-times "\.align\t8" 6 } } */
15139 -/* { dg-final { scan-assembler "nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr" } } */
15140 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-3.c b/gcc/testsuite/gcc.target/s390/hotpatch-3.c
15141 index ec4a978..041ef9c 100644
15142 --- a/gcc/testsuite/gcc.target/s390/hotpatch-3.c
15143 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-3.c
15144 @@ -11,8 +11,6 @@ void hp1(void)
15145 }
15146
15147 /* Check number of occurences of certain instructions. */
15148 -/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
15149 -/* { dg-final { scan-assembler "post-label.*(2 halfwords)" } } */
15150 /* { dg-final { scan-assembler-not "nopr\t%r7" } } */
15151 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
15152 -/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
15153 +/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
15154 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-4.c b/gcc/testsuite/gcc.target/s390/hotpatch-4.c
15155 index d55e71d..050a065 100644
15156 --- a/gcc/testsuite/gcc.target/s390/hotpatch-4.c
15157 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-4.c
15158 @@ -11,8 +11,6 @@ void hp1(void)
15159 }
15160
15161 /* Check number of occurences of certain instructions. */
15162 -/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
15163 -/* { dg-final { scan-assembler "post-label.*(3 halfwords)" } } */
15164 /* { dg-final { scan-assembler-not "nopr\t%r7" } } */
15165 /* { dg-final { scan-assembler-not "nop\t0" } } */
15166 -/* { dg-final { scan-assembler-times "brcl\t0, 0" 1 } } */
15167 +/* { dg-final { scan-assembler-times "brcl\t\t0,0" 1 } } */
15168 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-5.c b/gcc/testsuite/gcc.target/s390/hotpatch-5.c
15169 index f77d83a..785dba7 100644
15170 --- a/gcc/testsuite/gcc.target/s390/hotpatch-5.c
15171 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-5.c
15172 @@ -11,8 +11,6 @@ void hp1(void)
15173 }
15174
15175 /* Check number of occurences of certain instructions. */
15176 -/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
15177 -/* { dg-final { scan-assembler "post-label.*(4 halfwords)" } } */
15178 /* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
15179 /* { dg-final { scan-assembler-not "nop\t0" } } */
15180 -/* { dg-final { scan-assembler-times "brcl\t0, 0" 1 } } */
15181 +/* { dg-final { scan-assembler-times "brcl\t\t0,0" 1 } } */
15182 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-6.c b/gcc/testsuite/gcc.target/s390/hotpatch-6.c
15183 index 330cf5d..da96e43 100644
15184 --- a/gcc/testsuite/gcc.target/s390/hotpatch-6.c
15185 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-6.c
15186 @@ -11,8 +11,6 @@ void hp1(void)
15187 }
15188
15189 /* Check number of occurences of certain instructions. */
15190 -/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
15191 -/* { dg-final { scan-assembler "post-label.*(5 halfwords)" } } */
15192 /* { dg-final { scan-assembler-not "nopr\t%r7" } } */
15193 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
15194 -/* { dg-final { scan-assembler-times "brcl\t0, 0" 1 } } */
15195 +/* { dg-final { scan-assembler-times "brcl\t\t0,0" 1 } } */
15196 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-7.c b/gcc/testsuite/gcc.target/s390/hotpatch-7.c
15197 index 2f24e3cc..b7c19d7 100644
15198 --- a/gcc/testsuite/gcc.target/s390/hotpatch-7.c
15199 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-7.c
15200 @@ -11,8 +11,6 @@ void hp1(void)
15201 }
15202
15203 /* Check number of occurences of certain instructions. */
15204 -/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
15205 -/* { dg-final { scan-assembler "post-label.*(6 halfwords)" } } */
15206 /* { dg-final { scan-assembler-not "nopr\t%r7" } } */
15207 /* { dg-final { scan-assembler-not "nop\t0" } } */
15208 -/* { dg-final { scan-assembler-times "brcl\t0, 0" 2 } } */
15209 +/* { dg-final { scan-assembler-times "brcl\t\t0,0" 2 } } */
15210 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-8.c b/gcc/testsuite/gcc.target/s390/hotpatch-8.c
15211 index 7b266bd..0874bbc 100644
15212 --- a/gcc/testsuite/gcc.target/s390/hotpatch-8.c
15213 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-8.c
15214 @@ -1,7 +1,7 @@
15215 /* Functional tests for the function hotpatching feature. */
15216
15217 -/* { dg-do compile { target { ! lp64 } } } */
15218 -/* { dg-options "-O3 -mesa -march=g5 -mhotpatch=0,3" } */
15219 +/* { dg-do compile } */
15220 +/* { dg-options "-O3 -mesa -m31 -march=g5 -mhotpatch=0,3" } */
15221
15222 #include <stdio.h>
15223
15224 @@ -11,9 +11,6 @@ void hp1(void)
15225 }
15226
15227 /* Check number of occurences of certain instructions. */
15228 -/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
15229 -/* { dg-final { scan-assembler "post-label.*(3 halfwords)" } } */
15230 /* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
15231 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
15232 -/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
15233 -/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
15234 +/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
15235 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-9.c b/gcc/testsuite/gcc.target/s390/hotpatch-9.c
15236 index c0ad319..d6fb29a 100644
15237 --- a/gcc/testsuite/gcc.target/s390/hotpatch-9.c
15238 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-9.c
15239 @@ -1,7 +1,7 @@
15240 /* Functional tests for the function hotpatching feature. */
15241
15242 -/* { dg-do compile { target { ! lp64 } } } */
15243 -/* { dg-options "-O3 -mesa -march=g5 -mhotpatch=0,4" } */
15244 +/* { dg-do compile } */
15245 +/* { dg-options "-O3 -mesa -m31 -march=g5 -mhotpatch=0,4" } */
15246
15247 #include <stdio.h>
15248
15249 @@ -11,8 +11,6 @@ void hp1(void)
15250 }
15251
15252 /* Check number of occurences of certain instructions. */
15253 -/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
15254 -/* { dg-final { scan-assembler "post-label.*(4 halfwords)" } } */
15255 /* { dg-final { scan-assembler-not "nopr\t%r7" } } */
15256 /* { dg-final { scan-assembler-times "nop\t0" 2 } } */
15257 -/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
15258 +/* { dg-final { scan-assembler-not "brcl\t\t0,0" } } */
15259 diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-compile-16.c b/gcc/testsuite/gcc.target/s390/hotpatch-compile-16.c
15260 index 2e8291e..3c5c782 100644
15261 --- a/gcc/testsuite/gcc.target/s390/hotpatch-compile-16.c
15262 +++ b/gcc/testsuite/gcc.target/s390/hotpatch-compile-16.c
15263 @@ -1,4 +1,4 @@
15264 -/* Functional tests for the function hotpatching feature. */
15265 +/* A warning will be issued when requesting hotpatching on a nested function. */
15266
15267 /* { dg-do compile } */
15268 /* { dg-options "-O3 -mzarch" } */
15269 @@ -17,7 +17,7 @@ fn_t hp1(void)
15270 fn_t hp2(void)
15271 {
15272 __attribute__ ((hotpatch(1,2)))
15273 - int nested2(void)
15274 + int nested2(void) /* { dg-warning "hotpatching is not compatible with nested functions" } */
15275 { return 2; }
15276
15277 return nested2;
15278 diff --git a/gcc/testsuite/gcc.target/s390/pr57559.c b/gcc/testsuite/gcc.target/s390/pr57559.c
15279 index 1c62f56..15c3878 100644
15280 --- a/gcc/testsuite/gcc.target/s390/pr57559.c
15281 +++ b/gcc/testsuite/gcc.target/s390/pr57559.c
15282 @@ -1,7 +1,7 @@
15283 /* PR rtl-optimization/57559 */
15284
15285 /* { dg-do compile } */
15286 -/* { dg-options "-march=z10 -mzarch -O1" } */
15287 +/* { dg-options "-march=z10 -m64 -mzarch -O1" } */
15288
15289 typedef int int32_t;
15290 typedef unsigned char uint8_t;
15291 diff --git a/gcc/testsuite/gcc.target/s390/pr57960.c b/gcc/testsuite/gcc.target/s390/pr57960.c
15292 index 03578ff..ee751ed 100644
15293 --- a/gcc/testsuite/gcc.target/s390/pr57960.c
15294 +++ b/gcc/testsuite/gcc.target/s390/pr57960.c
15295 @@ -1,7 +1,7 @@
15296 /* PR rtl-optimization/57960 */
15297
15298 /* { dg-do compile } */
15299 -/* { dg-options "-march=z10 -mzarch -O1" } */
15300 +/* { dg-options "-march=z10 -m64 -mzarch -O1" } */
15301
15302 typedef union
15303 {
15304 diff --git a/gcc/testsuite/gcc.target/sh/pr53988.c b/gcc/testsuite/gcc.target/sh/pr53988.c
15305 index 926bb047..a2e7213 100644
15306 --- a/gcc/testsuite/gcc.target/sh/pr53988.c
15307 +++ b/gcc/testsuite/gcc.target/sh/pr53988.c
15308 @@ -5,9 +5,9 @@
15309 /* { dg-do compile } */
15310 /* { dg-options "-O1" } */
15311 /* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
15312 -/* { dg-final { scan-assembler-times "tst\tr" 8 { xfail *-*-*} } } */
15313 -/* { dg-final { scan-assembler-not "tst\t#255" { xfail *-*-*} } } */
15314 -/* { dg-final { scan-assembler-not "exts|extu|and|movu" { xfail *-*-*} } } */
15315 +/* { dg-final { scan-assembler-times "tst\tr" 8 } } */
15316 +/* { dg-final { scan-assembler-not "tst\t#255" } } */
15317 +/* { dg-final { scan-assembler-not "exts|extu|and|movu" } } */
15318
15319 int
15320 test00 (char* a, char* b, int c, int d)
15321 diff --git a/gcc/testsuite/gfortran.dg/entry_20.f90 b/gcc/testsuite/gfortran.dg/entry_20.f90
15322 deleted file mode 100644
15323 index 1069d1e..0000000
15324 --- a/gcc/testsuite/gfortran.dg/entry_20.f90
15325 +++ /dev/null
15326 @@ -1,148 +0,0 @@
15327 -! { dg-do compile }
15328 -!
15329 -! PR fortran/50898
15330 -! A symbol was freed prematurely during resolution,
15331 -! despite remaining reachable
15332 -!
15333 -! Original testcase from <shaojuncycle@gmail.com>
15334 -
15335 -MODULE MODULE_pmat2
15336 -
15337 -IMPLICIT NONE
15338 -
15339 -INTERFACE cad1b; MODULE PROCEDURE cad1b; END INTERFACE
15340 -INTERFACE csb1b; MODULE PROCEDURE csb1b; END INTERFACE
15341 -INTERFACE copbt; MODULE PROCEDURE copbt; END INTERFACE
15342 -INTERFACE conbt; MODULE PROCEDURE conbt; END INTERFACE
15343 -INTERFACE copmb; MODULE PROCEDURE copmb; END INTERFACE
15344 -INTERFACE conmb; MODULE PROCEDURE conmb; END INTERFACE
15345 -INTERFACE copbm; MODULE PROCEDURE copbm; END INTERFACE
15346 -INTERFACE conbm; MODULE PROCEDURE conbm; END INTERFACE
15347 -INTERFACE mulvb; MODULE PROCEDURE mulvb; END INTERFACE
15348 -INTERFACE madvb; MODULE PROCEDURE madvb; END INTERFACE
15349 -INTERFACE msbvb; MODULE PROCEDURE msbvb; END INTERFACE
15350 -INTERFACE mulxb; MODULE PROCEDURE mulxb; END INTERFACE
15351 -INTERFACE madxb; MODULE PROCEDURE madxb; END INTERFACE
15352 -INTERFACE msbxb; MODULE PROCEDURE msbxb; END INTERFACE
15353 -
15354 -integer, parameter :: i_kind=4
15355 -integer, parameter :: r_kind=4
15356 -real(r_kind), parameter :: zero=0.0
15357 -real(r_kind), parameter :: one=1.0
15358 -real(r_kind), parameter :: two=2.0
15359 -
15360 -CONTAINS
15361 -
15362 -SUBROUTINE cad1b(a,m1,mah1,mah2,mirror2)
15363 -implicit none
15364 -INTEGER(i_kind), INTENT(IN ) :: m1,mah1,mah2,mirror2
15365 -REAL(r_kind), INTENT(INOUT) :: a(0:m1-1,-mah1:mah2)
15366 -RETURN
15367 -ENTRY csb1b(a,m1,mah1,mah2,mirror2)
15368 -END SUBROUTINE cad1b
15369 -
15370 -SUBROUTINE copbt(a,b,m1,m2,mah1,mah2)
15371 -implicit none
15372 -INTEGER(i_kind), INTENT(IN ) :: m1, m2, mah1, mah2
15373 -REAL(r_kind), INTENT(IN ) :: a(m1,-mah1:mah2)
15374 -REAL(r_kind), INTENT( OUT) :: b(m2,-mah2:mah1)
15375 -RETURN
15376 -ENTRY conbt(a,b,m1,m2,mah1,mah2)
15377 -END SUBROUTINE copbt
15378 -
15379 -SUBROUTINE copmb(afull,aband,m1,m2,mah1,mah2)
15380 -implicit none
15381 -INTEGER(i_kind), INTENT(IN ) :: m1, m2, mah1, mah2
15382 -REAL(r_kind), DIMENSION(m1,m2), INTENT(IN ) :: afull
15383 -REAL(r_kind), DIMENSION(m1,-mah1:mah2),INTENT( OUT) :: aband
15384 -RETURN
15385 -ENTRY conmb(afull,aband,m1,m2,mah1,mah2)
15386 -END SUBROUTINE copmb
15387 -
15388 -SUBROUTINE copbm(aband,afull,m1,m2,mah1,mah2)
15389 -implicit none
15390 -INTEGER(i_kind), INTENT(IN ) :: m1, m2, mah1, mah2
15391 -REAL(r_kind), DIMENSION(m1,-mah1:mah2),INTENT(IN ) :: aband
15392 -REAL(r_kind), DIMENSION(m1,m2), INTENT( OUT) :: afull
15393 -RETURN
15394 -ENTRY conbm(aband,afull,m1,m2,mah1,mah2)
15395 -END SUBROUTINE copbm
15396 -
15397 -SUBROUTINE mulbb(a,b,c,m1,m2,mah1,mah2,mbh1,mbh2,mch1,mch2)
15398 -implicit none
15399 -INTEGER(i_kind), INTENT(IN ) :: m1, m2, mah1, mah2, mbh1, mbh2, mch1, mch2
15400 -REAL(r_kind), INTENT(IN ) :: a(m1,-mah1:mah2), b(m2,-mbh1:mbh2)
15401 -REAL(r_kind), INTENT(INOUT) :: c(m1,-mch1:mch2)
15402 -INTEGER(i_kind) :: nch1, nch2, j, k, jpk, i1,i2
15403 -c=zero
15404 -ENTRY madbb(a,b,c,m1,m2,mah1,mah2,mbh1,mbh2,mch1,mch2)
15405 -nch1=mah1+mbh1; nch2=mah2+mbh2
15406 -IF(nch1 /= mch1 .OR. nch2 /= mch2)STOP 'In MULBB, dimensions inconsistent'
15407 -DO j=-mah1,mah2
15408 - DO k=-mbh1,mbh2; jpk=j+k; i1=MAX(1,1-j); i2=MIN(m1,m2-j)
15409 - c(i1:i2,jpk)=c(i1:i2,jpk)+a(i1:i2,j)*b(j+i1:j+i2,k)
15410 - ENDDO
15411 -ENDDO
15412 -END SUBROUTINE mulbb
15413 -
15414 -SUBROUTINE MULVB(v1,a,v2, m1,m2,mah1,mah2)
15415 -implicit none
15416 -INTEGER(i_kind), INTENT(IN ) :: m1, m2, mah1, mah2
15417 -REAL(r_kind), INTENT(IN ) :: v1(m1), a(m1,-mah1:mah2)
15418 -REAL(r_kind), INTENT( OUT) :: v2(m2)
15419 -INTEGER(i_kind) :: j, i1,i2
15420 -v2=zero
15421 -ENTRY madvb(v1,a,v2, m1,m2,mah1,mah2)
15422 -DO j=-mah1,mah2; i1=MAX(1,1-j); i2=MIN(m1,m2-j)
15423 - v2(j+i1:j+i2)=v2(j+i1:j+i2)+v1(i1:i2)*a(i1:i2,j)
15424 -ENDDO
15425 -RETURN
15426 -ENTRY msbvb(v1,a,v2, m1,m2,mah1,mah2)
15427 -DO j=-mah1,mah2; i1=MAX(1,1-j); i2=MIN(m1,m2-j)
15428 - v2(j+i1:j+i2)=v2(j+i1:j+i2)-v1(i1:i2)*a(i1:i2,j)
15429 -ENDDO
15430 -END SUBROUTINE mulvb
15431 -
15432 -SUBROUTINE mulxb(v1,a,v2, m1,m2,mah1,mah2,my)
15433 -implicit none
15434 -INTEGER(i_kind), INTENT(IN ) :: m1, m2, mah1, mah2, my
15435 -REAL(r_kind), INTENT(IN ) :: v1(m1,my), a(m1,-mah1:mah2)
15436 -REAL(r_kind), INTENT( OUT) :: v2(m2,my)
15437 -INTEGER(i_kind) :: i,j
15438 -v2=zero
15439 -ENTRY madxb(v1,a,v2, m1,m2,mah1,mah2,my)
15440 -DO j=-mah1,mah2
15441 - DO i=MAX(1,1-j),MIN(m1,m2-j); v2(j+i,:)=v2(j+i,:)+v1(i,:)*a(i,j); ENDDO
15442 -ENDDO
15443 -RETURN
15444 -ENTRY msbxb(v1,a,v2, m1,m2,mah1,mah2,my)
15445 -DO j=-mah1,mah2
15446 - DO i=MAX(1,1-j),MIN(m1,m2-j); v2(j+i,:)=v2(j+i,:)-v1(i,:)*a(i,j); ENDDO
15447 -ENDDO
15448 -END SUBROUTINE mulxb
15449 -
15450 -SUBROUTINE mulyb(v1,a,v2, m1,m2,mah1,mah2,mx)
15451 -implicit none
15452 -INTEGER(i_kind), INTENT(IN ) :: m1, m2, mah1, mah2, mx
15453 -REAL(r_kind), INTENT(IN ) :: v1(mx,m1), a(m1,-mah1:mah2)
15454 -REAL(r_kind), INTENT( OUT) :: v2(mx,m2)
15455 -INTEGER(i_kind) :: i,j
15456 -v2=zero
15457 -ENTRY madyb(v1,a,v2, m1,m2,mah1,mah2,mx)
15458 -DO j=-mah1,mah2
15459 - DO i=MAX(1,1-j),MIN(m1,m2-j)
15460 - v2(:,j+i)=v2(:,j+i)+v1(:,i)*a(i,j)
15461 - ENDDO
15462 -ENDDO
15463 -RETURN
15464 -ENTRY msbyb(v1,a,v2, m1,m2,mah1,mah2,mx)
15465 - DO j=-mah1,mah2
15466 - DO i=MAX(1,1-j),MIN(m1,m2-j)
15467 - v2(:,j+i)=v2(:,j+i)-v1(:,i)*a(i,j)
15468 - ENDDO
15469 - ENDDO
15470 -RETURN
15471 -END SUBROUTINE mulyb
15472 -
15473 -END MODULE MODULE_pmat2
15474 -
15475 diff --git a/gcc/testsuite/gfortran.dg/namelist_86.f90 b/gcc/testsuite/gfortran.dg/namelist_86.f90
15476 deleted file mode 100644
15477 index 88d90d2..0000000
15478 --- a/gcc/testsuite/gfortran.dg/namelist_86.f90
15479 +++ /dev/null
15480 @@ -1,49 +0,0 @@
15481 -! { dg-do run }
15482 -! { dg-options "-std=f2003 -fall-intrinsics" }
15483 -! PR65596 Namelist reads too far.
15484 -integer ,parameter :: CL=80
15485 -integer ,parameter :: AL=4
15486 -
15487 -character(CL) :: mode
15488 -character(CL) :: cats(AL)
15489 -character(CL) :: dogs(AL)
15490 -character(CL) :: rslt(AL)
15491 -integer :: ierr, k
15492 -
15493 -namelist / theList / cats, dogs, mode
15494 -
15495 -open(27,status="scratch")
15496 -
15497 -write(27,'(A)') "&theList"
15498 -write(27,'(A)') " mode = 'on'"
15499 -write(27,'(A)') " dogs = 'Rover',"
15500 -write(27,'(A)') " 'Spot'"
15501 -write(27,'(A)') " cats = 'Fluffy',"
15502 -write(27,'(A)') " 'Hairball'"
15503 -write(27,'(A)') "/"
15504 -rewind(27)
15505 -
15506 -mode = 'off'
15507 -cats(:) = '________'
15508 -dogs(:) = '________'
15509 -
15510 -read (27, nml=theList, iostat=ierr)
15511 -
15512 -if (ierr .ne. 0) call abort
15513 -
15514 -rslt = ['Rover ','Spot ','________','________']
15515 -if (any(dogs.ne.rslt)) call abort
15516 -
15517 -rslt = ['Fluffy ','Hairball','________','________']
15518 -if (any(cats.ne.rslt)) call abort
15519 -
15520 -close(27)
15521 -
15522 -contains
15523 -
15524 -subroutine abort()
15525 - close(27)
15526 - stop 500
15527 -end subroutine abort
15528 -
15529 -end
15530 diff --git a/gcc/testsuite/gfortran.dg/pointer_remapping_9.f90 b/gcc/testsuite/gfortran.dg/pointer_remapping_9.f90
15531 deleted file mode 100644
15532 index 7c1e232..0000000
15533 --- a/gcc/testsuite/gfortran.dg/pointer_remapping_9.f90
15534 +++ /dev/null
15535 @@ -1,31 +0,0 @@
15536 -! { dg-do run }
15537 -!
15538 -! PR fortran/61138
15539 -! Wrong code with pointer-bounds remapping
15540 -!
15541 -! Contributed by Tobias Burnus <burnus@net-b.de>
15542 -
15543 -implicit none
15544 -integer, target :: tgt(10)
15545 -integer, target, allocatable :: tgt2(:)
15546 -integer, pointer :: ptr(:)
15547 -
15548 -tgt = [1,2,3,4,5,6,7,8,9,10]
15549 -tgt2 = [1,2,3,4,5,6,7,8,9,10]
15550 -
15551 -
15552 -ptr(-5:) => tgt(5:) ! Okay
15553 -
15554 -if (size(ptr) /= 6 .or. lbound(ptr,1) /= -5) call abort()
15555 -if (any (ptr /= [5,6,7,8,9,10])) call abort()
15556 -
15557 -
15558 -ptr(-5:) => tgt2(5:) ! wrongly associates the whole array
15559 -
15560 -print '(*(i4))', size(ptr), lbound(ptr)
15561 -print '(*(i4))', ptr
15562 -
15563 -if (size(ptr) /= 6 .or. lbound(ptr,1) /= -5) call abort()
15564 -if (any (ptr /= [5,6,7,8,9,10])) call abort()
15565 -end
15566 -
15567 diff --git a/gcc/testsuite/gfortran.dg/proc_ptr_comp_44.f90 b/gcc/testsuite/gfortran.dg/proc_ptr_comp_44.f90
15568 deleted file mode 100644
15569 index 15795c2..0000000
15570 --- a/gcc/testsuite/gfortran.dg/proc_ptr_comp_44.f90
15571 +++ /dev/null
15572 @@ -1,71 +0,0 @@
15573 -! { dg-do compile }
15574 -! Test the fix for PR59198, where the field for the component 'term' in
15575 -! the derived type 'decay_gen_t' was not being built.
15576 -!
15577 -! Contributed by Juergen Reuter <juergen.reuter@desy.de>
15578 -!
15579 -module decays
15580 - abstract interface
15581 - function obs_unary_int ()
15582 - end function obs_unary_int
15583 - end interface
15584 -
15585 - type, abstract :: any_config_t
15586 - contains
15587 - procedure (any_config_final), deferred :: final
15588 - end type any_config_t
15589 -
15590 - type :: decay_term_t
15591 - type(unstable_t), dimension(:), pointer :: unstable_product => null ()
15592 - end type decay_term_t
15593 -
15594 - type, abstract :: decay_gen_t
15595 - type(decay_term_t), dimension(:), allocatable :: term
15596 - procedure(obs_unary_int), nopass, pointer :: obs1_int => null ()
15597 - end type decay_gen_t
15598 -
15599 - type, extends (decay_gen_t) :: decay_root_t
15600 - contains
15601 - procedure :: final => decay_root_final
15602 - end type decay_root_t
15603 -
15604 - type, abstract :: rng_t
15605 - end type rng_t
15606 -
15607 - type, extends (decay_gen_t) :: decay_t
15608 - class(rng_t), allocatable :: rng
15609 - contains
15610 - procedure :: final => decay_final
15611 - end type decay_t
15612 -
15613 - type, extends (any_config_t) :: unstable_config_t
15614 - contains
15615 - procedure :: final => unstable_config_final
15616 - end type unstable_config_t
15617 -
15618 - type :: unstable_t
15619 - type(unstable_config_t), pointer :: config => null ()
15620 - type(decay_t), dimension(:), allocatable :: decay
15621 - end type unstable_t
15622 -
15623 - interface
15624 - subroutine any_config_final (object)
15625 - import
15626 - class(any_config_t), intent(inout) :: object
15627 - end subroutine any_config_final
15628 - end interface
15629 -
15630 -contains
15631 - subroutine decay_root_final (object)
15632 - class(decay_root_t), intent(inout) :: object
15633 - end subroutine decay_root_final
15634 -
15635 - recursive subroutine decay_final (object)
15636 - class(decay_t), intent(inout) :: object
15637 - end subroutine decay_final
15638 -
15639 - recursive subroutine unstable_config_final (object)
15640 - class(unstable_config_t), intent(inout) :: object
15641 - end subroutine unstable_config_final
15642 -
15643 -end module decays
15644 diff --git a/gcc/testsuite/gfortran.dg/proc_ptr_comp_45.f90 b/gcc/testsuite/gfortran.dg/proc_ptr_comp_45.f90
15645 deleted file mode 100644
15646 index 3180345..0000000
15647 --- a/gcc/testsuite/gfortran.dg/proc_ptr_comp_45.f90
15648 +++ /dev/null
15649 @@ -1,49 +0,0 @@
15650 -! { dg-do run }
15651 -! Test the fix for PR59198, where the field for the component 'term' in
15652 -! the derived type 'decay_gen_t' was not being built.
15653 -!
15654 -! Contributed by Paul Thomas and based on the original testcase by
15655 -! Juergen Reuter <juergen.reuter@desy.de>
15656 -!
15657 -module decays
15658 -
15659 - implicit none
15660 -
15661 - interface
15662 - real elemental function iface (arg)
15663 - real, intent(in) :: arg
15664 - end function
15665 - end interface
15666 -
15667 - type :: decay_term_t
15668 - type(decay_t), pointer :: unstable_product
15669 - integer :: i
15670 - end type
15671 -
15672 - type :: decay_gen_t
15673 - procedure(iface), nopass, pointer :: obs1_int
15674 - type(decay_term_t), allocatable :: term
15675 - end type
15676 -
15677 - type :: rng_t
15678 - integer :: i
15679 - end type
15680 -
15681 - type, extends (decay_gen_t) :: decay_t
15682 - class(rng_t), allocatable :: rng
15683 - end type
15684 -
15685 - class(decay_t), allocatable :: object
15686 -
15687 -end
15688 -
15689 - use decays
15690 - type(decay_t), pointer :: template
15691 - real, parameter :: arg = 1.570796327
15692 - allocate (template)
15693 - allocate (template%rng)
15694 - template%obs1_int => cos
15695 - if (abs (template%obs1_int (arg) - cos (arg)) .gt. 1e-4) call abort
15696 - allocate (object, source = template)
15697 - if (abs (object%obs1_int (arg) - cos (arg)) .gt. 1e-4) call abort
15698 -end
15699 diff --git a/gcc/testsuite/gfortran.dg/unlimited_polymorphic_2.f03 b/gcc/testsuite/gfortran.dg/unlimited_polymorphic_2.f03
15700 index 73d5f25..8e80386 100644
15701 --- a/gcc/testsuite/gfortran.dg/unlimited_polymorphic_2.f03
15702 +++ b/gcc/testsuite/gfortran.dg/unlimited_polymorphic_2.f03
15703 @@ -1,80 +1,80 @@
15704 -! { dg-do compile }
15705 -!
15706 -! Test the most important constraints unlimited polymorphic entities
15707 -!
15708 -! Contributed by Paul Thomas <pault@gcc.gnu.org>
15709 -! and Tobias Burnus <burnus@gcc.gnu.org>
15710 -!
15711 - CHARACTER(:), allocatable, target :: chr
15712 -! F2008: C5100
15713 - integer :: i(2)
15714 - logical :: flag
15715 - class(*), pointer :: u1, u2(:) ! { dg-error "cannot appear in COMMON" }
15716 - common u1
15717 - u1 => chr
15718 -! F2003: C625
15719 - allocate (u1) ! { dg-error "requires either a type-spec or SOURCE tag" }
15720 - allocate (real :: u1)
15721 - Allocate (u1, source = 1.0)
15722 -
15723 -! F2008: C4106
15724 - u2 = [u1] ! { dg-error "shall not be unlimited polymorphic" }
15725 -
15726 - i = u2 ! { dg-error "Can\\'t convert CLASS\\(\\*\\)" }
15727 -
15728 -! Repeats same_type_as_1.f03 for unlimited polymorphic u2
15729 - flag = same_type_as (i, u2) ! { dg-error "cannot be of type INTEGER" }
15730 - flag = extends_type_of (i, u2) ! { dg-error "cannot be of type INTEGER" }
15731 -
15732 -contains
15733 -
15734 -! C717 (R735) If data-target is unlimited polymorphic,
15735 -! data-pointer-object shall be unlimited polymorphic, of a sequence
15736 -! derived type, or of a type with the BIND attribute.
15737 -!
15738 - subroutine bar
15739 -
15740 - type sq
15741 - sequence
15742 - integer :: i
15743 - end type sq
15744 -
15745 - type(sq), target :: x
15746 - class(*), pointer :: y
15747 - integer, pointer :: tgt
15748 -
15749 - x%i = 42
15750 - y => x
15751 - call foo (y)
15752 -
15753 - y => tgt ! This is OK, of course.
15754 - tgt => y ! { dg-error "must be unlimited polymorphic" }
15755 -
15756 - select type (y) ! This is the correct way to accomplish the previous
15757 - type is (integer)
15758 - tgt => y
15759 - end select
15760 -
15761 - end subroutine bar
15762 -
15763 -
15764 - subroutine foo(tgt)
15765 - class(*), pointer, intent(in) :: tgt
15766 - type t
15767 - sequence
15768 - integer :: k
15769 - end type t
15770 -
15771 - type(t), pointer :: ptr
15772 -
15773 - ptr => tgt ! C717 allows this.
15774 -
15775 - select type (tgt)
15776 -! F03:C815 or F08:C839
15777 - type is (t) ! { dg-error "shall not specify a sequence derived type" }
15778 - ptr => tgt ! { dg-error "Expected TYPE IS" }
15779 - end select
15780 -
15781 - print *, ptr%k
15782 - end subroutine foo
15783 -END
15784 +! { dg-do compile }
15785 +!
15786 +! Test the most important constraints unlimited polymorphic entities
15787 +!
15788 +! Contributed by Paul Thomas <pault@gcc.gnu.org>
15789 +! and Tobias Burnus <burnus@gcc.gnu.org>
15790 +!
15791 + CHARACTER(:), allocatable, target :: chr ! { dg-error "TODO: Deferred character length variable" }
15792 +! F2008: C5100
15793 + integer :: i(2)
15794 + logical :: flag
15795 + class(*), pointer :: u1, u2(:) ! { dg-error "cannot appear in COMMON" }
15796 + common u1
15797 + u1 => chr
15798 +! F2003: C625
15799 + allocate (u1) ! { dg-error "requires either a type-spec or SOURCE tag" }
15800 + allocate (real :: u1)
15801 + Allocate (u1, source = 1.0)
15802 +
15803 +! F2008: C4106
15804 + u2 = [u1] ! { dg-error "shall not be unlimited polymorphic" }
15805 +
15806 + i = u2 ! { dg-error "Can\\'t convert CLASS\\(\\*\\)" }
15807 +
15808 +! Repeats same_type_as_1.f03 for unlimited polymorphic u2
15809 + flag = same_type_as (i, u2) ! { dg-error "cannot be of type INTEGER" }
15810 + flag = extends_type_of (i, u2) ! { dg-error "cannot be of type INTEGER" }
15811 +
15812 +contains
15813 +
15814 +! C717 (R735) If data-target is unlimited polymorphic,
15815 +! data-pointer-object shall be unlimited polymorphic, of a sequence
15816 +! derived type, or of a type with the BIND attribute.
15817 +!
15818 + subroutine bar
15819 +
15820 + type sq
15821 + sequence
15822 + integer :: i
15823 + end type sq
15824 +
15825 + type(sq), target :: x
15826 + class(*), pointer :: y
15827 + integer, pointer :: tgt
15828 +
15829 + x%i = 42
15830 + y => x
15831 + call foo (y)
15832 +
15833 + y => tgt ! This is OK, of course.
15834 + tgt => y ! { dg-error "must be unlimited polymorphic" }
15835 +
15836 + select type (y) ! This is the correct way to accomplish the previous
15837 + type is (integer)
15838 + tgt => y
15839 + end select
15840 +
15841 + end subroutine bar
15842 +
15843 +
15844 + subroutine foo(tgt)
15845 + class(*), pointer, intent(in) :: tgt
15846 + type t
15847 + sequence
15848 + integer :: k
15849 + end type t
15850 +
15851 + type(t), pointer :: ptr
15852 +
15853 + ptr => tgt ! C717 allows this.
15854 +
15855 + select type (tgt)
15856 +! F03:C815 or F08:C839
15857 + type is (t) ! { dg-error "shall not specify a sequence derived type" }
15858 + ptr => tgt ! { dg-error "Expected TYPE IS" }
15859 + end select
15860 +
15861 + print *, ptr%k
15862 + end subroutine foo
15863 +END
15864 diff --git a/gcc/testsuite/gfortran.dg/unlimited_polymorphic_20.f03 b/gcc/testsuite/gfortran.dg/unlimited_polymorphic_20.f03
15865 deleted file mode 100644
15866 index c6c6d29..0000000
15867 --- a/gcc/testsuite/gfortran.dg/unlimited_polymorphic_20.f03
15868 +++ /dev/null
15869 @@ -1,104 +0,0 @@
15870 -! { dg-do run }
15871 -!
15872 -! Testing fix for PR fortran/60255
15873 -!
15874 -! Author: Andre Vehreschild <vehre@gmx.de>
15875 -!
15876 -MODULE m
15877 -
15878 -contains
15879 - subroutine bar (arg, res)
15880 - class(*) :: arg
15881 - character(100) :: res
15882 - select type (w => arg)
15883 - type is (character(*))
15884 - write (res, '(I2)') len(w)
15885 - end select
15886 - end subroutine
15887 -
15888 -END MODULE
15889 -
15890 -program test
15891 - use m;
15892 - implicit none
15893 - character(LEN=:), allocatable, target :: S
15894 - character(LEN=100) :: res
15895 - class(*), pointer :: ucp
15896 - call sub1 ("long test string", 16)
15897 - call sub2 ()
15898 - S = "test"
15899 - ucp => S
15900 - call sub3 (ucp)
15901 - call sub4 (S, 4)
15902 - call sub4 ("This is a longer string.", 24)
15903 - call bar (S, res)
15904 - if (trim (res) .NE. " 4") call abort ()
15905 - call bar(ucp, res)
15906 - if (trim (res) .NE. " 4") call abort ()
15907 -
15908 -contains
15909 -
15910 - subroutine sub1(dcl, ilen)
15911 - character(len=*), target :: dcl
15912 - integer(4) :: ilen
15913 - character(len=:), allocatable :: hlp
15914 - class(*), pointer :: ucp
15915 -
15916 - ucp => dcl
15917 -
15918 - select type (ucp)
15919 - type is (character(len=*))
15920 - if (len(dcl) .NE. ilen) call abort ()
15921 - if (len(ucp) .NE. ilen) call abort ()
15922 - hlp = ucp
15923 - if (len(hlp) .NE. ilen) call abort ()
15924 - class default
15925 - call abort()
15926 - end select
15927 - end subroutine
15928 -
15929 - subroutine sub2
15930 - character(len=:), allocatable, target :: dcl
15931 - class(*), pointer :: ucp
15932 -
15933 - dcl = "ttt"
15934 - ucp => dcl
15935 -
15936 - select type (ucp)
15937 - type is (character(len=*))
15938 - if (len(ucp) .ne. 3) call abort ()
15939 - class default
15940 - call abort()
15941 - end select
15942 - end subroutine
15943 -
15944 - subroutine sub3(ucp)
15945 - character(len=:), allocatable :: hlp
15946 - class(*), pointer :: ucp
15947 -
15948 - select type (ucp)
15949 - type is (character(len=*))
15950 - if (len(ucp) .ne. 4) call abort ()
15951 - hlp = ucp
15952 - if (len(hlp) .ne. 4) call abort ()
15953 - class default
15954 - call abort()
15955 - end select
15956 - end subroutine
15957 -
15958 - subroutine sub4(ucp, ilen)
15959 - character(len=:), allocatable :: hlp
15960 - integer(4) :: ilen
15961 - class(*) :: ucp
15962 -
15963 - select type (ucp)
15964 - type is (character(len=*))
15965 - if (len(ucp) .ne. ilen) call abort ()
15966 - hlp = ucp
15967 - if (len(hlp) .ne. ilen) call abort ()
15968 - class default
15969 - call abort()
15970 - end select
15971 - end subroutine
15972 -end program
15973 -
15974 diff --git a/gcc/testsuite/gfortran.dg/unlimited_polymorphic_23.f90 b/gcc/testsuite/gfortran.dg/unlimited_polymorphic_23.f90
15975 deleted file mode 100644
15976 index 27eff31..0000000
15977 --- a/gcc/testsuite/gfortran.dg/unlimited_polymorphic_23.f90
15978 +++ /dev/null
15979 @@ -1,35 +0,0 @@
15980 -! {dg-do run }
15981 -!
15982 -! Test the fix for PR65024, in which the structure for the 'info'
15983 -! component of type 'T' was not being converted into TREE_SSA and
15984 -! so caused an ICE in trans-expr.c:gfc_conv_component_ref.
15985 -!
15986 -! Reported by <matt@gneilson.plus.com>
15987 -!
15988 -MODULE X
15989 - TYPE T
15990 - CLASS(*), pointer :: info
15991 - END TYPE
15992 -END MODULE
15993 -
15994 -PROGRAM P
15995 - call bug
15996 -CONTAINS
15997 - SUBROUTINE BUG
15998 - USE X
15999 - CLASS(T), pointer :: e
16000 - integer, target :: i = 42
16001 - allocate(e)
16002 - e%info => NULL () ! used to ICE
16003 - if (.not.associated(e%info)) e%info => i ! used to ICE
16004 - select type (z => e%info)
16005 - type is (integer)
16006 - if (z .ne.i) call abort
16007 - end select
16008 - END SUBROUTINE
16009 -
16010 - SUBROUTINE NEXT
16011 - USE X
16012 - CLASS (T), pointer :: e
16013 - END SUBROUTINE
16014 -END
16015 diff --git a/gcc/testsuite/gfortran.dg/used_types_27.f90 b/gcc/testsuite/gfortran.dg/used_types_27.f90
16016 deleted file mode 100644
16017 index 4797f85..0000000
16018 --- a/gcc/testsuite/gfortran.dg/used_types_27.f90
16019 +++ /dev/null
16020 @@ -1,18 +0,0 @@
16021 -! { dg-do compile }
16022 -!
16023 -! PR fortran/56674
16024 -! PR fortran/58813
16025 -! PR fortran/59016
16026 -! PR fortran/59024
16027 -! The generic name 'atomic_kind_types' was keeping pointers to freed
16028 -! symbols, leading to random error-recovery ICEs.
16029 -!
16030 -! Original test case from Joost VandeVondele <Joost.VandeVondele@mat.ethz.ch>.
16031 -
16032 -MODULE atomic_kind_types
16033 - PUBLIC :: atomic_kind_type
16034 -CONTAINS
16035 - INTEGER FUNCTION is_hydrogen(atomic_kind)
16036 - TYPE(atomic_kind_type), pointer :: atomic_kind ! { dg-error "used before it is defined" }
16037 - END FUNCTION
16038 -END MODULE
16039 diff --git a/gcc/testsuite/gfortran.dg/vect/vect-2.f90 b/gcc/testsuite/gfortran.dg/vect/vect-2.f90
16040 index b4358c8..0f45a70 100644
16041 --- a/gcc/testsuite/gfortran.dg/vect/vect-2.f90
16042 +++ b/gcc/testsuite/gfortran.dg/vect/vect-2.f90
16043 @@ -15,8 +15,8 @@ END
16044 ! support unaligned loads).
16045
16046 ! { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" } }
16047 -! { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 3 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || { ! vector_alignment_reachable } } } } }
16048 -! { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { target { { vect_no_align && { ! vect_hw_misalign } } && { ! vector_alignment_reachable } } } } }
16049 -! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } }
16050 -! { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 3 "vect" {target { { vect_no_align && { ! vect_hw_misalign } } || { { ! vector_alignment_reachable } && { ! vect_hw_misalign } } } } } }
16051 +! { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 3 "vect" { xfail { vect_no_align || { ! vector_alignment_reachable } } } } }
16052 +! { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { target { vect_no_align && { ! vector_alignment_reachable } } } } }
16053 +! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align } } } }
16054 +! { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 3 "vect" {target { vect_no_align || { { ! vector_alignment_reachable } && { ! vect_hw_misalign } } } } } }
16055 ! { dg-final { cleanup-tree-dump "vect" } }
16056 diff --git a/gcc/testsuite/gfortran.dg/vect/vect-3.f90 b/gcc/testsuite/gfortran.dg/vect/vect-3.f90
16057 index d70c6b4..5fc4fbf 100644
16058 --- a/gcc/testsuite/gfortran.dg/vect/vect-3.f90
16059 +++ b/gcc/testsuite/gfortran.dg/vect/vect-3.f90
16060 @@ -6,10 +6,10 @@ DIMENSION X(N), Y(N)
16061 Y = Y + A * X
16062 END
16063
16064 -! { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 3 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } }
16065 +! { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 3 "vect" { target vect_no_align } } }
16066 ! { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { {! vect_no_align} && { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } } }
16067 ! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { target { {! vect_no_align} && { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } } }
16068 -! { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || {! vector_alignment_reachable}} } } }
16069 -! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || { ! vector_alignment_reachable} } } } }
16070 +! { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align || {! vector_alignment_reachable}} } } }
16071 +! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { { vect_no_align } || { ! vector_alignment_reachable} } } } }
16072
16073 ! { dg-final { cleanup-tree-dump "vect" } }
16074 diff --git a/gcc/testsuite/gfortran.dg/vect/vect-4.f90 b/gcc/testsuite/gfortran.dg/vect/vect-4.f90
16075 index 0d29852..592282f 100644
16076 --- a/gcc/testsuite/gfortran.dg/vect/vect-4.f90
16077 +++ b/gcc/testsuite/gfortran.dg/vect/vect-4.f90
16078 @@ -10,8 +10,8 @@ Y = Y + A * X
16079 END
16080
16081 ! { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } }
16082 -! { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || {! vector_alignment_reachable} } } } }
16083 -! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || {! vector_alignment_reachable} } } } }
16084 +! { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align } || {! vector_alignment_reachable} } } } }
16085 +! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { { vect_no_align } || {! vector_alignment_reachable} } } } }
16086 ! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { target { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } }
16087 ! { dg-final { scan-tree-dump-times "accesses have the same alignment." 1 "vect" } }
16088 ! { dg-final { cleanup-tree-dump "vect" } }
16089 diff --git a/gcc/testsuite/gfortran.dg/vect/vect-5.f90 b/gcc/testsuite/gfortran.dg/vect/vect-5.f90
16090 index 77ef77b..72776a6 100644
16091 --- a/gcc/testsuite/gfortran.dg/vect/vect-5.f90
16092 +++ b/gcc/testsuite/gfortran.dg/vect/vect-5.f90
16093 @@ -36,8 +36,8 @@
16094 end
16095
16096 ! { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } }
16097 -! { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || {! vector_alignment_reachable} } } } }
16098 -! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } }
16099 -! { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 2 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } }
16100 +! { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align || {! vector_alignment_reachable} } } } }
16101 +! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align } } } }
16102 +! { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 2 "vect" { target { vect_no_align } } } }
16103 ! { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } }
16104 ! { dg-final { cleanup-tree-dump "vect" } }
16105 diff --git a/gcc/testsuite/gnat.dg/loop_optimization18.adb b/gcc/testsuite/gnat.dg/loop_optimization18.adb
16106 deleted file mode 100644
16107 index eb4eeca..0000000
16108 --- a/gcc/testsuite/gnat.dg/loop_optimization18.adb
16109 +++ /dev/null
16110 @@ -1,16 +0,0 @@
16111 --- { dg-do compile }
16112 --- { dg-options "-O3" }
16113 -
16114 -package body Loop_Optimization18 is
16115 -
16116 - procedure Proc (Message : Byte_Array_Type) is
16117 -
16118 - R : Rec (Conv (Message));
16119 -
16120 - begin
16121 - for Division in 1 .. R.UB loop
16122 - R.L (Division) := 0;
16123 - end loop;
16124 - end;
16125 -
16126 -end Loop_Optimization18;
16127 diff --git a/gcc/testsuite/gnat.dg/loop_optimization18.ads b/gcc/testsuite/gnat.dg/loop_optimization18.ads
16128 deleted file mode 100644
16129 index c9f3e2a..0000000
16130 --- a/gcc/testsuite/gnat.dg/loop_optimization18.ads
16131 +++ /dev/null
16132 @@ -1,7 +0,0 @@
16133 -with Loop_Optimization18_Pkg; use Loop_Optimization18_Pkg;
16134 -
16135 -package Loop_Optimization18 is
16136 -
16137 - procedure Proc (Message : Byte_Array_Type);
16138 -
16139 -end Loop_Optimization18;
16140 diff --git a/gcc/testsuite/gnat.dg/loop_optimization18_pkg.ads b/gcc/testsuite/gnat.dg/loop_optimization18_pkg.ads
16141 deleted file mode 100644
16142 index 9fb3311..0000000
16143 --- a/gcc/testsuite/gnat.dg/loop_optimization18_pkg.ads
16144 +++ /dev/null
16145 @@ -1,15 +0,0 @@
16146 -with Unchecked_Conversion;
16147 -
16148 -package Loop_Optimization18_Pkg is
16149 -
16150 - type Arr is array (Integer range <>) of Natural;
16151 -
16152 - type Rec (UB : Integer) is record
16153 - L : Arr (1 .. UB);
16154 - end record;
16155 -
16156 - type Byte_Array_Type is new String (1..4);
16157 -
16158 - function Conv is new Unchecked_Conversion (Byte_Array_Type, Integer);
16159 -
16160 -end Loop_Optimization18_Pkg;
16161 diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
16162 index 1bb6a47..52ec684 100644
16163 --- a/gcc/testsuite/lib/target-supports.exp
16164 +++ b/gcc/testsuite/lib/target-supports.exp
16165 @@ -41,14 +41,6 @@ proc check_compile {basename type contents args} {
16166 global tool
16167 verbose "check_compile tool: $tool for $basename"
16168
16169 - # Save additional_sources to avoid compiling testsuite's sources
16170 - # against check_compile's source.
16171 - global additional_sources
16172 - if [info exists additional_sources] {
16173 - set tmp_additional_sources "$additional_sources"
16174 - set additional_sources ""
16175 - }
16176 -
16177 if { [llength $args] > 0 } {
16178 set options [list "additional_flags=[lindex $args 0]"]
16179 } else {
16180 @@ -94,11 +86,6 @@ proc check_compile {basename type contents args} {
16181 file delete $output
16182 }
16183
16184 - # Restore additional_sources.
16185 - if [info exists additional_sources] {
16186 - set additional_sources "$tmp_additional_sources"
16187 - }
16188 -
16189 return [list $lines $scan_output]
16190 }
16191
16192 @@ -3128,25 +3115,6 @@ proc check_effective_target_powerpc_htm_ok { } {
16193 }
16194 }
16195
16196 -# Return 1 if the target supports executing HTM hardware instructions,
16197 -# 0 otherwise. Cache the result.
16198 -
16199 -proc check_htm_hw_available { } {
16200 - return [check_cached_effective_target htm_hw_available {
16201 - # For now, disable on Darwin
16202 - if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
16203 - expr 0
16204 - } else {
16205 - check_runtime_nocache htm_hw_available {
16206 - int main()
16207 - {
16208 - __builtin_ttest ();
16209 - return 0;
16210 - }
16211 - } "-mhtm"
16212 - }
16213 - }]
16214 -}
16215 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
16216
16217 proc check_effective_target_powerpc_ppu_ok { } {
16218 @@ -4038,7 +4006,6 @@ proc check_effective_target_vect_no_align { } {
16219 || [istarget sparc*-*-*]
16220 || [istarget ia64-*-*]
16221 || [check_effective_target_arm_vect_no_misalign]
16222 - || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
16223 || ([istarget mips*-*-*]
16224 && [check_effective_target_mips_loongson]) } {
16225 set et_vect_no_align_saved 1
16226 @@ -4060,9 +4027,8 @@ proc check_effective_target_vect_hw_misalign { } {
16227 } else {
16228 set et_vect_hw_misalign_saved 0
16229 if { ([istarget x86_64-*-*]
16230 - || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
16231 - || [istarget aarch64*-*-*]
16232 - || [istarget i?86-*-*]) } {
16233 + || [istarget aarch64*-*-*]
16234 + || [istarget i?86-*-*]) } {
16235 set et_vect_hw_misalign_saved 1
16236 }
16237 }
16238 @@ -5007,7 +4973,6 @@ proc is-effective-target { arg } {
16239 "p8vector_hw" { set selected [check_p8vector_hw_available] }
16240 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
16241 "dfp_hw" { set selected [check_dfp_hw_available] }
16242 - "htm_hw" { set selected [check_htm_hw_available] }
16243 "named_sections" { set selected [check_named_sections_available] }
16244 "gc_sections" { set selected [check_gc_sections_available] }
16245 "cxa_atexit" { set selected [check_cxa_atexit_available] }
16246 @@ -5031,7 +4996,6 @@ proc is-effective-target-keyword { arg } {
16247 "p8vector_hw" { return 1 }
16248 "ppc_recip_hw" { return 1 }
16249 "dfp_hw" { return 1 }
16250 - "htm_hw" { return 1 }
16251 "named_sections" { return 1 }
16252 "gc_sections" { return 1 }
16253 "cxa_atexit" { return 1 }
16254 @@ -5656,7 +5620,7 @@ proc check_vect_support_and_set_flags { } {
16255
16256 lappend DEFAULT_VECTCFLAGS "-maltivec"
16257 if [check_p8vector_hw_available] {
16258 - lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
16259 + lappend DEFAULT_VECTCFLAGS "-mpower8-vector" "-mno-allow-movmisalign"
16260 } elseif [check_vsx_hw_available] {
16261 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
16262 }
616716263 diff --git a/gcc/timevar.def b/gcc/timevar.def
616816264 index 9faf98b..b643d15 100644
616916265 --- a/gcc/timevar.def
621116307 }
621216308 if (i == -1)
621316309 off = 0;
16310 diff --git a/gcc/tree-ssa-tail-merge.c b/gcc/tree-ssa-tail-merge.c
16311 index b5165d5..6efe02e 100644
16312 --- a/gcc/tree-ssa-tail-merge.c
16313 +++ b/gcc/tree-ssa-tail-merge.c
16314 @@ -570,7 +570,7 @@ same_succ_def::equal (const value_type *e1, const compare_type *e2)
16315 if (!inverse_flags (e1, e2))
16316 {
16317 for (i = 0; i < e1->succ_flags.length (); ++i)
16318 - if (e1->succ_flags[i] != e2->succ_flags[i])
16319 + if (e1->succ_flags[i] != e1->succ_flags[i])
16320 return 0;
16321 }
16322
621416323 diff --git a/gcc/tree-switch-shortcut.c b/gcc/tree-switch-shortcut.c
621516324 new file mode 100644
621616325 index 0000000..6f85a0c
666116770 +{
666216771 + return new pass_tree_switch_shortcut (ctxt);
666316772 +}
6664 diff --git a/libcpp/ChangeLog.arm b/libcpp/ChangeLog.arm
6665 new file mode 100644
6666 index 0000000..f80896f
6667 --- /dev/null
6668 +++ b/libcpp/ChangeLog.arm
6669 @@ -0,0 +1,8 @@
6670 +2014-11-14 Terry Guo <terry.guo@arm.com>
6671 +
6672 + Backport trunk patch at r210264
6673 + 2014-05-09 Joey Ye <joey.ye@arm.com>
6674 +
6675 + * files.c (find_file_in_dir): Always try to shorten for DOS
6676 + non-system headers.
6677 + * init.c (ENABLE_CANONICAL_SYSTEM_HEADERS): Default enabled for DOS.
16773 diff --git a/gcc/tree-vect-data-refs.c b/gcc/tree-vect-data-refs.c
16774 index eec14c9..04d6dc9 100644
16775 --- a/gcc/tree-vect-data-refs.c
16776 +++ b/gcc/tree-vect-data-refs.c
16777 @@ -1126,6 +1126,7 @@ vect_peeling_hash_get_lowest_cost (_vect_peel_info **slot,
16778 vec<data_reference_p> datarefs = LOOP_VINFO_DATAREFS (loop_vinfo);
16779 struct data_reference *dr;
16780 stmt_vector_for_cost prologue_cost_vec, body_cost_vec, epilogue_cost_vec;
16781 + int single_iter_cost;
16782
16783 prologue_cost_vec.create (2);
16784 body_cost_vec.create (2);
16785 @@ -1148,11 +1149,14 @@ vect_peeling_hash_get_lowest_cost (_vect_peel_info **slot,
16786 SET_DR_MISALIGNMENT (dr, save_misalignment);
16787 }
16788
16789 - auto_vec<stmt_info_for_cost> scalar_cost_vec;
16790 - vect_get_single_scalar_iteration_cost (loop_vinfo, &scalar_cost_vec);
16791 + single_iter_cost = vect_get_single_scalar_iteration_cost (loop_vinfo);
16792 outside_cost += vect_get_known_peeling_cost
16793 (loop_vinfo, elem->npeel, &dummy,
16794 - &scalar_cost_vec, &prologue_cost_vec, &epilogue_cost_vec);
16795 + /* ??? We use this cost as number of stmts with scalar_stmt cost,
16796 + thus divide by that. This introduces rounding errors, thus better
16797 + introduce a new cost kind (raw_cost? scalar_iter_cost?). */
16798 + single_iter_cost / vect_get_stmt_cost (scalar_stmt),
16799 + &prologue_cost_vec, &epilogue_cost_vec);
16800
16801 /* Prologue and epilogue costs are added to the target model later.
16802 These costs depend only on the scalar iteration cost, the
16803 diff --git a/gcc/tree-vect-loop.c b/gcc/tree-vect-loop.c
16804 index 16bbefd..a1c6e44 100644
16805 --- a/gcc/tree-vect-loop.c
16806 +++ b/gcc/tree-vect-loop.c
16807 @@ -2620,13 +2620,12 @@ vect_force_simple_reduction (loop_vec_info loop_info, gimple phi,
16808
16809 /* Calculate the cost of one scalar iteration of the loop. */
16810 int
16811 -vect_get_single_scalar_iteration_cost (loop_vec_info loop_vinfo,
16812 - stmt_vector_for_cost *scalar_cost_vec)
16813 +vect_get_single_scalar_iteration_cost (loop_vec_info loop_vinfo)
16814 {
16815 struct loop *loop = LOOP_VINFO_LOOP (loop_vinfo);
16816 basic_block *bbs = LOOP_VINFO_BBS (loop_vinfo);
16817 int nbbs = loop->num_nodes, factor, scalar_single_iter_cost = 0;
16818 - int innerloop_iters, i;
16819 + int innerloop_iters, i, stmt_cost;
16820
16821 /* Count statements in scalar loop. Using this as scalar cost for a single
16822 iteration for now.
16823 @@ -2667,20 +2666,17 @@ vect_get_single_scalar_iteration_cost (loop_vec_info loop_vinfo,
16824 && !STMT_VINFO_IN_PATTERN_P (stmt_info))
16825 continue;
16826
16827 - vect_cost_for_stmt kind;
16828 if (STMT_VINFO_DATA_REF (vinfo_for_stmt (stmt)))
16829 {
16830 if (DR_IS_READ (STMT_VINFO_DATA_REF (vinfo_for_stmt (stmt))))
16831 - kind = scalar_load;
16832 + stmt_cost = vect_get_stmt_cost (scalar_load);
16833 else
16834 - kind = scalar_store;
16835 + stmt_cost = vect_get_stmt_cost (scalar_store);
16836 }
16837 else
16838 - kind = scalar_stmt;
16839 + stmt_cost = vect_get_stmt_cost (scalar_stmt);
16840
16841 - scalar_single_iter_cost
16842 - += record_stmt_cost (scalar_cost_vec, factor, kind,
16843 - NULL, 0, vect_prologue);
16844 + scalar_single_iter_cost += stmt_cost * factor;
16845 }
16846 }
16847 return scalar_single_iter_cost;
16848 @@ -2690,7 +2686,7 @@ vect_get_single_scalar_iteration_cost (loop_vec_info loop_vinfo,
16849 int
16850 vect_get_known_peeling_cost (loop_vec_info loop_vinfo, int peel_iters_prologue,
16851 int *peel_iters_epilogue,
16852 - stmt_vector_for_cost *scalar_cost_vec,
16853 + int scalar_single_iter_cost,
16854 stmt_vector_for_cost *prologue_cost_vec,
16855 stmt_vector_for_cost *epilogue_cost_vec)
16856 {
16857 @@ -2707,10 +2703,8 @@ vect_get_known_peeling_cost (loop_vec_info loop_vinfo, int peel_iters_prologue,
16858
16859 /* If peeled iterations are known but number of scalar loop
16860 iterations are unknown, count a taken branch per peeled loop. */
16861 - retval = record_stmt_cost (prologue_cost_vec, 1, cond_branch_taken,
16862 + retval = record_stmt_cost (prologue_cost_vec, 2, cond_branch_taken,
16863 NULL, 0, vect_prologue);
16864 - retval = record_stmt_cost (prologue_cost_vec, 1, cond_branch_taken,
16865 - NULL, 0, vect_epilogue);
16866 }
16867 else
16868 {
16869 @@ -2724,21 +2718,14 @@ vect_get_known_peeling_cost (loop_vec_info loop_vinfo, int peel_iters_prologue,
16870 *peel_iters_epilogue = vf;
16871 }
16872
16873 - stmt_info_for_cost *si;
16874 - int j;
16875 if (peel_iters_prologue)
16876 - FOR_EACH_VEC_ELT (*scalar_cost_vec, j, si)
16877 - retval += record_stmt_cost (prologue_cost_vec,
16878 - si->count * peel_iters_prologue,
16879 - si->kind, NULL, si->misalign,
16880 - vect_prologue);
16881 + retval += record_stmt_cost (prologue_cost_vec,
16882 + peel_iters_prologue * scalar_single_iter_cost,
16883 + scalar_stmt, NULL, 0, vect_prologue);
16884 if (*peel_iters_epilogue)
16885 - FOR_EACH_VEC_ELT (*scalar_cost_vec, j, si)
16886 - retval += record_stmt_cost (epilogue_cost_vec,
16887 - si->count * *peel_iters_epilogue,
16888 - si->kind, NULL, si->misalign,
16889 - vect_epilogue);
16890 -
16891 + retval += record_stmt_cost (epilogue_cost_vec,
16892 + *peel_iters_epilogue * scalar_single_iter_cost,
16893 + scalar_stmt, NULL, 0, vect_epilogue);
16894 return retval;
16895 }
16896
16897 @@ -2813,9 +2800,12 @@ vect_estimate_min_profitable_iters (loop_vec_info loop_vinfo,
16898 TODO: Consider assigning different costs to different scalar
16899 statements. */
16900
16901 - auto_vec<stmt_info_for_cost> scalar_cost_vec;
16902 - scalar_single_iter_cost
16903 - = vect_get_single_scalar_iteration_cost (loop_vinfo, &scalar_cost_vec);
16904 + scalar_single_iter_cost = vect_get_single_scalar_iteration_cost (loop_vinfo);
16905 + /* ??? Below we use this cost as number of stmts with scalar_stmt cost,
16906 + thus divide by that. This introduces rounding errors, thus better
16907 + introduce a new cost kind (raw_cost? scalar_iter_cost?). */
16908 + int scalar_single_iter_stmts
16909 + = scalar_single_iter_cost / vect_get_stmt_cost (scalar_stmt);
16910
16911 /* Add additional cost for the peeled instructions in prologue and epilogue
16912 loop.
16913 @@ -2843,29 +2833,18 @@ vect_estimate_min_profitable_iters (loop_vec_info loop_vinfo,
16914 branch per peeled loop. Even if scalar loop iterations are known,
16915 vector iterations are not known since peeled prologue iterations are
16916 not known. Hence guards remain the same. */
16917 - (void) add_stmt_cost (target_cost_data, 1, cond_branch_taken,
16918 + (void) add_stmt_cost (target_cost_data, 2, cond_branch_taken,
16919 NULL, 0, vect_prologue);
16920 - (void) add_stmt_cost (target_cost_data, 1, cond_branch_not_taken,
16921 + (void) add_stmt_cost (target_cost_data, 2, cond_branch_not_taken,
16922 NULL, 0, vect_prologue);
16923 - (void) add_stmt_cost (target_cost_data, 1, cond_branch_taken,
16924 - NULL, 0, vect_epilogue);
16925 - (void) add_stmt_cost (target_cost_data, 1, cond_branch_not_taken,
16926 - NULL, 0, vect_epilogue);
16927 - stmt_info_for_cost *si;
16928 - int j;
16929 - FOR_EACH_VEC_ELT (scalar_cost_vec, j, si)
16930 - {
16931 - struct _stmt_vec_info *stmt_info
16932 - = si->stmt ? vinfo_for_stmt (si->stmt) : NULL;
16933 - (void) add_stmt_cost (target_cost_data,
16934 - si->count * peel_iters_prologue,
16935 - si->kind, stmt_info, si->misalign,
16936 - vect_prologue);
16937 - (void) add_stmt_cost (target_cost_data,
16938 - si->count * peel_iters_epilogue,
16939 - si->kind, stmt_info, si->misalign,
16940 - vect_epilogue);
16941 - }
16942 + /* FORNOW: Don't attempt to pass individual scalar instructions to
16943 + the model; just assume linear cost for scalar iterations. */
16944 + (void) add_stmt_cost (target_cost_data,
16945 + peel_iters_prologue * scalar_single_iter_stmts,
16946 + scalar_stmt, NULL, 0, vect_prologue);
16947 + (void) add_stmt_cost (target_cost_data,
16948 + peel_iters_epilogue * scalar_single_iter_stmts,
16949 + scalar_stmt, NULL, 0, vect_epilogue);
16950 }
16951 else
16952 {
16953 @@ -2880,7 +2859,7 @@ vect_estimate_min_profitable_iters (loop_vec_info loop_vinfo,
16954
16955 (void) vect_get_known_peeling_cost (loop_vinfo, peel_iters_prologue,
16956 &peel_iters_epilogue,
16957 - &scalar_cost_vec,
16958 + scalar_single_iter_stmts,
16959 &prologue_cost_vec,
16960 &epilogue_cost_vec);
16961
16962 diff --git a/gcc/tree-vectorizer.h b/gcc/tree-vectorizer.h
16963 index 13ee963..b32ec46 100644
16964 --- a/gcc/tree-vectorizer.h
16965 +++ b/gcc/tree-vectorizer.h
16966 @@ -1098,12 +1098,10 @@ extern bool vectorizable_reduction (gimple, gimple_stmt_iterator *, gimple *,
16967 extern bool vectorizable_induction (gimple, gimple_stmt_iterator *, gimple *);
16968 extern tree get_initial_def_for_reduction (gimple, tree, tree *);
16969 extern int vect_min_worthwhile_factor (enum tree_code);
16970 -extern int vect_get_known_peeling_cost (loop_vec_info, int, int *,
16971 - stmt_vector_for_cost *,
16972 +extern int vect_get_known_peeling_cost (loop_vec_info, int, int *, int,
16973 stmt_vector_for_cost *,
16974 stmt_vector_for_cost *);
16975 -extern int vect_get_single_scalar_iteration_cost (loop_vec_info,
16976 - stmt_vector_for_cost *);
16977 +extern int vect_get_single_scalar_iteration_cost (loop_vec_info);
16978
16979 /* In tree-vect-slp.c. */
16980 extern void vect_free_slp_instance (slp_instance);
16981 diff --git a/gcc/web.c b/gcc/web.c
16982 index 7ee39a1..d67151c 100644
16983 --- a/gcc/web.c
16984 +++ b/gcc/web.c
16985 @@ -53,17 +53,17 @@ along with GCC; see the file COPYING3. If not see
16986
16987 /* Find the root of unionfind tree (the representative of set). */
16988
16989 -web_entry_base *
16990 -web_entry_base::unionfind_root ()
16991 +struct web_entry *
16992 +unionfind_root (struct web_entry *element)
16993 {
16994 - web_entry_base *element = this, *element1 = this, *element2;
16995 + struct web_entry *element1 = element, *element2;
16996
16997 - while (element->pred ())
16998 - element = element->pred ();
16999 - while (element1->pred ())
17000 + while (element->pred)
17001 + element = element->pred;
17002 + while (element1->pred)
17003 {
17004 - element2 = element1->pred ();
17005 - element1->set_pred (element);
17006 + element2 = element1->pred;
17007 + element1->pred = element;
17008 element1 = element2;
17009 }
17010 return element;
17011 @@ -74,32 +74,23 @@ web_entry_base::unionfind_root ()
17012 nothing is done. Otherwise, return false. */
17013
17014 bool
17015 -unionfind_union (web_entry_base *first, web_entry_base *second)
17016 +unionfind_union (struct web_entry *first, struct web_entry *second)
17017 {
17018 - first = first->unionfind_root ();
17019 - second = second->unionfind_root ();
17020 + first = unionfind_root (first);
17021 + second = unionfind_root (second);
17022 if (first == second)
17023 return true;
17024 - second->set_pred (first);
17025 + second->pred = first;
17026 return false;
17027 }
17028
17029 -class web_entry : public web_entry_base
17030 -{
17031 - private:
17032 - rtx reg_pvt;
17033 -
17034 - public:
17035 - rtx reg () { return reg_pvt; }
17036 - void set_reg (rtx r) { reg_pvt = r; }
17037 -};
17038 -
17039 /* For INSN, union all defs and uses that are linked by match_dup.
17040 FUN is the function that does the union. */
17041
17042 static void
17043 -union_match_dups (rtx insn, web_entry *def_entry, web_entry *use_entry,
17044 - bool (*fun) (web_entry_base *, web_entry_base *))
17045 +union_match_dups (rtx insn, struct web_entry *def_entry,
17046 + struct web_entry *use_entry,
17047 + bool (*fun) (struct web_entry *, struct web_entry *))
17048 {
17049 struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
17050 df_ref *use_link = DF_INSN_INFO_USES (insn_info);
17051 @@ -176,9 +167,9 @@ union_match_dups (rtx insn, web_entry *def_entry, web_entry *use_entry,
17052 the values 0 and 1 are reserved for use by entry_register. */
17053
17054 void
17055 -union_defs (df_ref use, web_entry *def_entry,
17056 - unsigned int *used, web_entry *use_entry,
17057 - bool (*fun) (web_entry_base *, web_entry_base *))
17058 +union_defs (df_ref use, struct web_entry *def_entry,
17059 + unsigned int *used, struct web_entry *use_entry,
17060 + bool (*fun) (struct web_entry *, struct web_entry *))
17061 {
17062 struct df_insn_info *insn_info = DF_REF_INSN_INFO (use);
17063 struct df_link *link = DF_REF_CHAIN (use);
17064 @@ -279,15 +270,15 @@ union_defs (df_ref use, web_entry *def_entry,
17065 /* Find the corresponding register for the given entry. */
17066
17067 static rtx
17068 -entry_register (web_entry *entry, df_ref ref, unsigned int *used)
17069 +entry_register (struct web_entry *entry, df_ref ref, unsigned int *used)
17070 {
17071 - web_entry *root;
17072 + struct web_entry *root;
17073 rtx reg, newreg;
17074
17075 /* Find the corresponding web and see if it has been visited. */
17076 - root = (web_entry *)entry->unionfind_root ();
17077 - if (root->reg ())
17078 - return root->reg ();
17079 + root = unionfind_root (entry);
17080 + if (root->reg)
17081 + return root->reg;
17082
17083 /* We are seeing this web for the first time, do the assignment. */
17084 reg = DF_REF_REAL_REG (ref);
17085 @@ -311,7 +302,7 @@ entry_register (web_entry *entry, df_ref ref, unsigned int *used)
17086 REGNO (newreg));
17087 }
17088
17089 - root->set_reg (newreg);
17090 + root->reg = newreg;
17091 return newreg;
17092 }
17093
17094 @@ -345,8 +336,8 @@ gate_handle_web (void)
17095 static unsigned int
17096 web_main (void)
17097 {
17098 - web_entry *def_entry;
17099 - web_entry *use_entry;
17100 + struct web_entry *def_entry;
17101 + struct web_entry *use_entry;
17102 unsigned int max = max_reg_num ();
17103 unsigned int *used;
17104 basic_block bb;
17105 @@ -383,9 +374,9 @@ web_main (void)
17106 }
17107
17108 /* Record the number of uses and defs at the beginning of the optimization. */
17109 - def_entry = XCNEWVEC (web_entry, DF_DEFS_TABLE_SIZE ());
17110 + def_entry = XCNEWVEC (struct web_entry, DF_DEFS_TABLE_SIZE ());
17111 used = XCNEWVEC (unsigned, max);
17112 - use_entry = XCNEWVEC (web_entry, uses_num);
17113 + use_entry = XCNEWVEC (struct web_entry, uses_num);
17114
17115 /* Produce the web. */
17116 FOR_ALL_BB_FN (bb, cfun)
667817117 diff --git a/libcpp/files.c b/libcpp/files.c
667917118 index 149f06d..4764f36 100644
668017119 --- a/libcpp/files.c
671317152
671417153 static void init_library (void);
671517154 static void mark_named_operators (cpp_reader *, int);
6716 diff --git a/libgcc/ChangeLog.arm b/libgcc/ChangeLog.arm
6717 new file mode 100644
6718 index 0000000..27b4eab
6719 --- /dev/null
6720 +++ b/libgcc/ChangeLog.arm
6721 @@ -0,0 +1,3 @@
6722 +2014-11-27 Hale Wang <hale.wang@arm.com>
6723 +
6724 + * config/arm/lib1funcs.S: Add new wrapper.
672517155 diff --git a/libgcc/config/arm/lib1funcs.S b/libgcc/config/arm/lib1funcs.S
672617156 index b617137..de66c81 100644
672717157 --- a/libgcc/config/arm/lib1funcs.S
700917439 ARM_FUNC_ALIAS aeabi_idiv divsi3
701017440
701117441 cmp r1, #0
17442 diff --git a/libgfortran/io/fbuf.c b/libgfortran/io/fbuf.c
17443 index 0c6ae54..170ce97 100644
17444 --- a/libgfortran/io/fbuf.c
17445 +++ b/libgfortran/io/fbuf.c
17446 @@ -174,42 +174,6 @@ fbuf_flush (gfc_unit * u, unit_mode mode)
17447 }
17448
17449
17450 -/* The mode argument is LIST_WRITING for write mode and LIST_READING for
17451 - read. This should only be used for list directed I/O.
17452 - Return value is 0 for success, -1 on failure. */
17453 -
17454 -int
17455 -fbuf_flush_list (gfc_unit * u, unit_mode mode)
17456 -{
17457 - int nwritten;
17458 -
17459 - if (!u->fbuf)
17460 - return 0;
17461 -
17462 - if (u->fbuf->pos < 524288) /* Upper limit for list writing. */
17463 - return 0;
17464 -
17465 - fbuf_debug (u, "fbuf_flush_list with mode %d: ", mode);
17466 -
17467 - if (mode == LIST_WRITING)
17468 - {
17469 - nwritten = swrite (u->s, u->fbuf->buf, u->fbuf->pos);
17470 - if (nwritten < 0)
17471 - return -1;
17472 - }
17473 -
17474 - /* Salvage remaining bytes for both reading and writing. */
17475 - if (u->fbuf->act > u->fbuf->pos)
17476 - memmove (u->fbuf->buf, u->fbuf->buf + u->fbuf->pos,
17477 - u->fbuf->act - u->fbuf->pos);
17478 -
17479 - u->fbuf->act -= u->fbuf->pos;
17480 - u->fbuf->pos = 0;
17481 -
17482 - return 0;
17483 -}
17484 -
17485 -
17486 int
17487 fbuf_seek (gfc_unit * u, int off, int whence)
17488 {
17489 diff --git a/libgfortran/io/fbuf.h b/libgfortran/io/fbuf.h
17490 index d9a1611..253b2ad 100644
17491 --- a/libgfortran/io/fbuf.h
17492 +++ b/libgfortran/io/fbuf.h
17493 @@ -59,9 +59,6 @@ internal_proto(fbuf_alloc);
17494 extern int fbuf_flush (gfc_unit *, unit_mode);
17495 internal_proto(fbuf_flush);
17496
17497 -extern int fbuf_flush_list (gfc_unit *, unit_mode);
17498 -internal_proto(fbuf_flush_list);
17499 -
17500 extern int fbuf_seek (gfc_unit *, int, int);
17501 internal_proto(fbuf_seek);
17502
17503 diff --git a/libgfortran/io/io.h b/libgfortran/io/io.h
17504 index a247272..3481c83 100644
17505 --- a/libgfortran/io/io.h
17506 +++ b/libgfortran/io/io.h
17507 @@ -207,7 +207,7 @@ typedef enum
17508 unit_advance;
17509
17510 typedef enum
17511 -{READING, WRITING, LIST_READING, LIST_WRITING}
17512 +{READING, WRITING}
17513 unit_mode;
17514
17515 typedef enum
17516 diff --git a/libgfortran/io/list_read.c b/libgfortran/io/list_read.c
17517 index b957210..b64189a 100644
17518 --- a/libgfortran/io/list_read.c
17519 +++ b/libgfortran/io/list_read.c
17520 @@ -2054,7 +2054,6 @@ cleanup:
17521 free_line (dtp);
17522 hit_eof (dtp);
17523 }
17524 - fbuf_flush_list (dtp->u.p.current_unit, LIST_READING);
17525 return err;
17526 }
17527
17528 diff --git a/libgfortran/io/transfer.c b/libgfortran/io/transfer.c
17529 index d7f1942..60b6012 100644
17530 --- a/libgfortran/io/transfer.c
17531 +++ b/libgfortran/io/transfer.c
17532 @@ -2533,16 +2533,15 @@ data_transfer_init (st_parameter_dt *dtp, int read_flag)
17533 return;
17534 }
17535
17536 - if (compile_options.warn_std &&
17537 - dtp->u.p.current_unit->endfile == AFTER_ENDFILE)
17538 - {
17539 + if (dtp->u.p.current_unit->endfile == AFTER_ENDFILE)
17540 + {
17541 generate_error (&dtp->common, LIBERROR_OPTION_CONFLICT,
17542 "Sequential READ or WRITE not allowed after "
17543 "EOF marker, possibly use REWIND or BACKSPACE");
17544 return;
17545 }
17546 - }
17547
17548 + }
17549 /* Process the ADVANCE option. */
17550
17551 dtp->u.p.advance_status
17552 @@ -2675,7 +2674,8 @@ data_transfer_init (st_parameter_dt *dtp, int read_flag)
17553 if (dtp->u.p.current_unit->delim_status == DELIM_UNSPECIFIED)
17554 {
17555 if (ionml && dtp->u.p.current_unit->flags.delim == DELIM_UNSPECIFIED)
17556 - dtp->u.p.current_unit->delim_status = DELIM_QUOTE;
17557 + dtp->u.p.current_unit->delim_status =
17558 + compile_options.allow_std & GFC_STD_GNU ? DELIM_QUOTE : DELIM_NONE;
17559 else
17560 dtp->u.p.current_unit->delim_status = dtp->u.p.current_unit->flags.delim;
17561 }
17562 diff --git a/libgfortran/io/write.c b/libgfortran/io/write.c
17563 index a43dc03..f76ec67 100644
17564 --- a/libgfortran/io/write.c
17565 +++ b/libgfortran/io/write.c
17566 @@ -25,7 +25,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
17567 <http://www.gnu.org/licenses/>. */
17568
17569 #include "io.h"
17570 -#include "fbuf.h"
17571 #include "format.h"
17572 #include "unix.h"
17573 #include <assert.h>
17574 @@ -1586,7 +1585,6 @@ list_formatted_write_scalar (st_parameter_dt *dtp, bt type, void *p, int kind,
17575 internal_error (&dtp->common, "list_formatted_write(): Bad type");
17576 }
17577
17578 - fbuf_flush_list (dtp->u.p.current_unit, LIST_WRITING);
17579 dtp->u.p.char_flag = (type == BT_CHARACTER);
17580 }
17581
17582 diff --git a/libgo/runtime/go-caller.c b/libgo/runtime/go-caller.c
17583 index f0ee4eb..a3e0424 100644
17584 --- a/libgo/runtime/go-caller.c
17585 +++ b/libgo/runtime/go-caller.c
17586 @@ -255,8 +255,6 @@ String runtime_funcname_go (Func *f)
17587 String
17588 runtime_funcname_go (Func *f)
17589 {
17590 - if (f == NULL)
17591 - return runtime_gostringnocopy ((const byte *) "");
17592 return f->name;
17593 }
17594
17595 diff --git a/libgomp/configure b/libgomp/configure
17596 index 32d9325..766eb09 100755
17597 --- a/libgomp/configure
17598 +++ b/libgomp/configure
17599 @@ -14587,7 +14587,7 @@ $as_echo "#define STRING_WITH_STRINGS 1" >>confdefs.h
17600
17601 fi
17602
17603 -for ac_header in pthread.h unistd.h semaphore.h sys/loadavg.h sys/time.h sys/time.h
17604 +for ac_header in unistd.h semaphore.h sys/loadavg.h sys/time.h sys/time.h
17605 do :
17606 as_ac_Header=`$as_echo "ac_cv_header_$ac_header" | $as_tr_sh`
17607 ac_fn_c_check_header_mongrel "$LINENO" "$ac_header" "$as_ac_Header" "$ac_includes_default"
17608 @@ -15009,19 +15009,14 @@ ac_config_commands="$ac_config_commands gstdint.h"
17609
17610
17611
17612 +# Check to see if -pthread or -lpthread is needed. Prefer the former.
17613 +# In case the pthread.h system header is not found, this test will fail.
17614 XPCFLAGS=""
17615 -case "$host" in
17616 - *-*-rtems*)
17617 - # RTEMS supports Pthreads, but the library is not available at GCC build time.
17618 - ;;
17619 - *)
17620 - # Check to see if -pthread or -lpthread is needed. Prefer the former.
17621 - # In case the pthread.h system header is not found, this test will fail.
17622 - CFLAGS="$CFLAGS -pthread"
17623 - cat confdefs.h - <<_ACEOF >conftest.$ac_ext
17624 +CFLAGS="$CFLAGS -pthread"
17625 +cat confdefs.h - <<_ACEOF >conftest.$ac_ext
17626 /* end confdefs.h. */
17627 #include <pthread.h>
17628 - void *g(void *d) { return NULL; }
17629 + void *g(void *d) { return NULL; }
17630 int
17631 main ()
17632 {
17633 @@ -15034,10 +15029,10 @@ if ac_fn_c_try_link "$LINENO"; then :
17634 XPCFLAGS=" -Wc,-pthread"
17635 else
17636 CFLAGS="$save_CFLAGS" LIBS="-lpthread $LIBS"
17637 - cat confdefs.h - <<_ACEOF >conftest.$ac_ext
17638 + cat confdefs.h - <<_ACEOF >conftest.$ac_ext
17639 /* end confdefs.h. */
17640 #include <pthread.h>
17641 - void *g(void *d) { return NULL; }
17642 + void *g(void *d) { return NULL; }
17643 int
17644 main ()
17645 {
17646 @@ -15056,7 +15051,6 @@ rm -f core conftest.err conftest.$ac_objext \
17647 fi
17648 rm -f core conftest.err conftest.$ac_objext \
17649 conftest$ac_exeext conftest.$ac_ext
17650 -esac
17651
17652 # Check for functions needed.
17653 for ac_func in getloadavg clock_gettime strtoull
17654 diff --git a/libgomp/configure.ac b/libgomp/configure.ac
17655 index 03fc930..84d250f 100644
17656 --- a/libgomp/configure.ac
17657 +++ b/libgomp/configure.ac
17658 @@ -170,34 +170,28 @@ AC_SUBST(libtool_VERSION)
17659 AC_STDC_HEADERS
17660 AC_HEADER_TIME
17661 ACX_HEADER_STRING
17662 -AC_CHECK_HEADERS(pthread.h unistd.h semaphore.h sys/loadavg.h sys/time.h sys/time.h)
17663 +AC_CHECK_HEADERS(unistd.h semaphore.h sys/loadavg.h sys/time.h sys/time.h)
17664
17665 GCC_HEADER_STDINT(gstdint.h)
17666
17667 +# Check to see if -pthread or -lpthread is needed. Prefer the former.
17668 +# In case the pthread.h system header is not found, this test will fail.
17669 XPCFLAGS=""
17670 -case "$host" in
17671 - *-*-rtems*)
17672 - # RTEMS supports Pthreads, but the library is not available at GCC build time.
17673 - ;;
17674 - *)
17675 - # Check to see if -pthread or -lpthread is needed. Prefer the former.
17676 - # In case the pthread.h system header is not found, this test will fail.
17677 - CFLAGS="$CFLAGS -pthread"
17678 - AC_LINK_IFELSE(
17679 - [AC_LANG_PROGRAM(
17680 - [#include <pthread.h>
17681 - void *g(void *d) { return NULL; }],
17682 - [pthread_t t; pthread_create(&t,NULL,g,NULL);])],
17683 - [XPCFLAGS=" -Wc,-pthread"],
17684 - [CFLAGS="$save_CFLAGS" LIBS="-lpthread $LIBS"
17685 - AC_LINK_IFELSE(
17686 - [AC_LANG_PROGRAM(
17687 - [#include <pthread.h>
17688 - void *g(void *d) { return NULL; }],
17689 - [pthread_t t; pthread_create(&t,NULL,g,NULL);])],
17690 - [],
17691 - [AC_MSG_ERROR([Pthreads are required to build libgomp])])])
17692 -esac
17693 +CFLAGS="$CFLAGS -pthread"
17694 +AC_LINK_IFELSE(
17695 + [AC_LANG_PROGRAM(
17696 + [#include <pthread.h>
17697 + void *g(void *d) { return NULL; }],
17698 + [pthread_t t; pthread_create(&t,NULL,g,NULL);])],
17699 + [XPCFLAGS=" -Wc,-pthread"],
17700 + [CFLAGS="$save_CFLAGS" LIBS="-lpthread $LIBS"
17701 + AC_LINK_IFELSE(
17702 + [AC_LANG_PROGRAM(
17703 + [#include <pthread.h>
17704 + void *g(void *d) { return NULL; }],
17705 + [pthread_t t; pthread_create(&t,NULL,g,NULL);])],
17706 + [],
17707 + [AC_MSG_ERROR([Pthreads are required to build libgomp])])])
17708
17709 # Check for functions needed.
17710 AC_CHECK_FUNCS(getloadavg clock_gettime strtoull)
17711 diff --git a/libgomp/configure.tgt b/libgomp/configure.tgt
17712 index e8cd14b..ebd9be9 100644
17713 --- a/libgomp/configure.tgt
17714 +++ b/libgomp/configure.tgt
17715 @@ -20,10 +20,6 @@ if test $gcc_cv_have_tls = yes ; then
17716 *-*-linux* | *-*-gnu*)
17717 XCFLAGS="${XCFLAGS} -ftls-model=initial-exec"
17718 ;;
17719 -
17720 - *-*-rtems*)
17721 - XCFLAGS="${XCFLAGS} -ftls-model=local-exec"
17722 - ;;
17723 esac
17724 fi
17725
17726 diff --git a/libstdc++-v3/include/std/chrono b/libstdc++-v3/include/std/chrono
17727 index e546ab9..6e9c7dc 100644
17728 --- a/libstdc++-v3/include/std/chrono
17729 +++ b/libstdc++-v3/include/std/chrono
17730 @@ -904,15 +904,6 @@ _GLIBCXX_END_NAMESPACE_VERSION
17731 } // inline namespace chrono_literals
17732 } // inline namespace literals
17733
17734 - namespace chrono
17735 - {
17736 - _GLIBCXX_BEGIN_NAMESPACE_VERSION
17737 -
17738 - using namespace literals::chrono_literals;
17739 -
17740 - _GLIBCXX_END_NAMESPACE_VERSION
17741 - } // namespace chrono
17742 -
17743 #endif // __cplusplus > 201103L
17744
17745 // @} group chrono
17746 diff --git a/libstdc++-v3/include/std/istream b/libstdc++-v3/include/std/istream
17747 index 2b157f5..f063768 100644
17748 --- a/libstdc++-v3/include/std/istream
17749 +++ b/libstdc++-v3/include/std/istream
17750 @@ -870,10 +870,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
17751 template<typename _CharT, typename _Traits, typename _Tp>
17752 inline basic_istream<_CharT, _Traits>&
17753 operator>>(basic_istream<_CharT, _Traits>&& __is, _Tp& __x)
17754 - {
17755 - __is >> __x;
17756 - return __is;
17757 - }
17758 + { return (__is >> __x); }
17759 #endif // C++11
17760
17761 _GLIBCXX_END_NAMESPACE_VERSION
17762 diff --git a/libstdc++-v3/include/std/ostream b/libstdc++-v3/include/std/ostream
17763 index 2f89a21..18a56ae 100644
17764 --- a/libstdc++-v3/include/std/ostream
17765 +++ b/libstdc++-v3/include/std/ostream
17766 @@ -600,10 +600,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
17767 template<typename _CharT, typename _Traits, typename _Tp>
17768 inline basic_ostream<_CharT, _Traits>&
17769 operator<<(basic_ostream<_CharT, _Traits>&& __os, const _Tp& __x)
17770 - {
17771 - __os << __x;
17772 - return __os;
17773 - }
17774 + { return (__os << __x); }
17775 #endif // C++11
17776
17777 _GLIBCXX_END_NAMESPACE_VERSION
17778 diff --git a/libstdc++-v3/include/std/scoped_allocator b/libstdc++-v3/include/std/scoped_allocator
17779 index 07a192c..33d8779 100644
17780 --- a/libstdc++-v3/include/std/scoped_allocator
17781 +++ b/libstdc++-v3/include/std/scoped_allocator
17782 @@ -105,8 +105,6 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
17783 __inner_type_impl() = default;
17784 __inner_type_impl(const __inner_type_impl&) = default;
17785 __inner_type_impl(__inner_type_impl&&) = default;
17786 - __inner_type_impl& operator=(const __inner_type_impl&) = default;
17787 - __inner_type_impl& operator=(__inner_type_impl&&) = default;
17788
17789 template<typename _Alloc>
17790 __inner_type_impl(const __inner_type_impl<_Alloc>& __other)
17791 @@ -138,8 +136,6 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
17792 __inner_type_impl() = default;
17793 __inner_type_impl(const __inner_type_impl&) = default;
17794 __inner_type_impl(__inner_type_impl&&) = default;
17795 - __inner_type_impl& operator=(const __inner_type_impl&) = default;
17796 - __inner_type_impl& operator=(__inner_type_impl&&) = default;
17797
17798 template<typename... _Allocs>
17799 __inner_type_impl(const __inner_type_impl<_Allocs...>& __other)
17800 @@ -314,12 +310,6 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
17801 _M_inner(std::move(__other._M_inner))
17802 { }
17803
17804 - scoped_allocator_adaptor&
17805 - operator=(const scoped_allocator_adaptor&) = default;
17806 -
17807 - scoped_allocator_adaptor&
17808 - operator=(scoped_allocator_adaptor&&) = default;
17809 -
17810 inner_allocator_type& inner_allocator() noexcept
17811 { return _M_inner._M_get(this); }
17812
17813 diff --git a/libstdc++-v3/include/std/shared_mutex b/libstdc++-v3/include/std/shared_mutex
17814 index 7be6d84..c193eb2 100644
17815 --- a/libstdc++-v3/include/std/shared_mutex
17816 +++ b/libstdc++-v3/include/std/shared_mutex
17817 @@ -57,52 +57,33 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
17818 /// shared_timed_mutex
17819 class shared_timed_mutex
17820 {
17821 - // Must use the same clock as condition_variable
17822 - typedef chrono::system_clock __clock_t;
17823 -
17824 - // Based on Howard Hinnant's reference implementation from N2406.
17825 -
17826 - // The high bit of _M_state is the write-entered flag which is set to
17827 - // indicate a writer has taken the lock or is queuing to take the lock.
17828 - // The remaining bits are the count of reader locks.
17829 - //
17830 - // To take a reader lock, block on gate1 while the write-entered flag is
17831 - // set or the maximum number of reader locks is held, then increment the
17832 - // reader lock count.
17833 - // To release, decrement the count, then if the write-entered flag is set
17834 - // and the count is zero then signal gate2 to wake a queued writer,
17835 - // otherwise if the maximum number of reader locks was held signal gate1
17836 - // to wake a reader.
17837 - //
17838 - // To take a writer lock, block on gate1 while the write-entered flag is
17839 - // set, then set the write-entered flag to start queueing, then block on
17840 - // gate2 while the number of reader locks is non-zero.
17841 - // To release, unset the write-entered flag and signal gate1 to wake all
17842 - // blocked readers and writers.
17843 - //
17844 - // This means that when no reader locks are held readers and writers get
17845 - // equal priority. When one or more reader locks is held a writer gets
17846 - // priority and no more reader locks can be taken while the writer is
17847 - // queued.
17848 -
17849 - // Only locked when accessing _M_state or waiting on condition variables.
17850 - mutex _M_mut;
17851 - // Used to block while write-entered is set or reader count at maximum.
17852 +#if _GTHREAD_USE_MUTEX_TIMEDLOCK
17853 + struct _Mutex : mutex, __timed_mutex_impl<_Mutex>
17854 + {
17855 + template<typename _Rep, typename _Period>
17856 + bool
17857 + try_lock_for(const chrono::duration<_Rep, _Period>& __rtime)
17858 + { return _M_try_lock_for(__rtime); }
17859 +
17860 + template<typename _Clock, typename _Duration>
17861 + bool
17862 + try_lock_until(const chrono::time_point<_Clock, _Duration>& __atime)
17863 + { return _M_try_lock_until(__atime); }
17864 + };
17865 +#else
17866 + typedef mutex _Mutex;
17867 +#endif
17868 +
17869 + // Based on Howard Hinnant's reference implementation from N2406
17870 +
17871 + _Mutex _M_mut;
17872 condition_variable _M_gate1;
17873 - // Used to block queued writers while reader count is non-zero.
17874 condition_variable _M_gate2;
17875 - // The write-entered flag and reader count.
17876 unsigned _M_state;
17877
17878 static constexpr unsigned _S_write_entered
17879 = 1U << (sizeof(unsigned)*__CHAR_BIT__ - 1);
17880 - static constexpr unsigned _S_max_readers = ~_S_write_entered;
17881 -
17882 - // Test whether the write-entered flag is set. _M_mut must be locked.
17883 - bool _M_write_entered() const { return _M_state & _S_write_entered; }
17884 -
17885 - // The number of reader locks currently held. _M_mut must be locked.
17886 - unsigned _M_readers() const { return _M_state & _S_max_readers; }
17887 + static constexpr unsigned _M_n_readers = ~_S_write_entered;
17888
17889 public:
17890 shared_timed_mutex() : _M_state(0) {}
17891 @@ -121,11 +102,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
17892 lock()
17893 {
17894 unique_lock<mutex> __lk(_M_mut);
17895 - // Wait until we can set the write-entered flag.
17896 - _M_gate1.wait(__lk, [=]{ return !_M_write_entered(); });
17897 + while (_M_state & _S_write_entered)
17898 + _M_gate1.wait(__lk);
17899 _M_state |= _S_write_entered;
17900 - // Then wait until there are no more readers.
17901 - _M_gate2.wait(__lk, [=]{ return _M_readers() == 0; });
17902 + while (_M_state & _M_n_readers)
17903 + _M_gate2.wait(__lk);
17904 }
17905
17906 bool
17907 @@ -140,43 +121,41 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
17908 return false;
17909 }
17910
17911 +#if _GTHREAD_USE_MUTEX_TIMEDLOCK
17912 template<typename _Rep, typename _Period>
17913 bool
17914 try_lock_for(const chrono::duration<_Rep, _Period>& __rel_time)
17915 {
17916 - return try_lock_until(__clock_t::now() + __rel_time);
17917 + unique_lock<_Mutex> __lk(_M_mut, __rel_time);
17918 + if (__lk.owns_lock() && _M_state == 0)
17919 + {
17920 + _M_state = _S_write_entered;
17921 + return true;
17922 + }
17923 + return false;
17924 }
17925
17926 template<typename _Clock, typename _Duration>
17927 bool
17928 try_lock_until(const chrono::time_point<_Clock, _Duration>& __abs_time)
17929 {
17930 - unique_lock<mutex> __lk(_M_mut);
17931 - if (!_M_gate1.wait_until(__lk, __abs_time,
17932 - [=]{ return !_M_write_entered(); }))
17933 - {
17934 - return false;
17935 - }
17936 - _M_state |= _S_write_entered;
17937 - if (!_M_gate2.wait_until(__lk, __abs_time,
17938 - [=]{ return _M_readers() == 0; }))
17939 + unique_lock<_Mutex> __lk(_M_mut, __abs_time);
17940 + if (__lk.owns_lock() && _M_state == 0)
17941 {
17942 - _M_state ^= _S_write_entered;
17943 - // Wake all threads blocked while the write-entered flag was set.
17944 - _M_gate1.notify_all();
17945 - return false;
17946 + _M_state = _S_write_entered;
17947 + return true;
17948 }
17949 - return true;
17950 + return false;
17951 }
17952 +#endif
17953
17954 void
17955 unlock()
17956 {
17957 - lock_guard<mutex> __lk(_M_mut);
17958 - _GLIBCXX_DEBUG_ASSERT( _M_write_entered() );
17959 - _M_state = 0;
17960 - // call notify_all() while mutex is held so that another thread can't
17961 - // lock and unlock the mutex then destroy *this before we make the call.
17962 + {
17963 + lock_guard<_Mutex> __lk(_M_mut);
17964 + _M_state = 0;
17965 + }
17966 _M_gate1.notify_all();
17967 }
17968
17969 @@ -186,29 +165,51 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
17970 lock_shared()
17971 {
17972 unique_lock<mutex> __lk(_M_mut);
17973 - _M_gate1.wait(__lk, [=]{ return _M_state < _S_max_readers; });
17974 - ++_M_state;
17975 + while ((_M_state & _S_write_entered)
17976 + || (_M_state & _M_n_readers) == _M_n_readers)
17977 + {
17978 + _M_gate1.wait(__lk);
17979 + }
17980 + unsigned __num_readers = (_M_state & _M_n_readers) + 1;
17981 + _M_state &= ~_M_n_readers;
17982 + _M_state |= __num_readers;
17983 }
17984
17985 bool
17986 try_lock_shared()
17987 {
17988 - unique_lock<mutex> __lk(_M_mut, try_to_lock);
17989 - if (!__lk.owns_lock())
17990 - return false;
17991 - if (_M_state < _S_max_readers)
17992 + unique_lock<_Mutex> __lk(_M_mut, try_to_lock);
17993 + unsigned __num_readers = _M_state & _M_n_readers;
17994 + if (__lk.owns_lock() && !(_M_state & _S_write_entered)
17995 + && __num_readers != _M_n_readers)
17996 {
17997 - ++_M_state;
17998 + ++__num_readers;
17999 + _M_state &= ~_M_n_readers;
18000 + _M_state |= __num_readers;
18001 return true;
18002 }
18003 return false;
18004 }
18005
18006 +#if _GTHREAD_USE_MUTEX_TIMEDLOCK
18007 template<typename _Rep, typename _Period>
18008 bool
18009 try_lock_shared_for(const chrono::duration<_Rep, _Period>& __rel_time)
18010 {
18011 - return try_lock_shared_until(__clock_t::now() + __rel_time);
18012 + unique_lock<_Mutex> __lk(_M_mut, __rel_time);
18013 + if (__lk.owns_lock())
18014 + {
18015 + unsigned __num_readers = _M_state & _M_n_readers;
18016 + if (!(_M_state & _S_write_entered)
18017 + && __num_readers != _M_n_readers)
18018 + {
18019 + ++__num_readers;
18020 + _M_state &= ~_M_n_readers;
18021 + _M_state |= __num_readers;
18022 + return true;
18023 + }
18024 + }
18025 + return false;
18026 }
18027
18028 template <typename _Clock, typename _Duration>
18029 @@ -216,35 +217,38 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
18030 try_lock_shared_until(const chrono::time_point<_Clock,
18031 _Duration>& __abs_time)
18032 {
18033 - unique_lock<mutex> __lk(_M_mut);
18034 - if (!_M_gate1.wait_until(__lk, __abs_time,
18035 - [=]{ return _M_state < _S_max_readers; }))
18036 + unique_lock<_Mutex> __lk(_M_mut, __abs_time);
18037 + if (__lk.owns_lock())
18038 {
18039 - return false;
18040 + unsigned __num_readers = _M_state & _M_n_readers;
18041 + if (!(_M_state & _S_write_entered)
18042 + && __num_readers != _M_n_readers)
18043 + {
18044 + ++__num_readers;
18045 + _M_state &= ~_M_n_readers;
18046 + _M_state |= __num_readers;
18047 + return true;
18048 + }
18049 }
18050 - ++_M_state;
18051 - return true;
18052 + return false;
18053 }
18054 +#endif
18055
18056 void
18057 unlock_shared()
18058 {
18059 - lock_guard<mutex> __lk(_M_mut);
18060 - _GLIBCXX_DEBUG_ASSERT( _M_readers() > 0 );
18061 - auto __prev = _M_state--;
18062 - if (_M_write_entered())
18063 + lock_guard<_Mutex> __lk(_M_mut);
18064 + unsigned __num_readers = (_M_state & _M_n_readers) - 1;
18065 + _M_state &= ~_M_n_readers;
18066 + _M_state |= __num_readers;
18067 + if (_M_state & _S_write_entered)
18068 {
18069 - // Wake the queued writer if there are no more readers.
18070 - if (_M_readers() == 0)
18071 + if (__num_readers == 0)
18072 _M_gate2.notify_one();
18073 - // No need to notify gate1 because we give priority to the queued
18074 - // writer, and that writer will eventually notify gate1 after it
18075 - // clears the write-entered flag.
18076 }
18077 else
18078 {
18079 - // Wake any thread that was blocked on reader overflow.
18080 - if (__prev == _S_max_readers)
18081 + if (__num_readers == _M_n_readers - 1)
18082 _M_gate1.notify_one();
18083 }
18084 }
18085 diff --git a/libstdc++-v3/include/std/thread b/libstdc++-v3/include/std/thread
18086 index 67011de..efcb101 100644
18087 --- a/libstdc++-v3/include/std/thread
18088 +++ b/libstdc++-v3/include/std/thread
18089 @@ -268,8 +268,6 @@ _GLIBCXX_END_NAMESPACE_VERSION
18090 inline void
18091 sleep_for(const chrono::duration<_Rep, _Period>& __rtime)
18092 {
18093 - if (__rtime <= __rtime.zero())
18094 - return;
18095 auto __s = chrono::duration_cast<chrono::seconds>(__rtime);
18096 auto __ns = chrono::duration_cast<chrono::nanoseconds>(__rtime - __s);
18097 #ifdef _GLIBCXX_USE_NANOSLEEP
18098 @@ -288,11 +286,7 @@ _GLIBCXX_END_NAMESPACE_VERSION
18099 template<typename _Clock, typename _Duration>
18100 inline void
18101 sleep_until(const chrono::time_point<_Clock, _Duration>& __atime)
18102 - {
18103 - auto __now = _Clock::now();
18104 - if (__now < __atime)
18105 - sleep_for(__atime - __now);
18106 - }
18107 + { sleep_for(__atime - _Clock::now()); }
18108
18109 _GLIBCXX_END_NAMESPACE_VERSION
18110 }
18111 diff --git a/libstdc++-v3/testsuite/20_util/duration/literals/65499.cc b/libstdc++-v3/testsuite/20_util/duration/literals/65499.cc
18112 deleted file mode 100644
18113 index 62c4f5a..0000000
18114 --- a/libstdc++-v3/testsuite/20_util/duration/literals/65499.cc
18115 +++ /dev/null
18116 @@ -1,26 +0,0 @@
18117 -// Copyright (C) 2015 Free Software Foundation, Inc.
18118 -//
18119 -// This file is part of the GNU ISO C++ Library. This library is free
18120 -// software; you can redistribute it and/or modify it under the
18121 -// terms of the GNU General Public License as published by the
18122 -// Free Software Foundation; either version 3, or (at your option)
18123 -// any later version.
18124 -
18125 -// This library is distributed in the hope that it will be useful,
18126 -// but WITHOUT ANY WARRANTY; without even the implied warranty of
18127 -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18128 -// GNU General Public License for more details.
18129 -
18130 -// You should have received a copy of the GNU General Public License along
18131 -// with this library; see the file COPYING3. If not see
18132 -// <http://www.gnu.org/licenses/>.
18133 -
18134 -// { dg-options "-std=gnu++14" }
18135 -// { dg-do compile }
18136 -
18137 -// PR libstdc++/65499
18138 -
18139 -#include <chrono>
18140 -
18141 -using namespace std::chrono;
18142 -minutes min = 36min;
18143 diff --git a/libstdc++-v3/testsuite/20_util/scoped_allocator/65279.cc b/libstdc++-v3/testsuite/20_util/scoped_allocator/65279.cc
18144 deleted file mode 100644
18145 index 786d403..0000000
18146 --- a/libstdc++-v3/testsuite/20_util/scoped_allocator/65279.cc
18147 +++ /dev/null
18148 @@ -1,54 +0,0 @@
18149 -// Copyright (C) 2015 Free Software Foundation, Inc.
18150 -//
18151 -// This file is part of the GNU ISO C++ Library. This library is free
18152 -// software; you can redistribute it and/or modify it under the
18153 -// terms of the GNU General Public License as published by the
18154 -// Free Software Foundation; either version 3, or (at your option)
18155 -// any later version.
18156 -
18157 -// This library is distributed in the hope that it will be useful,
18158 -// but WITHOUT ANY WARRANTY; without even the implied warranty of
18159 -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18160 -// GNU General Public License for more details.
18161 -
18162 -// You should have received a copy of the GNU General Public License along
18163 -// with this library; see the file COPYING3. If not see
18164 -// <http://www.gnu.org/licenses/>.
18165 -
18166 -// { dg-options "-std=gnu++11" }
18167 -// { dg-do compile }
18168 -
18169 -#include <memory>
18170 -#include <type_traits>
18171 -#include <scoped_allocator>
18172 -
18173 -template<typename T>
18174 - struct Allocator : std::allocator<T>
18175 - {
18176 - template<typename U>
18177 - struct rebind { using other = Allocator<U>; };
18178 -
18179 - using propagate_on_container_copy_assignment = std::true_type;
18180 - using propagate_on_container_move_assignment = std::true_type;
18181 - };
18182 -
18183 -template<typename... T>
18184 - using alloc = std::scoped_allocator_adaptor<Allocator<T>...>;
18185 -
18186 -void
18187 -test01()
18188 -{
18189 - // Test partial specialization for sizeof...(InnerAlloc) == 0
18190 - alloc<int> a;
18191 - a = a;
18192 - a = std::move(a);
18193 -}
18194 -
18195 -void
18196 -test02()
18197 -{
18198 - // Test partial specialization for sizeof...(InnerAlloc) >= 1
18199 - alloc<int, char> a;
18200 - a = a;
18201 - a = std::move(a);
18202 -}
18203 diff --git a/libstdc++-v3/testsuite/27_io/rvalue_streams-2.cc b/libstdc++-v3/testsuite/27_io/rvalue_streams-2.cc
18204 deleted file mode 100644
18205 index d9b6146..0000000
18206 --- a/libstdc++-v3/testsuite/27_io/rvalue_streams-2.cc
18207 +++ /dev/null
18208 @@ -1,35 +0,0 @@
18209 -// { dg-options "-std=gnu++11" }
18210 -// { dg-do compile }
18211 -
18212 -// Copyright (C) 2015 Free Software Foundation, Inc.
18213 -//
18214 -// This file is part of the GNU ISO C++ Library. This library is free
18215 -// software; you can redistribute it and/or modify it under the
18216 -// terms of the GNU General Public License as published by the
18217 -// Free Software Foundation; either version 3, or (at your option)
18218 -// any later version.
18219 -
18220 -// This library is distributed in the hope that it will be useful,
18221 -// but WITHOUT ANY WARRANTY; without even the implied warranty of
18222 -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18223 -// GNU General Public License for more details.
18224 -
18225 -// You should have received a copy of the GNU General Public License along
18226 -// with this library; see the file COPYING3. If not see
18227 -// <http://www.gnu.org/licenses/>.
18228 -
18229 -#include <sstream>
18230 -
18231 -struct A {};
18232 -
18233 -void operator<<(std::ostream&, const A&) { }
18234 -void operator>>(std::istream&, A&) { }
18235 -
18236 -// PR libstdc++/65543
18237 -int main()
18238 -{
18239 - A a;
18240 -
18241 - std::ostringstream() << a;
18242 - std::istringstream() >> a;
18243 -}
18244 diff --git a/libstdc++-v3/testsuite/29_atomics/atomic_flag/clear/1.cc b/libstdc++-v3/testsuite/29_atomics/atomic_flag/clear/1.cc
18245 index 14bd606..7c03a3c 100644
18246 --- a/libstdc++-v3/testsuite/29_atomics/atomic_flag/clear/1.cc
18247 +++ b/libstdc++-v3/testsuite/29_atomics/atomic_flag/clear/1.cc
18248 @@ -1,5 +1,4 @@
18249 // { dg-options "-std=gnu++0x" }
18250 -// { dg-require-thread-fence "" }
18251
18252 // Copyright (C) 2009-2014 Free Software Foundation, Inc.
18253 //
18254 diff --git a/libstdc++-v3/testsuite/29_atomics/atomic_flag/test_and_set/explicit.cc b/libstdc++-v3/testsuite/29_atomics/atomic_flag/test_and_set/explicit.cc
18255 index 09394eb..580309e 100644
18256 --- a/libstdc++-v3/testsuite/29_atomics/atomic_flag/test_and_set/explicit.cc
18257 +++ b/libstdc++-v3/testsuite/29_atomics/atomic_flag/test_and_set/explicit.cc
18258 @@ -1,5 +1,4 @@
18259 // { dg-options "-std=gnu++0x" }
18260 -// { dg-require-thread-fence "" }
18261
18262 // Copyright (C) 2008-2014 Free Software Foundation, Inc.
18263 //
18264 diff --git a/libstdc++-v3/testsuite/29_atomics/atomic_flag/test_and_set/implicit.cc b/libstdc++-v3/testsuite/29_atomics/atomic_flag/test_and_set/implicit.cc
18265 index 02d0ae5..c5dbd16 100644
18266 --- a/libstdc++-v3/testsuite/29_atomics/atomic_flag/test_and_set/implicit.cc
18267 +++ b/libstdc++-v3/testsuite/29_atomics/atomic_flag/test_and_set/implicit.cc
18268 @@ -1,5 +1,4 @@
18269 // { dg-options "-std=gnu++0x" }
18270 -// { dg-require-thread-fence "" }
18271
18272 // Copyright (C) 2008-2014 Free Software Foundation, Inc.
18273 //
18274 diff --git a/libstdc++-v3/testsuite/30_threads/shared_lock/cons/5.cc b/libstdc++-v3/testsuite/30_threads/shared_lock/cons/5.cc
18275 index 6b9da98..712e68c 100644
18276 --- a/libstdc++-v3/testsuite/30_threads/shared_lock/cons/5.cc
18277 +++ b/libstdc++-v3/testsuite/30_threads/shared_lock/cons/5.cc
18278 @@ -3,6 +3,7 @@
18279 // { dg-options " -std=gnu++1y -pthreads" { target *-*-solaris* } }
18280 // { dg-options " -std=gnu++1y " { target *-*-cygwin *-*-darwin* } }
18281 // { dg-require-cstdint "" }
18282 +// { dg-require-gthreads-timed "" }
18283
18284 // Copyright (C) 2013-2014 Free Software Foundation, Inc.
18285 //
18286 diff --git a/libstdc++-v3/testsuite/30_threads/shared_lock/cons/6.cc b/libstdc++-v3/testsuite/30_threads/shared_lock/cons/6.cc
18287 index 2c7b4e1..bb1f902 100644
18288 --- a/libstdc++-v3/testsuite/30_threads/shared_lock/cons/6.cc
18289 +++ b/libstdc++-v3/testsuite/30_threads/shared_lock/cons/6.cc
18290 @@ -3,6 +3,7 @@
18291 // { dg-options " -std=gnu++1y -pthreads" { target *-*-solaris* } }
18292 // { dg-options " -std=gnu++1y " { target *-*-cygwin *-*-darwin* } }
18293 // { dg-require-cstdint "" }
18294 +// { dg-require-gthreads-timed "" }
18295
18296 // Copyright (C) 2013-2014 Free Software Foundation, Inc.
18297 //
18298 diff --git a/libstdc++-v3/testsuite/30_threads/shared_lock/locking/3.cc b/libstdc++-v3/testsuite/30_threads/shared_lock/locking/3.cc
18299 index 45c197b..2770a75 100644
18300 --- a/libstdc++-v3/testsuite/30_threads/shared_lock/locking/3.cc
18301 +++ b/libstdc++-v3/testsuite/30_threads/shared_lock/locking/3.cc
18302 @@ -3,6 +3,7 @@
18303 // { dg-options " -std=gnu++1y -pthreads" { target *-*-solaris* } }
18304 // { dg-options " -std=gnu++1y " { target *-*-cygwin *-*-darwin* } }
18305 // { dg-require-cstdint "" }
18306 +// { dg-require-gthreads-timed "" }
18307
18308 // Copyright (C) 2013-2014 Free Software Foundation, Inc.
18309 //
18310 diff --git a/libstdc++-v3/testsuite/30_threads/shared_lock/locking/4.cc b/libstdc++-v3/testsuite/30_threads/shared_lock/locking/4.cc
18311 index 1c8f7ea..8d11de9 100644
18312 --- a/libstdc++-v3/testsuite/30_threads/shared_lock/locking/4.cc
18313 +++ b/libstdc++-v3/testsuite/30_threads/shared_lock/locking/4.cc
18314 @@ -3,6 +3,7 @@
18315 // { dg-options " -std=gnu++1y -pthreads" { target *-*-solaris* } }
18316 // { dg-options " -std=gnu++1y " { target *-*-cygwin *-*-darwin* } }
18317 // { dg-require-cstdint "" }
18318 +// { dg-require-gthreads-timed "" }
18319
18320 // Copyright (C) 2013-2014 Free Software Foundation, Inc.
18321 //
18322 diff --git a/libstdc++-v3/testsuite/30_threads/shared_timed_mutex/try_lock/3.cc b/libstdc++-v3/testsuite/30_threads/shared_timed_mutex/try_lock/3.cc
18323 deleted file mode 100644
18324 index e9f728e..0000000
18325 --- a/libstdc++-v3/testsuite/30_threads/shared_timed_mutex/try_lock/3.cc
18326 +++ /dev/null
18327 @@ -1,75 +0,0 @@
18328 -// { dg-do run { target *-*-freebsd* *-*-dragonfly* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* powerpc-ibm-aix* } }
18329 -// { dg-options " -std=gnu++14 -pthread" { target *-*-freebsd* *-*-dragonfly* *-*-netbsd* *-*-linux* powerpc-ibm-aix* } }
18330 -// { dg-options " -std=gnu++14 -pthreads" { target *-*-solaris* } }
18331 -// { dg-options " -std=gnu++14 " { target *-*-cygwin *-*-darwin* } }
18332 -// { dg-require-cstdint "" }
18333 -// { dg-require-gthreads "" }
18334 -
18335 -// Copyright (C) 2013-2015 Free Software Foundation, Inc.
18336 -//
18337 -// This file is part of the GNU ISO C++ Library. This library is free
18338 -// software; you can redistribute it and/or modify it under the
18339 -// terms of the GNU General Public License as published by the
18340 -// Free Software Foundation; either version 3, or (at your option)
18341 -// any later version.
18342 -
18343 -// This library is distributed in the hope that it will be useful,
18344 -// but WITHOUT ANY WARRANTY; without even the implied warranty of
18345 -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18346 -// GNU General Public License for more details.
18347 -
18348 -// You should have received a copy of the GNU General Public License along
18349 -// with this library; see the file COPYING3. If not see
18350 -// <http://www.gnu.org/licenses/>.
18351 -
18352 -
18353 -#include <shared_mutex>
18354 -#include <thread>
18355 -#include <system_error>
18356 -#include <testsuite_hooks.h>
18357 -
18358 -int main()
18359 -{
18360 - bool test __attribute__((unused)) = true;
18361 - typedef std::shared_timed_mutex mutex_type;
18362 -
18363 - try
18364 - {
18365 - mutex_type m;
18366 - m.lock();
18367 - bool b;
18368 -
18369 - std::thread t([&] {
18370 - try
18371 - {
18372 - using namespace std::chrono;
18373 - auto timeout = 100ms;
18374 - auto start = system_clock::now();
18375 - b = m.try_lock_for(timeout);
18376 - auto t = system_clock::now() - start;
18377 - VERIFY( !b );
18378 - VERIFY( t >= timeout );
18379 -
18380 - start = system_clock::now();
18381 - b = m.try_lock_until(start + timeout);
18382 - t = system_clock::now() - start;
18383 - VERIFY( !b );
18384 - VERIFY( t >= timeout );
18385 - }
18386 - catch (const std::system_error& e)
18387 - {
18388 - VERIFY( false );
18389 - }
18390 - });
18391 - t.join();
18392 - m.unlock();
18393 - }
18394 - catch (const std::system_error& e)
18395 - {
18396 - VERIFY( false );
18397 - }
18398 - catch (...)
18399 - {
18400 - VERIFY( false );
18401 - }
18402 -}
18403 diff --git a/libstdc++-v3/testsuite/30_threads/this_thread/58038.cc b/libstdc++-v3/testsuite/30_threads/this_thread/58038.cc
18404 deleted file mode 100644
18405 index afa861c..0000000
18406 --- a/libstdc++-v3/testsuite/30_threads/this_thread/58038.cc
18407 +++ /dev/null
18408 @@ -1,44 +0,0 @@
18409 -// Copyright (C) 2015 Free Software Foundation, Inc.
18410 -//
18411 -// This file is part of the GNU ISO C++ Library. This library is free
18412 -// software; you can redistribute it and/or modify it under the
18413 -// terms of the GNU General Public License as published by the
18414 -// Free Software Foundation; either version 3, or (at your option)
18415 -// any later version.
18416 -
18417 -// This library is distributed in the hope that it will be useful,
18418 -// but WITHOUT ANY WARRANTY; without even the implied warranty of
18419 -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18420 -// GNU General Public License for more details.
18421 -
18422 -// You should have received a copy of the GNU General Public License along
18423 -// with this library; see the file COPYING3. If not see
18424 -// <http://www.gnu.org/licenses/>.
18425 -
18426 -// { dg-options "-std=gnu++11" }
18427 -// { dg-require-cstdint "" }
18428 -// { dg-require-time "" }
18429 -
18430 -#include <thread>
18431 -#include <chrono>
18432 -
18433 -void
18434 -test01()
18435 -{
18436 - auto now = std::chrono::system_clock::now();
18437 - std::this_thread::sleep_until(now - 1ul * std::chrono::seconds(1));
18438 -}
18439 -
18440 -void
18441 -test02()
18442 -{
18443 - auto now = std::chrono::steady_clock::now();
18444 - std::this_thread::sleep_until(now - 1ul * std::chrono::seconds(1));
18445 -}
18446 -
18447 -int
18448 -main()
18449 -{
18450 - test01();
18451 - test02();
18452 -}
18453 diff --git a/libstdc++-v3/testsuite/30_threads/this_thread/60421.cc b/libstdc++-v3/testsuite/30_threads/this_thread/60421.cc
18454 deleted file mode 100644
18455 index ecc4deb..0000000
18456 --- a/libstdc++-v3/testsuite/30_threads/this_thread/60421.cc
18457 +++ /dev/null
18458 @@ -1,38 +0,0 @@
18459 -// Copyright (C) 2015 Free Software Foundation, Inc.
18460 -//
18461 -// This file is part of the GNU ISO C++ Library. This library is free
18462 -// software; you can redistribute it and/or modify it under the
18463 -// terms of the GNU General Public License as published by the
18464 -// Free Software Foundation; either version 3, or (at your option)
18465 -// any later version.
18466 -
18467 -// This library is distributed in the hope that it will be useful,
18468 -// but WITHOUT ANY WARRANTY; without even the implied warranty of
18469 -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18470 -// GNU General Public License for more details.
18471 -
18472 -// You should have received a copy of the GNU General Public License along
18473 -// with this library; see the file COPYING3. If not see
18474 -// <http://www.gnu.org/licenses/>.
18475 -
18476 -// { dg-options "-std=gnu++11" }
18477 -// { dg-require-cstdint "" }
18478 -// { dg-require-time "" }
18479 -
18480 -#include <thread>
18481 -#include <chrono>
18482 -#include <testsuite_hooks.h>
18483 -
18484 -void
18485 -test01()
18486 -{
18487 - std::this_thread::sleep_for(std::chrono::seconds(0));
18488 - std::this_thread::sleep_for(std::chrono::seconds(-1));
18489 - std::this_thread::sleep_for(std::chrono::duration<uint64_t>::zero());
18490 -}
18491 -
18492 -int
18493 -main()
18494 -{
18495 - test01();
18496 -}
18497 diff --git a/libstdc++-v3/testsuite/lib/dg-options.exp b/libstdc++-v3/testsuite/lib/dg-options.exp
18498 index 5cdc7f3..d01bb91 100644
18499 --- a/libstdc++-v3/testsuite/lib/dg-options.exp
18500 +++ b/libstdc++-v3/testsuite/lib/dg-options.exp
18501 @@ -115,15 +115,6 @@ proc dg-require-cmath { args } {
18502 return
18503 }
18504
18505 -proc dg-require-thread-fence { args } {
18506 - if { ![ check_v3_target_thread_fence ] } {
18507 - upvar dg-do-what dg-do-what
18508 - set dg-do-what [list [lindex ${dg-do-what} 0] "N" "P"]
18509 - return
18510 - }
18511 - return
18512 -}
18513 -
18514 proc dg-require-atomic-builtins { args } {
18515 if { ![ check_v3_target_atomic_builtins ] } {
18516 upvar dg-do-what dg-do-what
18517 diff --git a/libstdc++-v3/testsuite/lib/libstdc++.exp b/libstdc++-v3/testsuite/lib/libstdc++.exp
18518 index eb2e8a8..95954d8 100644
18519 --- a/libstdc++-v3/testsuite/lib/libstdc++.exp
18520 +++ b/libstdc++-v3/testsuite/lib/libstdc++.exp
18521 @@ -1200,62 +1200,6 @@ proc check_v3_target_cmath { } {
18522 return $et_c99_math
18523 }
18524
18525 -proc check_v3_target_thread_fence { } {
18526 - global cxxflags
18527 - global DEFAULT_CXXFLAGS
18528 - global et_thread_fence
18529 -
18530 - global tool
18531 -
18532 - if { ![info exists et_thread_fence_target_name] } {
18533 - set et_thread_fence_target_name ""
18534 - }
18535 -
18536 - # If the target has changed since we set the cached value, clear it.
18537 - set current_target [current_target_name]
18538 - if { $current_target != $et_thread_fence_target_name } {
18539 - verbose "check_v3_target_thread_fence: `$et_thread_fence_target_name'" 2
18540 - set et_thread_fence_target_name $current_target
18541 - if [info exists et_thread_fence] {
18542 - verbose "check_v3_target_thread_fence: removing cached result" 2
18543 - unset et_thread_fence
18544 - }
18545 - }
18546 -
18547 - if [info exists et_thread_fence] {
18548 - verbose "check_v3_target_thread_fence: using cached result" 2
18549 - } else {
18550 - set et_thread_fence 0
18551 -
18552 - # Set up and preprocess a C++11 test program that depends
18553 - # on the thread fence to be available.
18554 - set src thread_fence[pid].cc
18555 -
18556 - set f [open $src "w"]
18557 - puts $f "int main() {"
18558 - puts $f "__atomic_thread_fence (__ATOMIC_SEQ_CST);"
18559 - puts $f "return 0;"
18560 - puts $f "}"
18561 - close $f
18562 -
18563 - set cxxflags_saved $cxxflags
18564 - set cxxflags "$cxxflags $DEFAULT_CXXFLAGS -Werror -std=gnu++11"
18565 -
18566 - set lines [v3_target_compile $src /dev/null executable ""]
18567 - set cxxflags $cxxflags_saved
18568 - file delete $src
18569 -
18570 - if [string match "" $lines] {
18571 - # No error message, linking succeeded.
18572 - set et_thread_fence 1
18573 - } else {
18574 - verbose "check_v3_target_thread_fence: compilation failed" 2
18575 - }
18576 - }
18577 - verbose "check_v3_target_thread_fence: $et_thread_fence" 2
18578 - return $et_thread_fence
18579 -}
18580 -
18581 proc check_v3_target_atomic_builtins { } {
18582 global cxxflags
18583 global DEFAULT_CXXFLAGS