Codebase list hwinfo / 8af8c6f
Update upstream source from tag 'upstream/21.56' Update to upstream version '21.56' with Debian dir 2f3baf42966aee2034ac0e1b4117cbad05fbe7f2 Tomasz Buchert 5 years ago
4 changed file(s) with 44 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
146146 char cpu[32], mmu[32], fpu[32];
147147 unsigned mhz;
148148 double bogo;
149 #endif
150
151 #ifdef __riscv
152 char hart[32], isa[32], mmu[32];
153 char uarch[80];
149154 #endif
150155
151156 hd_data->cpu = read_file(PROC_CPUINFO, 0, 0);
681686 hd->detail->cpu.data = ct;
682687 }
683688 #endif /* __m68k__ */
689
690 #ifdef __riscv
691 *isa = *mmu = *uarch = 0;
692 cpus = 0;
693
694 for (sl = hd_data->cpu; sl; sl = sl->next) {
695 if (sscanf(sl->str, "isa : %31[^\n]", isa) == 1);
696 if (sscanf(sl->str, "mmu : %31[^\n]", mmu) == 1);
697 if (sscanf(sl->str, "uarch : %79[^\n]", uarch) == 1);
698
699 if(strstr(sl->str, "hart") == sl->str || !sl->next) { /* EOF */
700 if (*isa || *mmu || *uarch) { /* at least one of those */
701 ct = new_mem(sizeof *ct);
702 ct->architecture = arch_riscv;
703 if (*isa) ct->model_name = new_str(isa);
704 if (*uarch) ct->vend_name = new_str(uarch);
705
706 hd = add_hd_entry(hd_data, __LINE__, 0);
707 hd->base_class.id = bc_internal;
708 hd->sub_class.id = sc_int_cpu;
709 hd->slot = cpus;
710 hd->detail = new_mem(sizeof *hd->detail);
711 hd->detail->type = hd_detail_cpu;
712 hd->detail->cpu.data = ct;
713 }
714 }
715 }
716 #endif /* __riscv */
684717 }
685718
686719 /*
149149
150150 #ifdef __m68k__
151151 #define HD_ARCH "68k"
152 #endif
153
154 #ifdef __riscv
155 #define HD_ARCH "riscv"
152156 #endif
153157
154158 typedef struct disk_s {
30713075 return arch_aarch64;
30723076 #elif defined __m68k__
30733077 return arch_68k;
3078 #elif defined __riscv
3079 return arch_riscv;
30743080 #else
30753081 return arch_unknown;
30763082 #endif
14451445 arch_arm,
14461446 arch_mips,
14471447 arch_x86_64,
1448 arch_aarch64
1448 arch_aarch64,
1449 arch_riscv
14491450 } hd_cpu_arch_t;
14501451
14511452 /**
11161116 case arch_aarch64:
11171117 dump_line0 ("AArch64\n");
11181118 break;
1119 case arch_riscv:
1120 dump_line0 ("RISC-V\n");
1121 break;
11191122 default:
11201123 dump_line0 ("**UNKNWON**\n");
11211124 break;