146 | 146 |
char cpu[32], mmu[32], fpu[32];
|
147 | 147 |
unsigned mhz;
|
148 | 148 |
double bogo;
|
|
149 |
#endif
|
|
150 |
|
|
151 |
#ifdef __riscv
|
|
152 |
char hart[32], isa[32], mmu[32];
|
|
153 |
char uarch[80];
|
149 | 154 |
#endif
|
150 | 155 |
|
151 | 156 |
hd_data->cpu = read_file(PROC_CPUINFO, 0, 0);
|
|
681 | 686 |
hd->detail->cpu.data = ct;
|
682 | 687 |
}
|
683 | 688 |
#endif /* __m68k__ */
|
|
689 |
|
|
690 |
#ifdef __riscv
|
|
691 |
*isa = *mmu = *uarch = 0;
|
|
692 |
cpus = 0;
|
|
693 |
|
|
694 |
for (sl = hd_data->cpu; sl; sl = sl->next) {
|
|
695 |
if (sscanf(sl->str, "isa : %31[^\n]", isa) == 1);
|
|
696 |
if (sscanf(sl->str, "mmu : %31[^\n]", mmu) == 1);
|
|
697 |
if (sscanf(sl->str, "uarch : %79[^\n]", uarch) == 1);
|
|
698 |
|
|
699 |
if(strstr(sl->str, "hart") == sl->str || !sl->next) { /* EOF */
|
|
700 |
if (*isa || *mmu || *uarch) { /* at least one of those */
|
|
701 |
ct = new_mem(sizeof *ct);
|
|
702 |
ct->architecture = arch_riscv;
|
|
703 |
if (*isa) ct->model_name = new_str(isa);
|
|
704 |
if (*uarch) ct->vend_name = new_str(uarch);
|
|
705 |
|
|
706 |
hd = add_hd_entry(hd_data, __LINE__, 0);
|
|
707 |
hd->base_class.id = bc_internal;
|
|
708 |
hd->sub_class.id = sc_int_cpu;
|
|
709 |
hd->slot = cpus;
|
|
710 |
hd->detail = new_mem(sizeof *hd->detail);
|
|
711 |
hd->detail->type = hd_detail_cpu;
|
|
712 |
hd->detail->cpu.data = ct;
|
|
713 |
}
|
|
714 |
}
|
|
715 |
}
|
|
716 |
#endif /* __riscv */
|
684 | 717 |
}
|
685 | 718 |
|
686 | 719 |
/*
|