Codebase list intel-media-driver / 3183a4f
Update upstream source from tag 'upstream/21.1.1+dfsg1' Update to upstream version '21.1.1+dfsg1' with Debian dir 3b2c6042198e8261d0248d2048f19086c41e495a Sebastian Ramacher 3 years ago
100 changed file(s) with 1803 addition(s) and 354 deletion(s). Raw diff Collapse all Expand all
2828 path: gmmlib
2929 - name: install toolchain
3030 run: |
31 if sudo apt-cache search --names-only ^clang-11$ | grep -q clang-11; then \
31 if [[ -e $CC && -e $CXX ]]; then \
3232 echo "clang-11 already presents in the image"; \
3333 else \
3434 echo "clang-11 missed in the image, installing from llvm"; \
1919
2020 cmake_minimum_required(VERSION 3.5)
2121
22 set(MEDIA_VERSION "21.1.0${MEDIA_VERSION_EXTRA}" CACHE STRING "" FORCE)
22 set(MEDIA_VERSION "21.1.1${MEDIA_VERSION_EXTRA}" CACHE STRING "" FORCE)
2323
2424 include(os_release_info.cmake)
2525
742742 return false;
743743 }
744744
745 if (Mos_ResourceIsNull(&decodeProcParams->m_outputSurface->OsResource))
746 {
747 CODECHAL_DECODE_NORMALMESSAGE("m_outputSurface->OsResource is Null");
748 return false;
749 }
750
745751 PMOS_SURFACE srcSurface = decodeProcParams->m_inputSurface;
746752 PMOS_SURFACE destSurface = decodeProcParams->m_outputSurface;
747753
13351335 return eStatus;
13361336 }
13371337
1338 surface->dwPitch = (uint32_t)surface->OsResource.pGmmResInfo->GetRenderPitch();
1339
13381340 CodechalResLock bufLock(m_osInterface, &surface->OsResource);
13391341 auto data = bufLock.Lock(CodechalResLock::writeOnly);
13401342 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
13411343
1342 MOS_ZeroMemory(data, surface->dwWidth * surface->dwHeight);
1344 MOS_ZeroMemory(data, surface->dwPitch * surface->dwHeight);
13431345
13441346 return eStatus;
13451347 }
37533755 auto data = (uint8_t *)bufLock.Lock(CodechalResLock::writeOnly);
37543756 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
37553757
3756 MOS_ZeroMemory(data, brcConstantDataBuffer.dwWidth * brcConstantDataBuffer.dwHeight);
3758 MOS_ZeroMemory(data, brcConstantDataBuffer.dwPitch * brcConstantDataBuffer.dwHeight);
37573759
37583760 uint8_t *maxFrameThresholdArray = nullptr;
37593761 uint8_t *distQPAdjustmentArray = nullptr;
37783780 }
37793781
37803782 // Fill surface with QP Adjustment table, Distortion threshold table, MaxFrame threshold table for I frame
3781 // The surface width happens to be the size of the array.
3783 // The surface width happens to be the size of the array (64), but pitch can be greater.
37823784 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
37833785 data,
37843786 m_frameThresholdArraySize,
37853787 maxFrameThresholdArray,
37863788 m_frameThresholdArraySize));
37873789
3788 data += m_frameThresholdArraySize;
3789
3790 for (uint32_t i = 0; i < m_distQpAdjustmentArraySize; i += m_brcConstantSurfaceWidth)
3791 {
3792 uint32_t copySize;
3790 data += brcConstantDataBuffer.dwPitch; // advance next row in 2D using pitch
3791
3792 for (uint32_t i = 0; i < m_distQpAdjustmentArraySize; i += m_brcConstantSurfaceWidth, data += brcConstantDataBuffer.dwPitch)
3793 {
3794 uint32_t copySize; // to write <=64 bytes per row
37933795 if ((m_distQpAdjustmentArraySize - i) > m_brcConstantSurfaceWidth)
37943796 {
37953797 copySize = m_brcConstantSurfaceWidth;
37993801 copySize = m_distQpAdjustmentArraySize - i;
38003802 }
38013803 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
3802 data + i,
3804 data,
38033805 copySize,
38043806 distQPAdjustmentArray + i,
38053807 copySize));
12471247
12481248 // the first task?
12491249 requestFrameTracking = false;
1250 CODECHAL_ENCODE_CHK_STATUS_RETURN(encoder->SendPrologWithFrameTracking(&cmdBuffer, requestFrameTracking));
1250 CODECHAL_ENCODE_CHK_STATUS_RETURN(encoder->SendPrologWithFrameTracking(&cmdBuffer, requestFrameTracking, mmioVeboxRegisters));
12511251
12521252 // If m_pollingSyncEnabled is set, insert HW semaphore to wait for external
12531253 // raw surface processing to complete, before start CSC. Once the marker in
12981298
12991299 CODECHAL_ENCODE_CHK_STATUS_RETURN(AddSfcCommands(sfcInterface, &cmdBuffer));
13001300
1301 HalOcaInterface::TraceMessage(cmdBuffer, *pOsContext, __FUNCTION__, sizeof(__FUNCTION__));
13011302 HalOcaInterface::OnDispatch(cmdBuffer, *pOsContext, *miInterface, *mmioVeboxRegisters);
13021303
13031304 CODECHAL_ENCODE_CHK_STATUS_RETURN(veboxInterface->AddVeboxDiIecp(&cmdBuffer, &veboxDiIecpCmdParams));
340340 bool brcEnabled,
341341 bool streaminEnabled,
342342 bool roiStreamInEnabled,
343 bool brcAdaptiveRegionBoostEnable,
343344 bool roundingEnabled,
344345 bool panicEnabled,
345346 int32_t currentPass
377378 m_panicEnabled = panicEnabled;
378379 m_roiStreamInEnabled = roiStreamInEnabled;
379380 m_currentPass = currentPass;
381 m_brcAdaptiveRegionBoostEnabled = brcAdaptiveRegionBoostEnable;
380382
381383 MOS_ZeroMemory(&lockFlagsWriteOnly, sizeof(MOS_LOCK_PARAMS));
382384 lockFlagsWriteOnly.WriteOnly = 1;
215215 bool m_roundingEnabled = false;
216216 bool m_panicEnabled = false;
217217 bool m_roiStreamInEnabled = false;
218 bool m_brcAdaptiveRegionBoostEnabled = false;
218219 int32_t m_currentPass = 0;
219220 int32_t m_cmdCount = 0 ;
220221
290291 bool brcEnabled,
291292 bool streaminEnabled,
292293 bool roiStreamInEnabled,
294 bool brcAdaptiveRegionBoostEnable,
293295 bool roundingEnabled,
294296 bool panicEnabled,
295297 int32_t currentPass
45754575 break;
45764576 }
45774577 }
4578 if (dqpidx == -1)
4579 {
4580 return MOS_STATUS_INVALID_PARAMETER;
4581 }
4578 CODECHAL_ENCODE_CHK_COND_RETURN(dqpidx == -1, "Max number of supported different dQP for ROI is %u", m_maxNumNativeRoi);
45824579
45834580 uint32_t curX, curY;
45844581 for (curY = picParams->ROI[i].Top; curY < picParams->ROI[i].Bottom; curY++)
47784775
47794776 MOS_ZeroMemory(pData, m_picHeightInMb * m_picWidthInMb);
47804777
4778
47814779 for (int32_t i = picParams->NumROI - 1; i >= 0; i--)
47824780 {
4781 int32_t dqpidx = -1;
4782 for (int32_t j = 0; j < m_maxNumBrcRoi; j++)
4783 {
4784 if (m_avcPicParam->ROIDistinctDeltaQp[j] == m_avcPicParam->ROI[i].PriorityLevelOrDQp)
4785 {
4786 dqpidx = j;
4787 break;
4788 }
4789 }
4790 CODECHAL_ENCODE_CHK_COND_RETURN(dqpidx == -1, "Max number of supported different dQP for ROI is %u", m_maxNumBrcRoi);
4791
47834792 uint32_t curX, curY;
47844793 for (curY = picParams->ROI[i].Top; curY < picParams->ROI[i].Bottom; curY++)
47854794 {
47864795 for (curX = picParams->ROI[i].Left; curX < picParams->ROI[i].Right; curX++)
47874796 {
4788 *(pData + (m_picWidthInMb * curY + curX)) = i + 1; // Shift ROI by 1
4797 *(pData + (m_picWidthInMb * curY + curX)) = dqpidx + 1; // Shift ROI by 1
47894798 }
47904799 }
47914800 }
56315640 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
56325641 m_rawSurfaceToEnc,
56335642 CodechalDbgAttr::attrEncodeRawInputSurface,
5634 "SrcSurf")))
5643 "SrcSurf"))
5644 CODECHAL_DEBUG_TOOL(m_debugInterface->DumpSurfaceInfo(m_rawSurfaceToEnc, "RawSurfaceToEnc")));
56355645
56365646 m_firstTaskInPhase = true;
56375647
59495959 reconSurfaceParams.Mode = m_mode;
59505960 reconSurfaceParams.ucSurfaceStateId = CODECHAL_MFX_REF_SURFACE_ID;
59515961 reconSurfaceParams.psSurface = &m_reconSurface;
5962 CODECHAL_DEBUG_TOOL(m_debugInterface->DumpSurfaceInfo(&m_reconSurface, "ReconSurface"));
59525963
59535964 // Src surface
59545965 MHW_VDBOX_SURFACE_PARAMS surfaceParams;
59605971 surfaceParams.dwActualWidth = surfaceParams.psSurface->dwWidth;
59615972 surfaceParams.bDisplayFormatSwizzle = m_avcPicParam->bDisplayFormatSwizzle;
59625973 surfaceParams.bColorSpaceSelection = (m_avcSeqParam->InputColorSpace == ECOLORSPACE_P709) ? 1 : 0;
5974 CODECHAL_DEBUG_TOOL(m_debugInterface->DumpSurfaceInfo(m_rawSurfaceToPak, "RawSurfaceToPak"));
59635975
59645976 MHW_VDBOX_PIPE_BUF_ADDR_PARAMS pipeBufAddrParams;
59655977 pipeBufAddrParams.pRawSurfParam = &surfaceParams;
59845996 dsSurfaceParams.Mode = m_mode;
59855997 dsSurfaceParams.ucSurfaceStateId = CODECHAL_MFX_DSRECON_SURFACE_ID;
59865998 dsSurfaceParams.psSurface = m_trackedBuf->Get4xDsReconSurface(CODEC_CURR_TRACKED_BUFFER);
5999 CODECHAL_DEBUG_TOOL(m_debugInterface->DumpSurfaceInfo(dsSurfaceParams.psSurface, "4xDsReconSurface"));
59876000 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_mfxInterface->AddMfxSurfaceCmd(&cmdBuffer, &dsSurfaceParams));
59886001 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_mfxInterface->AddMfxPipeBufAddrCmd(&cmdBuffer, &pipeBufAddrParams));
59896002
20442044 m_brcEnabled,
20452045 m_vdencStreamInEnabled,
20462046 m_vdencNativeROIEnabled,
2047 m_brcAdaptiveRegionBoostEnable,
20472048 m_hevcVdencRoundingEnabled,
20482049 panicEnabled,
20492050 currentPass));
28432844 return eStatus;
28442845 }
28452846
2847 MOS_STATUS CodechalVdencHevcState::SetupRegionBoosting(PMOS_RESOURCE vdencStreamIn, uint16_t boostIndex)
2848 {
2849 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2850
2851 CODECHAL_ENCODE_FUNCTION_ENTER;
2852 CODECHAL_ENCODE_CHK_NULL_RETURN(vdencStreamIn);
2853
2854 MOS_LOCK_PARAMS lockFlags;
2855 MOS_ZeroMemory(&lockFlags, sizeof(MOS_LOCK_PARAMS));
2856 lockFlags.WriteOnly = 1;
2857
2858 uint8_t* data = (uint8_t*)m_osInterface->pfnLockResource(
2859 m_osInterface,
2860 vdencStreamIn,
2861 &lockFlags);
2862 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
2863
2864 uint32_t streamInWidth = (MOS_ALIGN_CEIL(m_frameWidth, 64) / 32);
2865 uint32_t streamInHeight = (MOS_ALIGN_CEIL(m_frameHeight, 64) / 32);
2866 int32_t streamInNumCUs = streamInWidth * streamInHeight;
2867
2868 MOS_ZeroMemory(data, streamInNumCUs * 64);
2869
2870 MHW_VDBOX_VDENC_STREAMIN_STATE_PARAMS streaminDataParams;
2871
2872 MOS_ZeroMemory(&streaminDataParams, sizeof(streaminDataParams));
2873 streaminDataParams.setQpRoiCtrl = true;
2874 uint32_t roiCtrl = 85; // All four 16x16 blocks within the 32x32 blocks share the same region ID 1 (01010101).
2875 for (uint16_t y = 0; y < streamInHeight; y++)
2876 {
2877 if ((y & 7) == boostIndex)
2878 {
2879 for (uint16_t x = 0; x < streamInWidth; x++)
2880 {
2881 streaminDataParams.roiCtrl = 85;
2882 SetStreaminDataPerRegion(streamInWidth, y, y+1, x, x+1, &streaminDataParams, data);
2883 }
2884 }
2885 }
2886
2887 MOS_ZeroMemory(&streaminDataParams, sizeof(streaminDataParams));
2888 streaminDataParams.maxTuSize = 3; //Maximum TU Size allowed, restriction to be set to 3
2889 streaminDataParams.maxCuSize = 2; //For ARB, currently support 32x32 block
2890 switch (m_hevcSeqParams->TargetUsage)
2891 {
2892 case 1:
2893 case 4:
2894 streaminDataParams.numMergeCandidateCu64x64 = 4;
2895 streaminDataParams.numMergeCandidateCu32x32 = 3;
2896 streaminDataParams.numMergeCandidateCu16x16 = 2;
2897 streaminDataParams.numMergeCandidateCu8x8 = 1;
2898 streaminDataParams.numImePredictors = m_imgStateImePredictors;
2899 break;
2900 case 7:
2901 streaminDataParams.numMergeCandidateCu64x64 = 2;
2902 streaminDataParams.numMergeCandidateCu32x32 = 2;
2903 streaminDataParams.numMergeCandidateCu16x16 = 2;
2904 streaminDataParams.numMergeCandidateCu8x8 = 0;
2905 streaminDataParams.numImePredictors = 4;
2906 break;
2907 }
2908
2909 for (auto i = 0; i < streamInNumCUs; i++)
2910 {
2911 SetStreaminDataPerLcu(&streaminDataParams, data + (i * 64));
2912 }
2913
2914 m_osInterface->pfnUnlockResource(
2915 m_osInterface,
2916 vdencStreamIn);
2917
2918 return eStatus;
2919 }
2920
28462921 MOS_STATUS CodechalVdencHevcState::PrepareVDEncStreamInData()
28472922 {
28482923 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
28522927 if (m_vdencStreamInEnabled && m_encodeParams.bMbQpDataEnabled)
28532928 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetupMbQpStreamIn(&m_resVdencStreamInBuffer[m_currRecycledBufIdx]));
28542929
2855 if (m_vdencStreamInEnabled && m_hevcPicParams->NumROI)
2930 if (m_brcAdaptiveRegionBoostSupported && m_hevcPicParams->TargetFrameSize && !m_lookaheadDepth)
2931 {
2932 // Adaptive region boost is enabled for TCBRC only
2933 m_brcAdaptiveRegionBoostEnable = true;
2934 m_vdencStreamInEnabled = true;
2935 }
2936 else
2937 {
2938 m_brcAdaptiveRegionBoostEnable = false;
2939 }
2940
2941 if (!m_brcAdaptiveRegionBoostEnable && m_vdencStreamInEnabled && m_hevcPicParams->NumROI)
28562942 {
28572943 ProcessRoiDeltaQp();
28582944
28672953 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetupROIStreamIn(&(m_resVdencStreamInBuffer[m_currRecycledBufIdx])));
28682954 }
28692955 }
2870 else if (m_vdencStreamInEnabled && (m_hevcPicParams->NumDirtyRects > 0 && (B_TYPE == m_hevcPicParams->CodingType)))
2956 else if (!m_brcAdaptiveRegionBoostEnable && m_vdencStreamInEnabled && (m_hevcPicParams->NumDirtyRects > 0 && (B_TYPE == m_hevcPicParams->CodingType)))
28712957 {
28722958 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetupDirtyRectStreamIn(&(m_resVdencStreamInBuffer[m_currRecycledBufIdx])));
28732959 }
2960
2961 if (m_brcAdaptiveRegionBoostEnable)
2962 {
2963 uint16_t rowOffset[8] = {0, 3, 5, 2, 7, 4, 1, 6};
2964 uint16_t circularFrameIdx = (m_storeData - 1) & 7;
2965 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetupRegionBoosting(&(m_resVdencStreamInBuffer[m_currRecycledBufIdx]), rowOffset[circularFrameIdx]));
2966 }
2967
28742968 return eStatus;
28752969 }
28762970
201201 bool m_pakOnlyPass = false; //!< flag to signal VDEnc+PAK vs. PAK only
202202 bool m_hevcVisualQualityImprovement = false; //!< VQI enable flag
203203 bool m_enableMotionAdaptive = false; //!< Motion adaptive enable flag
204 bool m_brcAdaptiveRegionBoostSupported = false; //!< ARB in BRC mode supported flag.
205 bool m_brcAdaptiveRegionBoostEnable = false; //!< ARB in BRC mode enable flag.
204206
205207 //Resources for VDEnc
206208 MOS_RESOURCE m_sliceCountBuffer; //!< Slice count buffer
787789 //!
788790 //! \param [in] streamIn
789791 //! Pointer to streamin buffer
790 //!
791 //! \return MOS_STATUS
792 //! MOS_STATUS_SUCCESS if success, else fail reason
793 //!
794792 MOS_STATUS SetupForceIntraStreamIn(PMOS_RESOURCE streamIn);
793
794 //! \brief Set VDENC StreamIn Surface for BRC Adaptive Region Boost
795 //!
796 //! \param [in] vdencStreamIn
797 //! StreamIn Surface Resource.
798 //! \param [in] boostIndex
799 //! Region index for boosting.
800 //!
801 //! \return MOS_STATUS
802 //! MOS_STATUS_SUCCESS if success, else fail reason
803 //!
804 virtual MOS_STATUS SetupRegionBoosting(
805 PMOS_RESOURCE vdencStreamIn,
806 uint16_t boostIndex);
795807
796808 // Inherited virtual function
797809 MOS_STATUS Initialize(CodechalSetting * settings) override;
369369 CODECHAL_STATUS_UNAVAILABLE = 3 //!< Indicates that the entry in the status reporting array was not used
370370 } CODECHAL_STATUS, *PCODECHAL_STATUS;
371371
372 typedef enum _CODECHAL_SCALING_MODE
373 {
374 CODECHAL_SCALING_NEAREST = 0,
375 CODECHAL_SCALING_BILINEAR,
376 CODECHAL_SCALING_AVS,
377 CODECHAL_SCALING_ADV_QUALITY // !< Advance Perf mode
378 } CODECHAL_SCALING_MODE;
379
372380 typedef enum _CODECHAL_CHROMA_SITING_TYPE
373381 {
374382 CODECHAL_CHROMA_SITING_NONE = 0x00,
8282 uint32_t m_mirrorState;
8383 bool m_isSourceSurfAllocated;
8484 bool m_isReferenceOnlyPattern;
85
86 CODECHAL_SCALING_MODE m_scalingMode;
8587 };
8688
8789 //!
4141
4242 #define ENCODE_VDENC_AVC_MAX_ROI_NUMBER_G9 3 // Max 4 regions including non-ROI - used from DDI
4343 #define ENCODE_VDENC_AVC_MAX_ROI_NUMBER_ADV 16 // Max 16 regions including non-ROI - used from DDI
44 #define ENCODE_VDENC_AVC_MAX_BRC_ROI_NUMBER_ADV 7 // Max 8 regions including non-ROI - used from DDI
4544 #define ENCODE_VDENC_AVC_MIN_ROI_DELTA_QP_G9 -8 // Min delta QP for VDEnc ROI
4645 #define ENCODE_VDENC_AVC_MAX_ROI_DELTA_QP_G9 7 // Max delta QP for VDEnc ROI
4746
6363
6464 pbCmdBufBase = (uint8_t*)pCmdBuffer->pCmdBase;
6565
66 MOS_TraceEventExt(EVENT_RESOURCE_REGISTER, EVENT_TYPE_INFO2, &pParams->HwCommandType, sizeof(uint32_t), &pParams->dwLocationInCmd, sizeof(uint32_t));
67
6866 MHW_CHK_STATUS(pOsInterface->pfnRegisterResource(
6967 pOsInterface,
7068 pParams->presResource,
8583 *pParams->pdwCmd = (*pParams->pdwCmd & ~dwMask) | (dwGfxAddrBottom & dwMask);
8684 // this is next DW for top part of the address
8785 *(pParams->pdwCmd + 1) = dwGfxAddrTop;
86
87 #if (_DEBUG || _RELEASE_INTERNAL)
88 {
89 uint32_t evtData[4] ={(uint32_t)pParams->HwCommandType, pParams->dwLocationInCmd, pParams->dwOffset, pParams->dwSize};
90 MOS_TraceEventExt(EVENT_RESOURCE_REGISTER, EVENT_TYPE_INFO2, evtData, sizeof(evtData), &ui64GfxAddress, sizeof(ui64GfxAddress));
91 }
92 #endif
8893
8994 if (pParams->dwOffsetInSSH > 0)
9095 {
9696 {
9797 uint32_t Mode;
9898 PCODEC_HEVC_ENCODE_PICTURE_PARAMS pHevcEncPicParams;
99 PCODEC_HEVC_ENCODE_SEQUENCE_PARAMS pHevcEncSeqParams;
99100 PCODEC_HEVC_ENCODE_SLICE_PARAMS pHevcEncSlcParams;
100101 PCODEC_VP9_ENCODE_PIC_PARAMS pVp9EncPicParams = nullptr;
101102 uint8_t *pucVdencMvCosts;
497497 }
498498
499499 //!
500 //! \def MOS_CHK_STATUS_NO_STATUS_RETURN(_compID, _subCompID, _stmt)
501 //! Check MOS_STATUS \a _stmt, return void
502 //!
503 #define MOS_CHK_STATUS_NO_STATUS_RETURN(_compID, _subCompID, _stmt) \
504 { \
505 eStatus = (MOS_STATUS)(_stmt); \
506 if (eStatus != MOS_STATUS_SUCCESS) \
507 { \
508 MOS_ASSERTMESSAGE(_compID, _subCompID, "MOS returned error, eStatus = 0x%x", eStatus);\
509 return; \
510 } \
511 }
512
513 //!
500514 //! \def MOS_CHK_STATUS_SAFE(_stmt)
501515 //! Check MOS_STATUS \a _stmt, return for failure
502516 //!
515529 //!
516530 #define MOS_CHK_NULL(_compID, _subCompID, _ptr) \
517531 { \
518 if ((_ptr) == nullptr) \
519 { \
520 MOS_ASSERTMESSAGE(_compID, _subCompID, "Invalid (nullptr) Pointer."); \
532 if ((_ptr) == nullptr) \
533 { \
534 MOS_ASSERTMESSAGE(_compID, _subCompID, "Invalid (nullptr) Pointer."); \
521535 eStatus = MOS_STATUS_NULL_POINTER; \
522536 goto finish; \
523537 } \
529543 //!
530544 #define MOS_CHK_NULL_NO_STATUS(_compID, _subCompID, _ptr) \
531545 { \
532 if ((_ptr) == nullptr) \
533 { \
534 MOS_ASSERTMESSAGE(_compID, _subCompID, "Invalid (nullptr) Pointer."); \
546 if ((_ptr) == nullptr) \
547 { \
548 MOS_ASSERTMESSAGE(_compID, _subCompID, "Invalid (nullptr) Pointer."); \
535549 goto finish; \
536550 } \
537551 }
542556 //!
543557 #define MOS_CHK_NULL_NO_STATUS_RETURN(_compID, _subCompID, _ptr) \
544558 { \
545 if ((_ptr) == nullptr) \
546 { \
547 MOS_ASSERTMESSAGE(_compID, _subCompID, "Invalid (nullptr) Pointer."); \
559 if ((_ptr) == nullptr) \
560 { \
561 MOS_ASSERTMESSAGE(_compID, _subCompID, "Invalid (nullptr) Pointer."); \
548562 return; \
549563 } \
550564 }
590604 }
591605
592606 //!
607 //! \def MOS_CHK_COND_WITH_DESTROY_RETURN_VALUE(_compID, _subCompID, _condition, destroyFunction, retVal, _message)
608 //! Check if \a _condition is true, if so assert, call destroy function and return \a retVal
609 //!
610 #define MOS_CHK_COND_WITH_DESTROY_RETURN_VALUE(_compID, _subCompID, _condition, destroyFunction, retVal, _message, ...) \
611 { \
612 if (_condition) \
613 { \
614 destroyFunction(); \
615 MOS_ASSERTMESSAGE(_compID, _subCompID, _message, ##__VA_ARGS__); \
616 return retVal; \
617 } \
618 }
619
620 //!
593621 //! The following HR macros are temporary until MOS switches to MOS_STATUS. When that happens,
594622 //! and therefore these macros will be moved to an OS specific file.
595623 //!
601629 #define MOS_CHK_HR(_compID, _subCompID, _stmt) \
602630 { \
603631 hr = (_stmt); \
604 if (hr != MOS_STATUS_SUCCESS) \
632 if (hr != MOS_STATUS_SUCCESS) \
605633 { \
606634 MOS_ASSERTMESSAGE(_compID, _subCompID, "hr check failed."); \
607635 goto finish; \
609637 }
610638
611639 //!
640 //! \def MOS_CHK_HR_RETURN(_compID, _subCompID, _stmt)
641 //! Check _stmt, assert and return an error for failure
642 //!
643 #define MOS_CHK_HR_RETURN(_compID, _subCompID, _stmt) \
644 { \
645 hr = (_stmt); \
646 if (hr != MOS_STATUS_SUCCESS) \
647 { \
648 MOS_ASSERTMESSAGE(_compID, _subCompID, "MOS returned error, hr = 0x%x", hr); \
649 return hr; \
650 } \
651 }
652
653 //!
612654 //! \def MOS_CHK_STATUS_MESSAGE(_compID, _subCompID, _stmt, _message, ...)
613655 //! Check MOS_STATUS \a _stmt, assert and return an error for failure, and print message
614656 //!
615657 #define MOS_CHK_HR_MESSAGE(_compID, _subCompID, _stmt, _message, ...) \
616658 { \
617659 hr = (_stmt); \
618 if (hr != MOS_STATUS_SUCCESS) \
660 if (hr != MOS_STATUS_SUCCESS) \
619661 { \
620662 MOS_ASSERTMESSAGE(_compID, _subCompID, _message, ##__VA_ARGS__); \
621663 goto finish; \
00 /*
1 * Copyright (c) 2009-2020, Intel Corporation
1 * Copyright (c) 2009-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
32423242 MOS_USER_FEATURE_VALUE_TYPE_STRING,
32433243 "",
32443244 "Vphal Debug Dump Output Directory"),
3245 MOS_DECLARE_UF_KEY_DBGONLY(__VPHAL_VEBOX_FORCE_VP_MEMCOPY_OUTPUTCOMPRESSED_ID,
3245 MOS_DECLARE_UF_KEY(__VPHAL_DBG_PARA_DUMP_ENABLE_SKUWA_DUMP_ID,
3246 "enableSkuWaDump",
3247 __MEDIA_USER_FEATURE_SUBKEY_INTERNAL,
3248 __MEDIA_USER_FEATURE_SUBKEY_REPORT,
3249 "VP",
3250 MOS_USER_FEATURE_TYPE_USER,
3251 MOS_USER_FEATURE_VALUE_TYPE_UINT32,
3252 "0",
3253 "VP parameter dump sku and wa info enable"),
3254 MOS_DECLARE_UF_KEY_DBGONLY(__VPHAL_VEBOX_FORCE_VP_MEMCOPY_OUTPUTCOMPRESSED_ID,
32463255 "Force VP Memorycopy Outputcompressed",
32473256 __MEDIA_USER_FEATURE_SUBKEY_INTERNAL,
32483257 __MEDIA_USER_FEATURE_SUBKEY_REPORT,
32513260 MOS_USER_FEATURE_VALUE_TYPE_BOOL,
32523261 "0",
32533262 "Force VP Memorycopy Outputcompressed"),
3263 #endif
3264 #if (_DEBUG || _RELEASE_INTERNAL)
3265 MOS_DECLARE_UF_KEY(__VPHAL_ENABLE_SFC_NV12_P010_LINEAR_OUTPUT_ID,
3266 "Enable SFC NV12 P010 Linear Output",
3267 __MEDIA_USER_FEATURE_SUBKEY_INTERNAL,
3268 __MEDIA_USER_FEATURE_SUBKEY_REPORT,
3269 "VP",
3270 MOS_USER_FEATURE_TYPE_USER,
3271 MOS_USER_FEATURE_VALUE_TYPE_BOOL,
3272 "0",
3273 "Set SFC NV12/P010 Linear Output"),
32543274 #endif
32553275 MOS_DECLARE_UF_KEY_DBGONLY(__VPHAL_SET_SINGLE_SLICE_VEBOX_ID,
32563276 "SetSingleSliceVeboxEnable",
40714091 MOS_USER_FEATURE_VALUE_TYPE_INT32,
40724092 "0",
40734093 "Eanble Apogeios avc decode path. 1: enable, 0: disable."),
4094 MOS_DECLARE_UF_KEY_DBGONLY(__MEDIA_USER_FEATURE_VALUE_APOGEIOS_VP9D_ENABLE_ID,
4095 "ApogeiosVp9dEnable",
4096 __MEDIA_USER_FEATURE_SUBKEY_INTERNAL,
4097 __MEDIA_USER_FEATURE_SUBKEY_REPORT,
4098 "Codec",
4099 MOS_USER_FEATURE_TYPE_USER,
4100 MOS_USER_FEATURE_VALUE_TYPE_INT32,
4101 "0",
4102 "Eanble Apogeios VP9 decode path. 1: enable, 0: disable."),
40744103 MOS_DECLARE_UF_KEY_DBGONLY(__MEDIA_USER_FEATURE_VALUE_RESOURCE_ADDR_DUMP_ENABLE_ID,
40754104 "Resource Addr Dump Enable",
40764105 __MEDIA_USER_FEATURE_SUBKEY_INTERNAL,
00 /*
1 * Copyright (c) 2020, Intel Corporation
1 * Copyright (c) 2020-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
448448 __VPHAL_DBG_PARAM_DUMP_START_FRAME_KEY_NAME_ID,
449449 __VPHAL_DBG_PARAM_DUMP_END_FRAME_KEY_NAME_ID,
450450 __VPHAL_DBG_DUMP_OUTPUT_DIRECTORY_ID,
451 __VPHAL_DBG_PARA_DUMP_ENABLE_SKUWA_DUMP_ID,
451452 #endif
452453 __VPHAL_SET_SINGLE_SLICE_VEBOX_ID,
453454 __VPHAL_BYPASS_COMPOSITION_ID,
471472 __VPHAL_RNDR_FORCE_VP_DECOMPRESSED_OUTPUT_ID,
472473 __VPHAL_ENABLE_1K_1DLUT_ID,
473474 __VPHAL_VEBOX_FORCE_VP_MEMCOPY_OUTPUTCOMPRESSED_ID,
475 #endif
476 #if (_DEBUG || _RELEASE_INTERNAL)
477 __VPHAL_ENABLE_SFC_NV12_P010_LINEAR_OUTPUT_ID,
474478 #endif
475479 #if ((_DEBUG || _RELEASE_INTERNAL) && !EMUL)
476480 __VPHAL_RNDR_VEBOX_MODE_0_ID,
550554 __MEDIA_USER_FEATURE_VALUE_APO_MOS_PATH_ENABLE_ID,
551555 __MEDIA_USER_FEATURE_VALUE_APOGEIOS_HEVCD_ENABLE_ID,
552556 __MEDIA_USER_FEATURE_VALUE_APOGEIOS_AVCD_ENABLE_ID,
557 __MEDIA_USER_FEATURE_VALUE_APOGEIOS_VP9D_ENABLE_ID,
553558 __MEDIA_USER_FEATURE_VALUE_RESOURCE_ADDR_DUMP_ENABLE_ID,
554559 __MEDIA_USER_FEATURE_VALUE_RA_MODE_ENABLE_ID,
555560 __MEDIA_USER_FEATURE_VALUE_LOCAL_MEMORY_LEVEL_SWITCH_ID,
446446 ofs << "#" << MediaDbgAttr::attrHuCDmem << ":0" << std::endl;
447447 ofs << "#" << MediaDbgAttr::attrCmdBufferMfx << ":0" << std::endl;
448448 ofs << "#" << MediaDbgAttr::attr2ndLvlBatchMfx << ":0" << std::endl;
449 ofs << "#" << MediaDbgAttr::attrSurfaceInfo << ":0" << std::endl;
449450 ofs << "#" << MediaDbgAttr::attrHuffmanTbl << ":0" << std::endl;
450451 ofs << "#" << MediaDbgAttr::attrScanParams << ":0" << std::endl;
451452 ofs << "#" << MediaDbgAttr::attrDriverUltDump << ":0" << std::endl;
463464 ofs << "##" << MediaDbgAttr::attrForceYUVDumpWithMemcpy << ":0" << std::endl;
464465 ofs << "##" << MediaDbgAttr::attrDisableSwizzleForDumps << ":0" << std::endl;
465466 ofs << "##" << MediaDbgAttr::attrSfcOutputSurface << ":0" << std::endl;
467 ofs << "##" << MediaDbgAttr::attrSfcBuffers << ":0" << std::endl;
466468 ofs << "##" << MediaDbgAttr::attrReferenceSurfaces << ":0" << std::endl;
467469 ofs << "##" << MediaDbgAttr::attrEncodeRawInputSurface << ":0" << std::endl;
468470 ofs << "##" << MediaDbgAttr::attrReconstructedSurface << ":0" << std::endl;
921921 return MOS_STATUS_SUCCESS;
922922 }
923923
924 #define FIELD_TO_OFS(name, shift) ofs << shift #name << ": " << (int64_t)ptr->name << std::endl;
925 #define EMPTY_TO_OFS()
926 #define UNION_STRUCT_START_TO_OFS() ofs << "union" << std::endl \
927 << "{" << std::endl \
928 << " struct" << std::endl \
929 << " {" << std::endl;
930
931 #define UNION_STRUCT_FIELD_TO_OFS(name) ofs << " "#name << ": " << ptr->name << std::endl;
932 #define UNION_END_TO_OFS(name) ofs << " }" << std::endl \
933 << " "#name << ": " << ptr->name << std::endl \
934 << "}" << std::endl;
935 #define OFFSET_FIELD_TO_OFS(class_name, f_name, shift) << shift " "#f_name": " << ptr->class_name.f_name << std::endl
936 #define PLANE_OFFSET_TO_OFS(name) ofs << "MOS_PLANE_OFFSET "#name << std::endl \
937 OFFSET_FIELD_TO_OFS(name, iSurfaceOffset,) \
938 OFFSET_FIELD_TO_OFS(name, iXOffset,) \
939 OFFSET_FIELD_TO_OFS(name, iYOffset,) \
940 OFFSET_FIELD_TO_OFS(name, iLockSurfaceOffset,);
941 #define RESOURCE_OFFSET_TO_OFS(name, shift) ofs << shift "MOS_RESOURCE_OFFSETS "#name << std::endl \
942 OFFSET_FIELD_TO_OFS(name, BaseOffset, shift) \
943 OFFSET_FIELD_TO_OFS(name, XOffset, shift) \
944 OFFSET_FIELD_TO_OFS(name, YOffset, shift);
945 MOS_STATUS MediaDebugInterface::DumpSurfaceInfo(
946 PMOS_SURFACE surface,
947 const char* surfaceName)
948 {
949 MEDIA_DEBUG_FUNCTION_ENTER;
950
951 MEDIA_DEBUG_CHK_NULL(surface);
952 MEDIA_DEBUG_CHK_NULL(surfaceName);
953
954 if (!m_configMgr->AttrIsEnabled(MediaDbgAttr::attrSurfaceInfo))
955 {
956 return MOS_STATUS_SUCCESS;
957 }
958
959 const char* funcName = (m_mediafunction == MEDIA_FUNCTION_VP) ? "_VP" : ((m_mediafunction == MEDIA_FUNCTION_ENCODE) ? "_ENC" : "_DEC");
960 const char* filePath = CreateFileName(funcName, surfaceName, MediaDbgExtType::txt);
961 std::ofstream ofs(filePath);
962 PMOS_SURFACE ptr = surface;
963
964 if (ofs.fail())
965 {
966 return MOS_STATUS_UNKNOWN;
967 }
968
969 ofs << "Surface name: " << surfaceName << std::endl;
970
971 EMPTY_TO_OFS();
972 ofs << "MOS_SURFACE:" << std::endl;
973 FIELD_TO_OFS(dwArraySlice, );
974 FIELD_TO_OFS(dwMipSlice, );
975 FIELD_TO_OFS(S3dChannel, );
976
977 EMPTY_TO_OFS();
978 FIELD_TO_OFS(Type, );
979 FIELD_TO_OFS(bOverlay, );
980 FIELD_TO_OFS(bFlipChain, );
981
982 #if !defined(LINUX)
983 EMPTY_TO_OFS();
984 UNION_STRUCT_START_TO_OFS();
985 UNION_STRUCT_FIELD_TO_OFS(dwFirstArraySlice);
986 UNION_STRUCT_FIELD_TO_OFS(dwFirstMipSlice);
987 UNION_END_TO_OFS(dwSubResourceIndex);
988 #endif
989
990 EMPTY_TO_OFS();
991 FIELD_TO_OFS(dwWidth, );
992 FIELD_TO_OFS(dwHeight, );
993 FIELD_TO_OFS(dwSize, );
994 FIELD_TO_OFS(dwDepth, );
995 FIELD_TO_OFS(dwArraySize, );
996 FIELD_TO_OFS(dwLockPitch, );
997 FIELD_TO_OFS(dwPitch, );
998 FIELD_TO_OFS(dwSlicePitch, );
999 FIELD_TO_OFS(dwQPitch, );
1000 FIELD_TO_OFS(TileType, );
1001 FIELD_TO_OFS(TileModeGMM, );
1002 FIELD_TO_OFS(bGMMTileEnabled, );
1003 FIELD_TO_OFS(Format, );
1004 FIELD_TO_OFS(bArraySpacing, );
1005 FIELD_TO_OFS(bCompressible, );
1006
1007 EMPTY_TO_OFS();
1008 FIELD_TO_OFS(dwOffset, );
1009 PLANE_OFFSET_TO_OFS(YPlaneOffset);
1010 PLANE_OFFSET_TO_OFS(UPlaneOffset);
1011 PLANE_OFFSET_TO_OFS(VPlaneOffset);
1012
1013 EMPTY_TO_OFS();
1014 UNION_STRUCT_START_TO_OFS();
1015 RESOURCE_OFFSET_TO_OFS(RenderOffset.YUV.Y, " ");
1016 RESOURCE_OFFSET_TO_OFS(RenderOffset.YUV.U, " ");
1017 RESOURCE_OFFSET_TO_OFS(RenderOffset.YUV.V, " ");
1018 ofs << " } YUV;" << std::endl;
1019 RESOURCE_OFFSET_TO_OFS(RenderOffset.RGB, );
1020 ofs << "}" << std::endl;
1021
1022 EMPTY_TO_OFS();
1023 UNION_STRUCT_START_TO_OFS();
1024 UNION_STRUCT_FIELD_TO_OFS(LockOffset.YUV.Y);
1025 UNION_STRUCT_FIELD_TO_OFS(LockOffset.YUV.U);
1026 UNION_STRUCT_FIELD_TO_OFS(LockOffset.YUV.V);
1027 UNION_END_TO_OFS(LockOffset.RGB);
1028
1029 EMPTY_TO_OFS();
1030 FIELD_TO_OFS(bIsCompressed, );
1031 FIELD_TO_OFS(CompressionMode, );
1032 FIELD_TO_OFS(CompressionFormat, );
1033 FIELD_TO_OFS(YoffsetForUplane, );
1034 FIELD_TO_OFS(YoffsetForVplane, );
1035
1036 EMPTY_TO_OFS();
1037 EMPTY_TO_OFS();
1038 MOS_STATUS sts = DumpMosSpecificResourceInfoToOfs(&surface->OsResource, ofs);
1039 ofs.close();
1040
1041 return sts;
1042 }
1043
1044 #define FIELD_TO_OFS_8SHIFT(name) FIELD_TO_OFS(name, " ")
1045 MOS_STATUS MediaDebugInterface::DumpMosSpecificResourceInfoToOfs(
1046 PMOS_RESOURCE pOsResource,
1047 std::ofstream& ofs)
1048 {
1049 MEDIA_DEBUG_FUNCTION_ENTER;
1050 if (Mos_ResourceIsNull(pOsResource))
1051 {
1052 MEDIA_DEBUG_ASSERTMESSAGE("pOsResource is null");
1053 return MOS_STATUS_INVALID_PARAMETER;
1054 }
1055
1056 PMOS_RESOURCE ptr = pOsResource;
1057 ofs << "MOS_RESOURCE:" << std::endl;
1058 #if !defined(LINUX)
1059 FIELD_TO_OFS(RunTimeHandle, );
1060 #else
1061 FIELD_TO_OFS(iWidth, );
1062 FIELD_TO_OFS(iHeight, );
1063 FIELD_TO_OFS(iSize, );
1064 FIELD_TO_OFS(iPitch, );
1065 FIELD_TO_OFS(iDepth, );
1066 FIELD_TO_OFS(Format, );
1067 FIELD_TO_OFS(iCount, );
1068 FIELD_TO_OFS(dwGfxAddress, );
1069 FIELD_TO_OFS(isTiled, );
1070 FIELD_TO_OFS(TileType, );
1071 FIELD_TO_OFS(bMapped, );
1072
1073 EMPTY_TO_OFS();
1074 FIELD_TO_OFS(bo->size, );
1075 FIELD_TO_OFS(bo->align, );
1076 FIELD_TO_OFS(bo->offset, );
1077 FIELD_TO_OFS(bo->handle, );
1078 FIELD_TO_OFS(bo->offset64, );
1079 FIELD_TO_OFS(bo->aux_mapped, );
1080 #endif
1081 ofs << "iAllocationIndex[MOS_GPU_CONTEXT_MAX == " << (uint32_t)MOS_GPU_CONTEXT_MAX << "]: {";
1082 for (int i = 0; i < MOS_GPU_CONTEXT_MAX; ++i)
1083 ofs << ptr->iAllocationIndex[i] << ", ";
1084 ofs << "}" << std::endl;
1085
1086 {
1087 PGMM_RESOURCE_INFO ptr = pOsResource->pGmmResInfo;
1088 EMPTY_TO_OFS();
1089 ofs << "GMM_RESOURCE_INFO:" << std::endl;
1090 FIELD_TO_OFS(GetResourceType(), );
1091 FIELD_TO_OFS(GetResourceFormat(), );
1092 FIELD_TO_OFS(GetBitsPerPixel(), );
1093
1094 {
1095 GMM_RESOURCE_FLAG flags = pOsResource->pGmmResInfo->GetResFlags();
1096 GMM_RESOURCE_FLAG* ptr = &flags;
1097
1098 EMPTY_TO_OFS();
1099 ofs << " GMM_RESOURCE_FLAG:" << std::endl;
1100 FIELD_TO_OFS_8SHIFT(Gpu.CameraCapture);
1101 FIELD_TO_OFS_8SHIFT(Gpu.CCS);
1102 FIELD_TO_OFS_8SHIFT(Gpu.ColorDiscard);
1103 FIELD_TO_OFS_8SHIFT(Gpu.ColorSeparation);
1104 FIELD_TO_OFS_8SHIFT(Gpu.ColorSeparationRGBX);
1105 FIELD_TO_OFS_8SHIFT(Gpu.Constant);
1106 FIELD_TO_OFS_8SHIFT(Gpu.Depth);
1107 FIELD_TO_OFS_8SHIFT(Gpu.FlipChain);
1108 FIELD_TO_OFS_8SHIFT(Gpu.FlipChainPreferred);
1109 FIELD_TO_OFS_8SHIFT(Gpu.HistoryBuffer);
1110 FIELD_TO_OFS_8SHIFT(Gpu.HiZ);
1111 FIELD_TO_OFS_8SHIFT(Gpu.Index);
1112 FIELD_TO_OFS_8SHIFT(Gpu.IndirectClearColor);
1113 FIELD_TO_OFS_8SHIFT(Gpu.InstructionFlat);
1114 FIELD_TO_OFS_8SHIFT(Gpu.InterlacedScan);
1115 FIELD_TO_OFS_8SHIFT(Gpu.MCS);
1116 FIELD_TO_OFS_8SHIFT(Gpu.MMC);
1117 FIELD_TO_OFS_8SHIFT(Gpu.MotionComp);
1118 FIELD_TO_OFS_8SHIFT(Gpu.NoRestriction);
1119 FIELD_TO_OFS_8SHIFT(Gpu.Overlay);
1120 FIELD_TO_OFS_8SHIFT(Gpu.Presentable);
1121 FIELD_TO_OFS_8SHIFT(Gpu.ProceduralTexture);
1122 FIELD_TO_OFS_8SHIFT(Gpu.Query);
1123 FIELD_TO_OFS_8SHIFT(Gpu.RenderTarget);
1124 FIELD_TO_OFS_8SHIFT(Gpu.S3d);
1125 FIELD_TO_OFS_8SHIFT(Gpu.S3dDx);
1126 FIELD_TO_OFS_8SHIFT(Gpu.__S3dNonPacked);
1127 FIELD_TO_OFS_8SHIFT(Gpu.ScratchFlat);
1128 FIELD_TO_OFS_8SHIFT(Gpu.SeparateStencil);
1129 FIELD_TO_OFS_8SHIFT(Gpu.State);
1130 FIELD_TO_OFS_8SHIFT(Gpu.Stream);
1131 FIELD_TO_OFS_8SHIFT(Gpu.TextApi);
1132 FIELD_TO_OFS_8SHIFT(Gpu.Texture);
1133 FIELD_TO_OFS_8SHIFT(Gpu.TiledResource);
1134 FIELD_TO_OFS_8SHIFT(Gpu.TilePool);
1135 FIELD_TO_OFS_8SHIFT(Gpu.UnifiedAuxSurface);
1136 FIELD_TO_OFS_8SHIFT(Gpu.Vertex);
1137 FIELD_TO_OFS_8SHIFT(Gpu.Video);
1138 FIELD_TO_OFS_8SHIFT(Gpu.__NonMsaaTileXCcs);
1139 FIELD_TO_OFS_8SHIFT(Gpu.__NonMsaaTileYCcs);
1140 FIELD_TO_OFS_8SHIFT(Gpu.__MsaaTileMcs);
1141 FIELD_TO_OFS_8SHIFT(Gpu.__NonMsaaLinearCCS);
1142 FIELD_TO_OFS_8SHIFT(Gpu.__Remaining);
1143
1144 EMPTY_TO_OFS();
1145 FIELD_TO_OFS_8SHIFT(Info.AllowVirtualPadding);
1146 FIELD_TO_OFS_8SHIFT(Info.BigPage);
1147 FIELD_TO_OFS_8SHIFT(Info.Cacheable);
1148 FIELD_TO_OFS_8SHIFT(Info.ContigPhysMemoryForiDART);
1149 FIELD_TO_OFS_8SHIFT(Info.CornerTexelMode);
1150 FIELD_TO_OFS_8SHIFT(Info.ExistingSysMem);
1151 FIELD_TO_OFS_8SHIFT(Info.ForceResidency);
1152 FIELD_TO_OFS_8SHIFT(Info.Gfdt);
1153 FIELD_TO_OFS_8SHIFT(Info.GttMapType);
1154 FIELD_TO_OFS_8SHIFT(Info.HardwareProtected);
1155 FIELD_TO_OFS_8SHIFT(Info.KernelModeMapped);
1156 FIELD_TO_OFS_8SHIFT(Info.LayoutBelow);
1157 FIELD_TO_OFS_8SHIFT(Info.LayoutMono);
1158 FIELD_TO_OFS_8SHIFT(Info.LayoutRight);
1159 FIELD_TO_OFS_8SHIFT(Info.LocalOnly);
1160 FIELD_TO_OFS_8SHIFT(Info.Linear);
1161 FIELD_TO_OFS_8SHIFT(Info.MediaCompressed);
1162 FIELD_TO_OFS_8SHIFT(Info.NoOptimizationPadding);
1163 FIELD_TO_OFS_8SHIFT(Info.NoPhysMemory);
1164 FIELD_TO_OFS_8SHIFT(Info.NotLockable);
1165 FIELD_TO_OFS_8SHIFT(Info.NonLocalOnly);
1166 FIELD_TO_OFS_8SHIFT(Info.StdSwizzle);
1167 FIELD_TO_OFS_8SHIFT(Info.PseudoStdSwizzle);
1168 FIELD_TO_OFS_8SHIFT(Info.Undefined64KBSwizzle);
1169 FIELD_TO_OFS_8SHIFT(Info.RedecribedPlanes);
1170 FIELD_TO_OFS_8SHIFT(Info.RenderCompressed);
1171 FIELD_TO_OFS_8SHIFT(Info.Rotated);
1172 FIELD_TO_OFS_8SHIFT(Info.Shared);
1173 FIELD_TO_OFS_8SHIFT(Info.SoftwareProtected);
1174 FIELD_TO_OFS_8SHIFT(Info.SVM);
1175 #if !defined(LINUX)
1176 FIELD_TO_OFS_8SHIFT(Info.Tile4);
1177 FIELD_TO_OFS_8SHIFT(Info.Tile64);
1178 #endif
1179 FIELD_TO_OFS_8SHIFT(Info.TiledW);
1180 FIELD_TO_OFS_8SHIFT(Info.TiledX);
1181 FIELD_TO_OFS_8SHIFT(Info.TiledY);
1182 FIELD_TO_OFS_8SHIFT(Info.TiledYf);
1183 FIELD_TO_OFS_8SHIFT(Info.TiledYs);
1184 FIELD_TO_OFS_8SHIFT(Info.XAdapter);
1185 FIELD_TO_OFS_8SHIFT(Info.__PreallocatedResInfo);
1186 #if !defined(LINUX)
1187 FIELD_TO_OFS_8SHIFT(Info.LMemBarPreferred);
1188 FIELD_TO_OFS_8SHIFT(Info.LMemBarOrNonlocalOnly);
1189 FIELD_TO_OFS_8SHIFT(Info.LMemBarIndifferent);
1190 FIELD_TO_OFS_8SHIFT(Info.CpuVisibleOnDemand);
1191 FIELD_TO_OFS_8SHIFT(Info.DwmFbrResource);
1192 #endif
1193
1194 EMPTY_TO_OFS();
1195 FIELD_TO_OFS_8SHIFT(Wa.GTMfx2ndLevelBatchRingSizeAlign);
1196 FIELD_TO_OFS_8SHIFT(Wa.ILKNeedAvcMprRowStore32KAlign);
1197 FIELD_TO_OFS_8SHIFT(Wa.ILKNeedAvcDmvBuffer32KAlign);
1198 FIELD_TO_OFS_8SHIFT(Wa.NoBufferSamplerPadding);
1199 FIELD_TO_OFS_8SHIFT(Wa.NoLegacyPlanarLinearVideoRestrictions);
1200 FIELD_TO_OFS_8SHIFT(Wa.CHVAstcSkipVirtualMips);
1201 FIELD_TO_OFS_8SHIFT(Wa.DisablePackedMipTail);
1202 FIELD_TO_OFS_8SHIFT(Wa.__ForceOtherHVALIGN4);
1203 FIELD_TO_OFS_8SHIFT(Wa.DisableDisplayCcsClearColor);
1204 FIELD_TO_OFS_8SHIFT(Wa.DisableDisplayCcsCompression);
1205 FIELD_TO_OFS_8SHIFT(Wa.PreGen12FastClearOnly);
1206 #if !defined(LINUX)
1207 FIELD_TO_OFS_8SHIFT(Wa.ForceStdAllocAlign);
1208 #endif
1209 }
1210
1211 FIELD_TO_OFS(GetBaseWidth(), );
1212 FIELD_TO_OFS(GetBaseHeight(), );
1213 FIELD_TO_OFS(GetBaseDepth(), );
1214 FIELD_TO_OFS(GetMaxLod(), );
1215 FIELD_TO_OFS(GetArraySize(), );
1216 FIELD_TO_OFS(GetSetCpSurfTag(0, 0), );
1217 FIELD_TO_OFS(GetCachePolicyUsage(), );
1218 FIELD_TO_OFS(GetNumSamples(), );
1219 FIELD_TO_OFS(GetSamplePattern(), );
1220
1221 EMPTY_TO_OFS();
1222 FIELD_TO_OFS(IsArraySpacingSingleLod(), );
1223 FIELD_TO_OFS(GetBaseAlignment(), );
1224 FIELD_TO_OFS(GetHAlign(), );
1225 FIELD_TO_OFS(GetVAlign(), );
1226 FIELD_TO_OFS(GetMipTailStartLodSurfaceState(), );
1227 FIELD_TO_OFS(GetQPitch(), );
1228
1229 EMPTY_TO_OFS();
1230 ofs << "MmcMode[GMM_MAX_MMC_INDEX == " << GMM_MAX_MMC_INDEX << "]: {";
1231 for (uint32_t i = 0; i < GMM_MAX_MMC_INDEX; ++i)
1232 ofs << (uint32_t)ptr->GetMmcMode(i) << ", ";
1233 ofs << "}" << std::endl;
1234
1235 ofs << "MmcHint[GMM_MAX_MMC_INDEX == " << GMM_MAX_MMC_INDEX << "]: {";
1236 for (uint32_t i = 0; i < GMM_MAX_MMC_INDEX; ++i)
1237 ofs << (uint32_t)ptr->GetMmcHint(i) << ", ";
1238 ofs << "}" << std::endl;
1239
1240 FIELD_TO_OFS(GetRenderPitch(), );
1241 FIELD_TO_OFS(GetSizeMainSurface(), );
1242 FIELD_TO_OFS(GmmGetTileMode(), );
1243
1244 #if !defined(LINUX)
1245 EMPTY_TO_OFS();
1246 FIELD_TO_OFS(GetMultiTileArch().Enable, );
1247 #endif
1248 }
1249
1250 return MOS_STATUS_SUCCESS;
1251 }
1252 #undef FIELD_TO_OFS_8SHIFT
1253 #undef RESOURCE_OFFSET_TO_OFS
1254 #undef PLANE_OFFSET_TO_OFS
1255 #undef OFFSET_FIELD_TO_OFS
1256 #undef UNION_END_TO_OFS
1257 #undef UNION_STRUCT_FIELD_TO_OFS
1258 #undef UNION_STRUCT_START_TO_OFS
1259 #undef EMPTY_TO_OFS
1260 #undef FIELD_TO_OFS
1261
9241262 MOS_STATUS MediaDebugInterface::DumpBltOutput(
9251263 PMOS_SURFACE surface,
9261264 const char * attrName)
109109 const char *attrName,
110110 const char *bufferName);
111111
112 MOS_STATUS DumpSurfaceInfo(
113 PMOS_SURFACE surface,
114 const char* surfaceName);
115
116 MOS_STATUS DumpMosSpecificResourceInfoToOfs(
117 PMOS_RESOURCE pOsResource,
118 std::ofstream &ofs);
119
112120 MOS_STATUS DumpBufferInHexDwords(
113121 uint8_t *data,
114122 uint32_t size);
6666 static const char *attrHuCDmem = "HucDmem";
6767 static const char *attrCmdBufferMfx = "CmdBufferMfx";
6868 static const char *attr2ndLvlBatchMfx = "2ndLvlBatchMfx";
69 static const char *attrSurfaceInfo = "SurfaceInfo";
6970 static const char *attrDecodeOutputSurface = "DecodeOutputSurface";
7071 static const char *attrDecodeAuxSurface = "DumpAuxsurface";
7172 static const char *attrDecodeBltOutput = "DumpBltOutput";
00 /*
1 * Copyright (c) 2009-2018, Intel Corporation
1 * Copyright (c) 2009-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
142142 VPHAL_RENDER_CHK_STATUS(CreateRenderer());
143143
144144 // Allocate and initialize renderer states
145 VPHAL_PUBLIC_CHK_STATUS(m_renderer->Initialize(pVpHalSettings));
145 VPHAL_PUBLIC_CHK_STATUS(m_renderer->Initialize(pVpHalSettings, IsApoEnabled()));
146146
147147 finish:
148148 return eStatus;
00 /*
1 * Copyright (c) 2009-2020, Intel Corporation
1 * Copyright (c) 2009-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
595595 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
596596 //!
597597 virtual MOS_STATUS CreateRenderer() = 0;
598
599 virtual bool IsApoEnabled()
600 {
601 return false;
602 }
598603 };
599604
600605 #endif // __VPHAL_H__
00 /*
1 * Copyright (c) 2011-2019, Intel Corporation
1 * Copyright (c) 2011-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
31073107 pDumpSpec->outFileLocation[0] = '\0';
31083108 cStringData[0] = '\0';
31093109 bDumpEnabled = false;
3110
31113110 // Get start frame
31123111 // if start frame is not got assign a default value of 0
31133112 MOS_ZeroMemory(&UserFeatureData, sizeof(UserFeatureData));
31323131 MOS_ZeroMemory(&UserFeatureData, sizeof(UserFeatureData));
31333132 UserFeatureData.StringData.pStringData = cStringData;
31343133 UserFeatureData.StringData.uMaxSize = MOS_USER_CONTROL_MAX_DATA_SIZE;
3135 UserFeatureData.StringData.uSize = 0; //set the default value. 0 is empty buffer.
3134 UserFeatureData.StringData.uSize = 0; //set the default value. 0 is empty buffer.
31363135
31373136 MOS_USER_FEATURE_INVALID_KEY_ASSERT(MOS_UserFeature_ReadValue_ID(
31383137 nullptr,
31823181 }
31833182 #endif
31843183
3185 if ((eStatus != MOS_STATUS_SUCCESS) || (!bDumpEnabled))
3184 // Get enableSkuWaDump
3185 MOS_ZeroMemory(&UserFeatureData, sizeof(UserFeatureData));
3186 MOS_USER_FEATURE_INVALID_KEY_ASSERT(MOS_UserFeature_ReadValue_ID(
3187 nullptr,
3188 __VPHAL_DBG_PARA_DUMP_ENABLE_SKUWA_DUMP_ID,
3189 &UserFeatureData,
3190 m_osInterface->pOsContext));
3191 pDumpSpec->enableSkuWaDump = UserFeatureData.u32Data;
3192
3193 if ((eStatus != MOS_STATUS_SUCCESS) || (!bDumpEnabled))
31863194 {
31873195 pDumpSpec->uiStartFrame = 1;
31883196 pDumpSpec->uiEndFrame = 0;
44534461
44544462 return nullptr;
44554463 }
4464
4465 char *VphalParameterDumper::GetDumpSpecLocation()
4466 {
4467 return m_dumpSpec.outFileLocation;
4468 }
4469 bool VphalParameterDumper::GetDumpSpecSkuWaDumpEnable()
4470 {
4471 return m_dumpSpec.enableSkuWaDump;
4472 }
44564473 #endif // (_DEBUG || _RELEASE_INTERNAL)
00 /*
1 * Copyright (c) 2011-2018, Intel Corporation
1 * Copyright (c) 2011-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
154154 m_surfaceDumper->m_dumpSpec.pcOutputPath, \
155155 pRenderParams);
156156
157 //------------------------------------------------------------------------------
158 // Dump macro for dumper. Dump Sku and workaround information.
159 //------------------------------------------------------------------------------
160 #define SkuWaTable_DUMPPER_DUMP_XML(skuTable, waTable) \
161 m_parameterDumper->SkuWa_DumpToXML( \
162 skuTable, \
163 waTable);
164
157165 //!
158166 //! Structure VPHAL_DBG_SURF_DUMP_SURFACE_DEF
159167 //! \brief Plane definition
401409 char outFileLocation[MAX_PATH]; // Location where dump files need to be stored
402410 uint32_t uiStartFrame; // Start frame for dumping
403411 uint32_t uiEndFrame; // End Frame for dumping
412 uint32_t enableSkuWaDump; // Enable sku and wa info dump
404413 };
405414
406415 //==<FUNCTIONS>=================================================================
11141123 char *pcOutputPath,
11151124 PVPHAL_RENDER_PARAMS pRenderParams);
11161125
1126 //!
1127 //! \brief Dumps Sku and Workaround information to XML File
1128 //!
1129 virtual MOS_STATUS SkuWa_DumpToXML(
1130 MEDIA_FEATURE_TABLE *skuTable,
1131 MEDIA_WA_TABLE *waTable);
1132
11171133 protected:
11181134 //!
11191135 //! \brief Dumps the source Surface Parameters
11841200 //!
11851201 virtual const char * GetComponentStr(
11861202 MOS_COMPONENT component);
1203
1204 virtual char *GetDumpSpecLocation();
1205
1206 virtual bool GetDumpSpecSkuWaDumpEnable();
11871207
11881208 private:
11891209 PMOS_INTERFACE m_osInterface;
14141434 #define VPHAL_DBG_PARAMETERS_DUMPPER_CREATE()
14151435 #define VPHAL_DBG_PARAMETERS_DUMPPER_DESTORY(pParametersDumpSpec)
14161436 #define VPHAL_DBG_PARAMETERS_DUMPPER_DUMP_XML(pRenderParams)
1437 #define SkuWaTable_DUMPPER_DUMP_XML(skuTable, waTable)
14171438
14181439 #endif // (!(_DEBUG || _RELEASE_INTERNAL) || EMUL)
14191440
57815781
57825782 pWalkerParams->GroupStartingX = (AlignedRect.left / uiMediaWalkerBlockSize);
57835783 pWalkerParams->GroupStartingY = (AlignedRect.top / uiMediaWalkerBlockSize);
5784 pWalkerParams->GroupWidth = pRenderingData->iBlocksX;
5785 pWalkerParams->GroupHeight = pRenderingData->iBlocksY;
5784 pWalkerParams->GroupWidth = pWalkerParams->GroupStartingX + pRenderingData->iBlocksX;
5785 pWalkerParams->GroupHeight = pWalkerParams->GroupStartingY + pRenderingData->iBlocksY;
57865786
57875787 pWalkerParams->ThreadWidth = VPHAL_COMP_COMPUTE_WALKER_THREAD_SPACE_WIDTH;
57885788 pWalkerParams->ThreadHeight = VPHAL_COMP_COMPUTE_WALKER_THREAD_SPACE_HEIGHT;
900900 void VphalSfcState::GetOutputWidthHeightAlignUnit(
901901 MOS_FORMAT outputFormat,
902902 uint16_t &widthAlignUnit,
903 uint16_t &heightAlignUnit)
903 uint16_t &heightAlignUnit,
904 bool isInterlacedScaling)
904905 {
905906 widthAlignUnit = 1;
906907 heightAlignUnit = 1;
10731074 GetOutputWidthHeightAlignUnit(
10741075 pSfcStateParams->OutputFrameFormat,
10751076 wOutputWidthAlignUnit,
1076 wOutputHeightAlignUnit);
1077 wOutputHeightAlignUnit,
1078 pSrcSurface->bInterlacedScaling);
10771079
10781080 // Apply alignment restriction to Region of the input frame.
10791081 GetInputWidthHeightAlignUnit(
404404 virtual void GetOutputWidthHeightAlignUnit(
405405 MOS_FORMAT outputFormat,
406406 uint16_t &widthAlignUnit,
407 uint16_t &heightAlignUnit);
407 uint16_t &heightAlignUnit,
408 bool isInterlacedScaling = false);
408409
409410 //!
410411 //! \brief Setup SFC State related parameters
00 /*
1 * Copyright (c) 2011-2020, Intel Corporation
1 * Copyright (c) 2011-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
43474347 rcTemp = pcRenderParams->pTarget[0]->rcDst;
43484348 rcTempIn = pcRenderParams->pSrc[0]->rcDst;
43494349 if (pVeboxState->m_sfcPipeState && pVeboxState->m_sfcPipeState->m_bSFC2Pass)
4350 { //SFC 2 pass, there is the first pass's surface;
4350 {
4351 if (0 == pRenderData->fScaleX || 0 == pRenderData->fScaleY)
4352 {
4353 VPHAL_RENDER_ASSERTMESSAGE("Invalid scaling ratio in pRenderData during SFC 2 pass scaling!");
4354 }
4355
4356 //SFC 2 pass, here is the output surface of first pass.
43514357 float TempfScaleX = 1.0;
43524358 float TempfScaleY = 1.0;
43534359 if ((pRenderData->fScaleX >= 0.0625F) && (pRenderData->fScaleX < 0.125F))
00 /*
1 * Copyright (c) 2011-2020, Intel Corporation
1 * Copyright (c) 2011-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
13521352 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
13531353 //!
13541354 MOS_STATUS VphalRenderer::Initialize(
1355 const VphalSettings *pSettings)
1355 const VphalSettings *pSettings,
1356 bool isApoEnabled)
13561357 {
13571358 void* pKernelBin;
13581359 void* pFcPatchBin;
13801381 VPHAL_RENDER_CHK_NULL(m_pOsInterface);
13811382 VPHAL_RENDER_CHK_NULL(m_pRenderHal);
13821383 //---------------------------------------
1383
1384 m_isApoEnabled = isApoEnabled;
13841385 m_renderGpuContext = m_pOsInterface->pfnGetGpuContext(m_pOsInterface);
13851386
13861387 Align16State.pPerfData = &PerfData;
21162117 MOS_STATUS VphalRenderer::AllocateDebugDumper()
21172118 {
21182119 PRENDERHAL_INTERFACE pRenderHal = m_pRenderHal;
2119 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2120
2120 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
21212121 // Allocate feature report
21222122 m_reporting = MOS_New(VphalFeatureReport);
21232123 if (m_reporting == nullptr)
21422142 }
21432143
21442144 VPHAL_DBG_PARAMETERS_DUMPPER_CREATE()
2145
2146 // if m_isApoEnabled is false dump in legacy path, otherwise in APO path
2147 if (!m_isApoEnabled)
2148 {
2149 SkuWaTable_DUMPPER_DUMP_XML(m_pSkuTable, m_pWaTable);
2150 }
2151
21452152 if (m_parameterDumper == nullptr)
21462153 {
21472154 VPHAL_RENDER_ASSERTMESSAGE("Invalid null pointer!");
00 /*
1 * Copyright (c) 2009-2020, Intel Corporation
1 * Copyright (c) 2009-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
184184 VphalFeatureReport *m_reporting;
185185 // Default value for Gpu Context
186186 MOS_GPU_CONTEXT m_renderGpuContext;
187 bool m_isApoEnabled = false;
187188
188189 public:
189190 //!
257258 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
258259 //!
259260 virtual MOS_STATUS Initialize(
260 const VphalSettings *pSettings);
261 const VphalSettings *pSettings,
262 bool isApoEnabled);
261263
262264 //!
263265 //! \brief Main render function
111111 }
112112 }
113113
114 // For TCBRC adaptive region boost
115 if(m_brcAdaptiveRegionBoostEnabled)
116 {
117 cmd1.ROIStreamInEnabled = 1;
118 }
119
114120 // default
115121 cmd1.FwdPocNumForRefId0inL0 = 0x01;
116122 cmd1.FwdPocNumForRefId0inL1 = 0xff;
560560 PCODECHAL_VDENC_HEVC_STREAMIN_STATE_G10 data = (PCODECHAL_VDENC_HEVC_STREAMIN_STATE_G10)streaminData;
561561 if (streaminParams->setQpRoiCtrl)
562562 {
563 if (m_vdencNativeROIEnabled)
563 if (m_vdencNativeROIEnabled || m_brcAdaptiveRegionBoostEnable)
564564 {
565565 data->DW0.RoiCtrl = streaminParams->roiCtrl;
566566 }
19941994 m_brcEnabled,
19951995 m_vdencStreamInEnabled,
19961996 m_vdencNativeROIEnabled,
1997 m_brcAdaptiveRegionBoostEnable,
19971998 m_hevcVdencRoundingEnabled,
19981999 panicEnabled,
19992000 GetCurrentPass()));
34793480 hucVdencBrcInitDmem->StreamInROIEnable_U8 = 1;
34803481 hucVdencBrcInitDmem->StreamInSurfaceEnable_U8 = 1;
34813482 }
3482
34833483 // RDOQ adaptation hardened to HW starting Gen11
34843484 hucVdencBrcInitDmem->RDOQ_AdaptationEnable_U8 = 0;
34853485
47634763 m_kuidCommon = IDR_CODEC_HME_DS_SCOREBOARD_KERNEL;
47644764 m_hucPakStitchEnabled = true;
47654765 m_scalabilityState = nullptr;
4766 m_brcAdaptiveRegionBoostSupported = true;
47664767
47674768 MOS_ZeroMemory(&m_resPakcuLevelStreamoutData, sizeof(m_resPakcuLevelStreamoutData));
47684769 MOS_ZeroMemory(&m_resPakSliceLevelStreamoutData, sizeof(m_resPakSliceLevelStreamoutData));
00 /*
1 * Copyright (c) 2017-2020, Intel Corporation
1 * Copyright (c) 2017-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
3030
3131 #define CODECHAL_MAX_DPB_NUM_AV1 127 // Maximum number of uncompressed decoded buffers that driver supports for non-LST mode
3232 #define CODEC_NUM_REF_AV1_TEMP_BUFFERS 8
33 #define CODEC_NUM_AV1_SECOND_BB 16
3334 #define CODEC_NUM_AV1_TEMP_BUFFERS (CODEC_NUM_REF_AV1_TEMP_BUFFERS + 1) //!< Temp buffers number
3435 #define CODECHAL_MAX_DPB_NUM_LST_AV1 255 // Maximum number of uncompressed decoded buffers that driver supports with LST support
3536
136136 decProcessingParams->m_outputSurfaceRegion.m_width = procBuf->output_region->width;
137137 decProcessingParams->m_outputSurfaceRegion.m_height = procBuf->output_region->height;
138138
139 // Interpolation flags
140 // Set the vdbox scaling mode
141 uint32_t uInterpolationflags = 0;
142 #if VA_CHECK_VERSION(1, 9, 0)
143 uInterpolationflags = procBuf->filter_flags & VA_FILTER_INTERPOLATION_MASK;
144 #endif
145
146 switch (uInterpolationflags)
147 {
148 #if VA_CHECK_VERSION(1, 9, 0)
149 case VA_FILTER_INTERPOLATION_NEAREST_NEIGHBOR:
150 decProcessingParams->m_scalingMode = CODECHAL_SCALING_NEAREST;
151 break;
152 case VA_FILTER_INTERPOLATION_BILINEAR:
153 decProcessingParams->m_scalingMode = CODECHAL_SCALING_BILINEAR;
154 break;
155 case VA_FILTER_INTERPOLATION_ADVANCED:
156 case VA_FILTER_INTERPOLATION_DEFAULT:
157 #endif
158 default:
159 decProcessingParams->m_scalingMode = CODECHAL_SCALING_AVS;
160 break;
161 }
162
139163 // Chroma siting
140164 // Set the vertical chroma siting info
141 uint32_t chromaSitingFlags;
165 uint32_t chromaSitingFlags = 0;
142166 chromaSitingFlags = procBuf->input_color_properties.chroma_sample_location & 0x3;
143167 decProcessingParams->m_chromaSitingType = CODECHAL_CHROMA_SITING_NONE;
144168 decProcessingParams->m_rotationState = 0;
219243 m_streamOutEnabled = false;
220244 m_ddiDecodeCtx->DecodeParams.m_numSlices = 0;
221245 m_ddiDecodeCtx->DecodeParams.m_dataSize = 0;
246 m_ddiDecodeCtx->DecodeParams.m_dataOffset = 0;
222247 m_ddiDecodeCtx->DecodeParams.m_deblockDataSize = 0;
223248 m_ddiDecodeCtx->DecodeParams.m_executeCallIndex = 0;
249 m_ddiDecodeCtx->DecodeParams.m_cencBuf = nullptr;
224250 m_groupIndex = 0;
225251
226252 // register render targets
693719 }
694720
695721 if(m_ddiDecodeCtx->DecodeParams.m_procParams != nullptr &&
722 m_procBuf &&
696723 !isDecodeDownScalingSupported)
697724 {
698725 //check vp context
118118 PDDI_DECODE_CONTEXT decCtx = (PDDI_DECODE_CONTEXT)DdiMedia_GetContextFromContextID(ctx, context, &ctxType);
119119 DDI_CHK_NULL(decCtx, "nullptr decCtx", VA_STATUS_ERROR_INVALID_CONTEXT);
120120
121 if (decCtx->pCpDdiInterface)
122 {
123 DDI_CHK_RET(decCtx->pCpDdiInterface->IsAttachedSessionAlive(), "Session not alive!");
124 }
125
121126 if (decCtx->m_ddiDecode)
122127 {
123128 VAStatus va = decCtx->m_ddiDecode->BeginPicture(ctx, context, renderTarget);
149154 // assume the VAContextID is decoder ID
150155 PDDI_DECODE_CONTEXT decCtx = (PDDI_DECODE_CONTEXT)DdiMedia_GetContextFromContextID(ctx, context, &ctxType);
151156 DDI_CHK_NULL(decCtx, "nullptr decCtx", VA_STATUS_ERROR_INVALID_CONTEXT);
157
158 if (decCtx->pCpDdiInterface)
159 {
160 DDI_CHK_RET(decCtx->pCpDdiInterface->IsAttachedSessionAlive(), "Session not alive!");
161 }
162
152163 if (decCtx->m_ddiDecode)
153164 {
154165 VAStatus va = decCtx->m_ddiDecode->EndPicture(ctx, context);
186197 uint32_t ctxType;
187198 PDDI_DECODE_CONTEXT decCtx = (PDDI_DECODE_CONTEXT)DdiMedia_GetContextFromContextID(ctx, context, &ctxType);
188199 DDI_CHK_NULL(decCtx, "nullptr decCtx", VA_STATUS_ERROR_INVALID_CONTEXT);
200
201 if (decCtx->pCpDdiInterface)
202 {
203 DDI_CHK_RET(decCtx->pCpDdiInterface->IsAttachedSessionAlive(), "Session not alive!");
204 }
189205
190206 priorityIndexInBuffers = DdiMedia_GetGpuPriority(ctx, buffers, numOfBuffers, &updatePriority, &priority);
191207 if (priorityIndexInBuffers != -1)
172172 DdiStubMessage();
173173 return VA_STATUS_SUCCESS;
174174 }
175
176 VAStatus DdiCpInterface::IsAttachedSessionAlive()
177 {
178 DdiStubMessage();
179 return VA_STATUS_SUCCESS;
180 }
107107 VAContextID context
108108 );
109109
110 virtual VAStatus IsAttachedSessionAlive();
111
110112 };
111113
112114 //!
24692469 struct mos_bo_gem *target_bo_gem = (struct mos_bo_gem *) bo_gem->reloc_target_info[i].bo;
24702470 if (&target_bo_gem->bo != bo) {
24712471 bo_gem->reloc_tree_fences -= target_bo_gem->reloc_tree_fences;
2472 target_bo_gem->used_as_reloc_target = false;
2473 target_bo_gem->reloc_count = 0;
24722474 mos_gem_bo_unreference_locked_timed(&target_bo_gem->bo,
24732475 time.tv_sec);
24742476 }
00 /*
1 * Copyright (c) 2017, Intel Corporation
1 * Copyright (c) 2017-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
147147 return *this;
148148 }
149149
150 MediaMap *GetMediaSku()
151 {
152 return mediaMap;
153 }
154
150155 protected:
151156 MediaMap *mediaMap = nullptr;
152157 };
264269 return *this;
265270 }
266271
272 MediaMap *GetMediaWa()
273 {
274 return mediaMap;
275 }
276
267277 protected:
268278 MediaMap *mediaMap = nullptr;
269279 };
975975 skipSyncBoList.push_back(alloc_bo);
976976 }
977977
978 MOS_TraceEventExt(EVENT_MOS_BATCH_SUBMIT, EVENT_TYPE_INFO,
979 &alloc_bo->handle,
980 sizeof(alloc_bo->handle),
981 &currentPatch->uiWriteOperation,
982 sizeof(currentPatch->uiWriteOperation));
978 #if (_DEBUG || _RELEASE_INTERNAL)
979 {
980 uint32_t evtData[] = {alloc_bo->handle, currentPatch->uiWriteOperation, currentPatch->AllocationOffset};
981 MOS_TraceEventExt(EVENT_MOS_BATCH_SUBMIT, EVENT_TYPE_INFO,
982 evtData, sizeof(evtData),
983 &boOffset, sizeof(boOffset));
984 }
985 #endif
983986 if(mos_gem_bo_is_softpin(alloc_bo))
984987 {
985988 if (alloc_bo != tempCmdBo)
0 # Copyright (c) 2017, Intel Corporation
0 # Copyright (c) 2017-2021, Intel Corporation
11 #
22 # Permission is hereby granted, free of charge, to any person obtaining a
33 # copy of this software and associated documentation files (the "Software"),
2020 set(TMP_SOURCES_
2121 ${CMAKE_CURRENT_LIST_DIR}/vphal_common_specific.c
2222 ${CMAKE_CURRENT_LIST_DIR}/vphal_render_common_specific.c
23 ${CMAKE_CURRENT_LIST_DIR}/skuwa_dump_specific.c
2324 )
2425
2526 set(TMP_HEADERS_ "")
0 /*
1 * Copyright (c) 2021, Intel Corporation
2 *
3 * Permission is hereby granted, free of charge, to any person obtaining a
4 * copy of this software and associated documentation files (the "Software"),
5 * to deal in the Software without restriction, including without limitation
6 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
7 * and/or sell copies of the Software, and to permit persons to whom the
8 * Software is furnished to do so, subject to the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included
11 * in all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
14 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
16 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
17 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
18 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
19 * OTHER DEALINGS IN THE SOFTWARE.
20 */
21 //!
22 //! \file skuwa_dump_specific.c
23 //!
24 //!
25
26 #if (_DEBUG || _RELEASE_INTERNAL)
27 #include <stdio.h>
28 #include "vphal.h"
29 #include "mhw_vebox.h"
30 #include "mos_os.h"
31 #include "vphal_debug.h"
32 #include "ctype.h"
33
34 MOS_STATUS VphalParameterDumper::SkuWa_DumpToXML(
35 MEDIA_FEATURE_TABLE *skuTable,
36 MEDIA_WA_TABLE *waTable)
37 {
38 char sPath[MAX_PATH] = {0}, sOsPath[MAX_PATH] = {0};
39 MOS_STATUS eStatus;
40 char* pcOutContents;
41 std::string SkuWatableFileName = "skuwatable_dump";
42 VPHAL_DBG_PARAMS_DUMP_SPEC* pParamsDumpSpec = &m_dumpSpec;
43 bool enableSkuWaDump = false;
44
45 eStatus = MOS_STATUS_SUCCESS;
46 pcOutContents = nullptr;
47 enableSkuWaDump = m_dumpSpec.enableSkuWaDump;
48
49 std::map<std::string, uint8_t>::iterator iter;
50 MediaFeatureTable::MediaMap * mediaSkuMap = skuTable->GetMediaSku();
51 MediaWaTable::MediaMap * mediaWaMap = waTable->GetMediaWa();
52 VPHAL_DEBUG_CHK_NULL(pParamsDumpSpec);
53
54 if (!enableSkuWaDump)
55 goto finish;
56
57 VPHAL_DEBUG_CHK_NULL(skuTable);
58 VPHAL_DEBUG_CHK_NULL(waTable);
59
60 VPHAL_DEBUG_CHK_STATUS(VphalDumperTool::AppendString(true, &pcOutContents, "<?xml version=\"1.0\" encoding=\"utf-8\"?>\n"));
61 VPHAL_DEBUG_CHK_STATUS(VphalDumperTool::AppendString(false, &pcOutContents, "\n"));
62
63 VPHAL_DEBUG_CHK_STATUS(VphalDumperTool::AppendString(false, &pcOutContents, "\t<ID>%d</ID>\n", MOS_GetPid()));
64
65 VPHAL_DEBUG_CHK_STATUS(VphalDumperTool::AppendString(false, &pcOutContents, "\t<!-- SkuTable infomation -->\n"));
66 VPHAL_DEBUG_CHK_STATUS(VphalDumperTool::AppendString(false, &pcOutContents, "\t<SkuTable>\n"));
67
68 VPHAL_DEBUG_CHK_NULL(mediaSkuMap);
69
70 for (iter = mediaSkuMap->begin(); iter != mediaSkuMap->end(); iter++)
71 {
72 VPHAL_DEBUG_CHK_STATUS(VphalDumperTool::AppendString(false, &pcOutContents, "\t\t<%s> %d </%s>\n", iter->first.c_str(), unsigned(iter->second), iter->first.c_str()));
73 }
74 VPHAL_DEBUG_CHK_STATUS(VphalDumperTool::AppendString(false, &pcOutContents, "\t</SkuTable>\n"));
75
76 VPHAL_DEBUG_CHK_STATUS(VphalDumperTool::AppendString(false, &pcOutContents, "\t<!-- WaTable information -->\n"));
77 VPHAL_DEBUG_CHK_STATUS(VphalDumperTool::AppendString(false, &pcOutContents, "\t<WaTable>\n"));
78
79 VPHAL_DEBUG_CHK_NULL(mediaWaMap);
80
81 for (iter = mediaWaMap->begin(); iter != mediaWaMap->end(); iter++)
82 {
83 VPHAL_DEBUG_CHK_STATUS(VphalDumperTool::AppendString(false, &pcOutContents, "\t\t<%s> %d </%s>\n", iter->first.c_str(), unsigned(iter->second), iter->first.c_str()));
84 }
85 VPHAL_DEBUG_CHK_STATUS(VphalDumperTool::AppendString(false, &pcOutContents, "\t</WaTable>\n"));
86
87 MOS_SecureStringPrint(sPath, MAX_PATH, MAX_PATH, "%s%c%s.xml", pParamsDumpSpec->outFileLocation, MOS_DIR_SEPERATOR, SkuWatableFileName.c_str());
88 VphalDumperTool::GetOsFilePath(sPath, sOsPath);
89 VPHAL_DEBUG_CHK_STATUS(MOS_WriteFileFromPtr(sOsPath, pcOutContents, strlen(pcOutContents)));
90
91 finish:
92 if (pcOutContents)
93 {
94 MOS_FreeMemory(pcOutContents);
95 pcOutContents = nullptr;
96 }
97
98 return eStatus;
99 }
100
101 #endif // (_DEBUG || _RELEASE_INTERNAL)
00 /*
1 * Copyright (c) 2019-2020, Intel Corporation
1 * Copyright (c) 2019-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
6262 DECODE_CHK_NULL(m_tilePkt);
6363 DECODE_CHK_STATUS(m_tilePkt->CalculateCommandSize(m_tileStatesSize, m_tilePatchListSize));
6464
65 m_secondLevelBBArray = m_allocator->AllocateBatchBufferArray(
66 m_pictureStatesSize, 1, CODEC_NUM_AV1_SECOND_BB, true);
67 DECODE_CHK_NULL(m_secondLevelBBArray);
68
6569 return MOS_STATUS_SUCCESS;
6670 }
6771
7882 MOS_STATUS Av1DecodePkt::Destroy()
7983 {
8084 m_statusReport->UnregistObserver(this);
85
86 DECODE_CHK_STATUS(m_allocator->Destroy(m_secondLevelBBArray));
87
8188 return MOS_STATUS_SUCCESS;
8289 }
8390
265272 (void*)m_av1Pipeline, m_osInterface, m_miInterface, cmdBuffer));
266273
267274 return MOS_STATUS_SUCCESS;
268
275 }
276
277 MOS_STATUS Av1DecodePkt::InitPicLevelCmdBuffer(MHW_BATCH_BUFFER &batchBuffer, uint8_t *batchBufBase)
278 {
279 DECODE_FUNC_CALL();
280
281 auto &cmdBuffer = m_picCmdBuffer;
282 MOS_ZeroMemory(&cmdBuffer, sizeof(MOS_COMMAND_BUFFER));
283 cmdBuffer.pCmdBase = (uint32_t*)batchBufBase;
284 cmdBuffer.pCmdPtr = cmdBuffer.pCmdBase;
285 cmdBuffer.iRemaining = batchBuffer.iSize;
286 cmdBuffer.OsResource = batchBuffer.OsResource;
287
288 return MOS_STATUS_SUCCESS;
269289 }
270290
271291 #if USE_CODECHAL_DEBUG_TOOL
00 /*
1 * Copyright (c) 2019-2020, Intel Corporation
1 * Copyright (c) 2019-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
114114 return "AV1_DECODE";
115115 }
116116
117 PMHW_BATCH_BUFFER GetSecondLvlBB() { return m_batchBuf; };
118
117119 protected:
118120 //!
119121 //! \brief Calculate Command Buffer Size
147149
148150 virtual MOS_STATUS StartStatusReport(uint32_t srType, MOS_COMMAND_BUFFER* cmdBuffer) override;
149151 virtual MOS_STATUS EndStatusReport(uint32_t srType, MOS_COMMAND_BUFFER* cmdBuffer) override;
152 MOS_STATUS InitPicLevelCmdBuffer(MHW_BATCH_BUFFER &batchBuffer, uint8_t *batchBufBase);
150153
151154 #if USE_CODECHAL_DEBUG_TOOL
152155 //! \brief Dump the output resources in status report callback function
173176 CodechalHwInterface *m_hwInterface = nullptr;
174177 DecodeMemComp *m_mmcState = nullptr;
175178
176 Av1DecodePicPkt * m_picturePkt = nullptr;
177 Av1DecodeTilePkt * m_tilePkt = nullptr;
179 Av1DecodePicPkt *m_picturePkt = nullptr;
180 Av1DecodeTilePkt *m_tilePkt = nullptr;
181 bool m_isLastTileInPartialFrm = false;
182 bool m_isFirstTileInPartialFrm = false;
178183
179184 // Parameters passed from application
180 const CodecAv1PicParams *m_av1PicParams = nullptr; //!< Pointer to picture parameter
185 const CodecAv1PicParams *m_av1PicParams = nullptr; //!< Pointer to picture parameter
181186
182187 uint32_t m_pictureStatesSize = 0;
183188 uint32_t m_picturePatchListSize = 0;
184 uint32_t m_tileStatesSize = 0;
185 uint32_t m_tilePatchListSize = 0;
189 uint32_t m_tileStatesSize = 0;
190 uint32_t m_tilePatchListSize = 0;
191
192 BatchBufferArray *m_secondLevelBBArray = nullptr; //!< Point to second level batch buffer
193 MOS_COMMAND_BUFFER m_picCmdBuffer;
194 PMHW_BATCH_BUFFER m_batchBuf = nullptr;
186195 };
187196
188197 } // namespace decode
14341434 return MOS_STATUS_SUCCESS;
14351435 }
14361436
1437 MOS_STATUS Av1DecodePicPkt::SetInloopFilterStateParams(MhwVdboxAvpPicStateParams& picStateParams)
1438 {
1439 DECODE_FUNC_CALL();
1440
1441 MOS_ZeroMemory(&picStateParams, sizeof(picStateParams));
1442 picStateParams.m_picParams = m_av1PicParams;
1443
1444 if (m_av1PicParams->m_picInfoFlags.m_fields.m_useSuperres)
1445 {
1446 //setup super-res step/offset for luma/chroma, per av1_upscale_normative_rows()
1447 if (m_av1BasicFeature->m_tileCoding.m_curTile == 0)
1448 {
1449 m_av1BasicFeature->m_tileCoding.GetUpscaleConvolveStepX0(*m_av1PicParams, false); // Luma
1450 m_av1BasicFeature->m_tileCoding.GetUpscaleConvolveStepX0(*m_av1PicParams, true); // Chroma
1451 }
1452
1453 uint16_t col = m_av1BasicFeature->m_tileCoding.m_tileDesc[m_av1BasicFeature->m_tileCoding.m_curTile].m_tileColumn;
1454 picStateParams.m_lumaPlaneXStepQn = m_av1BasicFeature->m_tileCoding.m_lumaXStepQn;
1455 picStateParams.m_lumaPlaneX0Qn = m_av1BasicFeature->m_tileCoding.m_lumaX0Qn[col];
1456 picStateParams.m_chromaPlaneXStepQn = m_av1BasicFeature->m_tileCoding.m_chromaXStepQn;
1457 picStateParams.m_chromaPlaneX0Qn = m_av1BasicFeature->m_tileCoding.m_chromaX0Qn[col];
1458 }
1459
1460 return MOS_STATUS_SUCCESS;
1461 }
1462
14631437 MOS_STATUS Av1DecodePicPkt::CalculateCommandSize(uint32_t &commandBufferSize, uint32_t &requestedPatchListSize)
14641438 {
14651439 DECODE_FUNC_CALL();
00 /*
1 * Copyright (c) 2019-2020, Intel Corporation
1 * Copyright (c) 2019-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
119119
120120 virtual MOS_STATUS SetAvpPicStateParams(MhwVdboxAvpPicStateParams &picStateParams);
121121 virtual MOS_STATUS SetAvpInterPredStateParams(MhwVdboxAvpPicStateParams &picStateParams);
122 virtual MOS_STATUS SetInloopFilterStateParams(MhwVdboxAvpPicStateParams &picStateParams);
123122
124123 //! \brief Set Rowstore Cache offset
125124 //!
00 /*
1 * Copyright (c) 2019, Intel Corporation
1 * Copyright (c) 2019-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
162162 return MOS_STATUS_SUCCESS;
163163 }
164164
165 MOS_STATUS Av1DecodeTilePkt::AddAvpInloopFilterStateCmd(MOS_COMMAND_BUFFER &cmdBuffer)
166 {
167 DECODE_FUNC_CALL();
168
169 MhwVdboxAvpPicStateParams picStateParams;
170 DECODE_CHK_STATUS(SetInloopFilterStateParams(picStateParams));
171 DECODE_CHK_STATUS(m_avpInterface->AddAvpInloopFilterStateCmd(&cmdBuffer, &picStateParams));
172
173 return MOS_STATUS_SUCCESS;
174 }
175
176 MOS_STATUS Av1DecodeTilePkt::SetInloopFilterStateParams(MhwVdboxAvpPicStateParams& picStateParams)
177 {
178 DECODE_FUNC_CALL();
179
180 MOS_ZeroMemory(&picStateParams, sizeof(picStateParams));
181 picStateParams.m_picParams = m_av1PicParams;
182
183 if (m_av1PicParams->m_picInfoFlags.m_fields.m_useSuperres)
184 {
185 //setup super-res step/offset for luma/chroma, per av1_upscale_normative_rows()
186 if (m_av1BasicFeature->m_tileCoding.m_curTile == 0)
187 {
188 m_av1BasicFeature->m_tileCoding.GetUpscaleConvolveStepX0(*m_av1PicParams, false); // Luma
189 m_av1BasicFeature->m_tileCoding.GetUpscaleConvolveStepX0(*m_av1PicParams, true); // Chroma
190 }
191
192 uint16_t col = m_av1BasicFeature->m_tileCoding.m_tileDesc[m_av1BasicFeature->m_tileCoding.m_curTile].m_tileColumn;
193 picStateParams.m_lumaPlaneXStepQn = m_av1BasicFeature->m_tileCoding.m_lumaXStepQn;
194 picStateParams.m_lumaPlaneX0Qn = m_av1BasicFeature->m_tileCoding.m_lumaX0Qn[col];
195 picStateParams.m_chromaPlaneXStepQn = m_av1BasicFeature->m_tileCoding.m_chromaXStepQn;
196 picStateParams.m_chromaPlaneX0Qn = m_av1BasicFeature->m_tileCoding.m_chromaX0Qn[col];
197 }
198
199 return MOS_STATUS_SUCCESS;
200 }
201
165202 MOS_STATUS Av1DecodeTilePkt::CalculateCommandSize(uint32_t &commandBufferSize,
166203 uint32_t &requestedPatchListSize)
167204 {
9393 virtual MOS_STATUS SetAvpTileCodingParams(MhwVdboxAvpTileCodingParams &tileCodingParams,
9494 int16_t tileIdx);
9595
96 virtual MOS_STATUS SetInloopFilterStateParams(MhwVdboxAvpPicStateParams &picStateParams);
97 virtual MOS_STATUS AddAvpInloopFilterStateCmd(MOS_COMMAND_BUFFER &cmdBuffer);
98
9699 MOS_STATUS AddAvpTileState(MOS_COMMAND_BUFFER &cmdBuffer, int16_t tileIdx);
97100
98101 //!
00 /*
1 * Copyright (c) 2019-2020, Intel Corporation
1 * Copyright (c) 2019-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
164164
165165 void DecodeInputBitstream::InitScalabilityPars(PMOS_INTERFACE osInterface)
166166 {
167 MOS_ZeroMemory(&m_decodeScalabilityPars, sizeof(ScalabilityPars));
167 MOS_ZeroMemory(&m_decodeScalabilityPars, sizeof(m_decodeScalabilityPars));
168168 m_decodeScalabilityPars.disableScalability = true;
169169 m_decodeScalabilityPars.disableRealTile = true;
170170 m_decodeScalabilityPars.enableVE = MOS_VE_SUPPORTED(osInterface);
117117 m_rotationState = procParams->m_rotationState;
118118 m_blendState = procParams->m_blendState;
119119 m_mirrorState = procParams->m_mirrorState;
120 m_scalingMode = procParams->m_scalingMode;
120121 m_isReferenceOnlyPattern = procParams->m_isReferenceOnlyPattern;
121122
122123 DECODE_CHK_NULL(procParams->m_outputSurface);
8080 bool m_isInputSurfAllocated = false;
8181 bool m_isReferenceOnlyPattern = false;
8282
83 CODECHAL_SCALING_MODE m_scalingMode = CODECHAL_SCALING_NEAREST;
84
8385 // Histogram
8486 PMOS_BUFFER m_histogramBuffer = nullptr; // SFC histogram internal buffer
8587 PMOS_SURFACE m_histogramDestSurf = nullptr; // SFC histogram dest surface
133133 m_downSampling->m_outputSurfaceRegion.m_height;
134134
135135 sfcParams.videoParams.codecStandard = m_basicFeature->m_standard;
136 sfcParams.scalingMode = m_downSampling->m_scalingMode;
136137
137138 // If histogram is enabled
138139 if (m_downSampling->m_histogramDestSurf || m_downSampling->m_histogramDebug)
244244 DECODE_CHK_NULL(params);
245245 DecodePipelineParams *pipelineParams = (DecodePipelineParams *)params;
246246 CodechalDecodeParams *decodeParams = pipelineParams->m_params;
247
248247 DECODE_CHK_NULL(decodeParams);
248
249 DECODE_CHK_STATUS(m_task->Clear());
250 m_activePacketList.clear();
249251
250252 DECODE_CHK_NULL(m_featureManager);
251253 DECODE_CHK_STATUS(m_featureManager->CheckFeatures(decodeParams));
280282 if (prop.immediateSubmit)
281283 {
282284 DECODE_CHK_STATUS(task->Submit(true, m_scalability, m_debugInterface));
283 DECODE_CHK_STATUS(task->Clear());
284285 }
285286 }
286287
467468 const DecodeStatusMfx& status = statusReport->GetMfxStatus(m_statusCheckCount);
468469 if (status.status != DecodeStatusReport::queryEnd)
469470 {
470 DECODE_ASSERTMESSAGE("Media reset may have occured at frame %d.", m_statusCheckCount);
471 DECODE_ASSERTMESSAGE("Media reset may have occured at frame %d, status is %d, completedCount is %d.",
472 m_statusCheckCount, status.status, completedCount);
471473 }
474 DECODE_NORMALMESSAGE("hucStatus2 is 0x%x at frame %d.", status.m_hucErrorStatus2, m_statusCheckCount);
475 DECODE_NORMALMESSAGE("hucStatus is 0x%x at frame %d.", status.m_hucErrorStatus, m_statusCheckCount);
472476
473477 DECODE_CHK_STATUS(ReportVdboxIds(status));
474478
115115 void DecodeSfcHistogramSubPipeline::InitScalabilityPars(PMOS_INTERFACE osInterface)
116116 {
117117 DECODE_FUNC_CALL();
118 MOS_ZeroMemory(&m_decodeScalabilityPars, sizeof(ScalabilityPars));
118 MOS_ZeroMemory(&m_decodeScalabilityPars, sizeof(m_decodeScalabilityPars));
119119 m_decodeScalabilityPars.disableScalability = true;
120120 m_decodeScalabilityPars.disableRealTile = true;
121121 m_decodeScalabilityPars.enableVE = MOS_VE_SUPPORTED(osInterface);
4141 bool enabled = false;
4242 uint32_t dwAddress = 0;
4343 };
44
45 struct RowStoreCacheParams
46 {
47 uint32_t codec;
48
49 // other codecs like AVC may need extra information
50 // like whether resolution is > 4K, define these
51 // fields here
52 };
5344 } // namespace vdbox
5445 } // namespace mhw
5546
4242 static constexpr uint32_t MAX_REF_NUM_L1 = 4; // low delay B may have 3 L1 refs
4343 static constexpr uint32_t MAX_REF_NUM = MAX_REF_NUM_L0 > MAX_REF_NUM_L1 ? MAX_REF_NUM_L0 : MAX_REF_NUM_L1;
4444 static constexpr uint32_t MAX_REF_NUM_L0L1 = MAX_REF_NUM_L0 + MAX_REF_NUM_L1;
45
46 static constexpr uint32_t VDENC_ROWSTORE_BASEADDRESS = 2370;
47 static constexpr uint32_t VDENC_IPDL_ROWSTORE_BASEADDRESS = 384;
4845
4946 enum class SurfaceFormat
5047 {
4747 InitRowstoreUserFeatureSettings();
4848 }
4949
50 MOS_STATUS Impl::SetRowstoreCachingAddrs(const mhw::vdbox::RowStoreCacheParams &params)
50 MOS_STATUS Impl::EnableVdencRowstoreCacheIfSupported(uint32_t address)
5151 {
5252 MHW_FUNCTION_ENTER;
5353
54 if (this->m_vdencRowStoreCache.supported && params.codec == CODECHAL_ENCODE_RESERVED_0)
54 if (this->m_vdencRowStoreCache.supported)
5555 {
56 this->m_vdencRowStoreCache.enabled = true;
57 this->m_vdencRowStoreCache.dwAddress = VDENC_ROWSTORE_BASEADDRESS;
58 this->m_vdencIpdlRowstoreCache.dwAddress = VDENC_IPDL_ROWSTORE_BASEADDRESS;
56 this->m_vdencRowStoreCache.enabled = true;
57 this->m_vdencRowStoreCache.dwAddress = address;
58 }
59
60 return MOS_STATUS_SUCCESS;
61 }
62
63 MOS_STATUS Impl::EnableVdencRowIpdlstoreCacheIfSupported(uint32_t address)
64 {
65 MHW_FUNCTION_ENTER;
66
67 if (this->m_vdencIpdlRowstoreCache.supported)
68 {
69 this->m_vdencIpdlRowstoreCache.enabled = true;
70 this->m_vdencIpdlRowstoreCache.dwAddress = address;
5971 }
6072
6173 return MOS_STATUS_SUCCESS;
100112 &userFeatureData,
101113 m_osItf->pOsContext);
102114 #endif // _DEBUG || _RELEASE_INTERNAL
103 this->m_rowstoreCachingSupported = userFeatureData.i32Data ? false : true;
115 bool rowstoreCachingSupported = userFeatureData.i32Data ? false : true;
104116
105 if (this->m_rowstoreCachingSupported)
117 if (!rowstoreCachingSupported)
106118 {
107 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
119 return MOS_STATUS_SUCCESS;
120 }
121
122 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
108123 #if (_DEBUG || _RELEASE_INTERNAL)
109 MOS_UserFeature_ReadValue_ID(
110 nullptr,
111 __MEDIA_USER_FEATURE_VALUE_VDENCROWSTORECACHE_DISABLE_ID,
112 &userFeatureData,
113 m_osItf->pOsContext);
124 MOS_UserFeature_ReadValue_ID(
125 nullptr,
126 __MEDIA_USER_FEATURE_VALUE_VDENCROWSTORECACHE_DISABLE_ID,
127 &userFeatureData,
128 m_osItf->pOsContext);
114129 #endif // _DEBUG || _RELEASE_INTERNAL
115 this->m_vdencRowStoreCache.supported = userFeatureData.i32Data ? false : true;
116 }
130 this->m_vdencRowStoreCache.supported = userFeatureData.i32Data ? false : true;
131
132 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
133 #if (_DEBUG || _RELEASE_INTERNAL)
134 MOS_UserFeature_ReadValue_ID(
135 nullptr,
136 __MEDIA_USER_FEATURE_VALUE_INTRAROWSTORECACHE_DISABLE_ID,
137 &userFeatureData,
138 m_osItf->pOsContext);
139 #endif // _DEBUG || _RELEASE_INTERNAL
140 this->m_vdencIpdlRowstoreCache.supported = userFeatureData.i32Data ? false : true;
117141
118142 return MOS_STATUS_SUCCESS;
119143 }
144144 _MHW_CMD_ALL_DEF_FOR_IMPL(VD_PIPELINE_FLUSH);
145145
146146 public:
147 MOS_STATUS SetRowstoreCachingAddrs(const vdbox::RowStoreCacheParams &params) override;
147 MOS_STATUS EnableVdencRowstoreCacheIfSupported(uint32_t address) override;
148
149 MOS_STATUS EnableVdencRowIpdlstoreCacheIfSupported(uint32_t address) override;
148150
149151 MOS_STATUS SetCacheabilitySettings(MHW_MEMORY_OBJECT_CONTROL_PARAMS settings[MOS_CODEC_RESOURCE_USAGE_END_CODEC]) override;
150152
163165 PMOS_COMMAND_BUFFER m_currentCmdBuf = nullptr;
164166 PMHW_BATCH_BUFFER m_currentBatchBuf = nullptr;
165167
166 bool m_rowstoreCachingSupported = false;
167168 vdbox::RowStoreCache m_vdencRowStoreCache = {};
168169 vdbox::RowStoreCache m_vdencIpdlRowstoreCache = {};
169170 MHW_MEMORY_OBJECT_CONTROL_PARAMS m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_END_CODEC] = {};
400401 }
401402
402403 typename cmd_t::VDENC_Reference_Picture_CMD *fwdRefs[] =
403 {&cmd->FwdRef0, &cmd->FwdRef1, &cmd->FwdRef2};
404 {&cmd->FwdRef0, &cmd->FwdRef1, &cmd->FwdRef2, &cmd->BwdRef0};
404405 uint32_t fwdRefsDwLoaction[] =
405406 {_MHW_CMD_DW_LOCATION(FwdRef0), _MHW_CMD_DW_LOCATION(FwdRef1), _MHW_CMD_DW_LOCATION(FwdRef2)};
406407
750751 &resourceParams));
751752 }
752753
753 if (this->m_vdencRowStoreCache.enabled)
754 if (this->m_vdencIpdlRowstoreCache.enabled)
754755 {
755756 cmd->IntraPredictionRowstoreBaseAddress.BufferPictureFields.DW0.CacheSelect = cmd_t::VDENC_Surface_Control_Bits_CMD::CACHE_SELECT_UNNAMED1;
756757 cmd->IntraPredictionRowstoreBaseAddress.LowerAddress.DW0.Value = m_vdencIpdlRowstoreCache.dwAddress << 6;
4141 public:
4242 virtual ~Itf() = default;
4343
44 virtual MOS_STATUS SetRowstoreCachingAddrs(const vdbox::RowStoreCacheParams &params) = 0;
44 virtual MOS_STATUS EnableVdencRowstoreCacheIfSupported(uint32_t address) = 0;
45
46 virtual MOS_STATUS EnableVdencRowIpdlstoreCacheIfSupported(uint32_t address) = 0;
4547
4648 virtual MOS_STATUS SetCacheabilitySettings(MHW_MEMORY_OBJECT_CONTROL_PARAMS settings[MOS_CODEC_RESOURCE_USAGE_END_CODEC]) = 0;
4749
409409 if (MosUtilities::m_mosUltFlag)
410410 {
411411 MosSetCompMessageLevelAll(MOS_MESSAGE_LVL_DISABLED);
412 MosSetCompMessageLevel(MOS_COMPONENT_OS, MOS_MESSAGE_LVL_VERBOSE);
412 MosSetCompMessageLevel(MOS_COMPONENT_OS, MOS_MESSAGE_LVL_MEMNINJA);
413413 m_mosMsgParams.bUseOutputDebugString = 0;
414414 m_mosMsgParams.components[MOS_COMPONENT_OS].bBySubComponent = 0;
415415 MosCompAssertEnableDisable(MOS_COMPONENT_CM, 0);
135135 } output;
136136
137137 VIDEO_PARAMS videoParams; //!< standard related params.
138 CODECHAL_SCALING_MODE scalingMode;
138139 };
139140
140141 union MEDIA_SFC_INTERFACE_MODE
111111 scalingParams.type = FeatureTypeScalingOnSfc;
112112 scalingParams.formatInput = sfcParam.input.format;
113113 scalingParams.formatOutput = sfcParam.output.surface->Format;
114 scalingParams.scalingMode = VPHAL_SCALING_AVS;
114 scalingParams.scalingMode = GetScalingMode(sfcParam.scalingMode);
115115 scalingParams.scalingPreference = VPHAL_SCALING_PREFER_SFC; //!< DDI indicate Scaling preference
116116 scalingParams.bDirectionalScalar = false; //!< Vebox Directional Scalar
117117 scalingParams.input.rcSrc = rcSrcInput; //!< No input crop support for VD mode. rcSrcInput must have same width/height of input image.
212212 return MOS_STATUS_SUCCESS;
213213 }
214214
215 VPHAL_SCALING_MODE MediaVdboxSfcRender::GetScalingMode(CODECHAL_SCALING_MODE scalingMode)
216 {
217 // Default mode is VPHAL_SCALING_AVS
218 VPHAL_SCALING_MODE sfcScalingMode = VPHAL_SCALING_AVS;
219
220 switch(scalingMode)
221 {
222 case CODECHAL_SCALING_BILINEAR:
223 sfcScalingMode = VPHAL_SCALING_BILINEAR;
224 break;
225 case CODECHAL_SCALING_NEAREST:
226 case CODECHAL_SCALING_AVS:
227 case CODECHAL_SCALING_ADV_QUALITY:
228 default:
229 sfcScalingMode = VPHAL_SCALING_AVS;
230 break;
231 }
232
233 return sfcScalingMode;
234 }
235
215236 bool MediaVdboxSfcRender::IsVdboxSfcFormatSupported(
216237 CODECHAL_STANDARD codecStandard,
217238 MOS_FORMAT inputFormat,
9999 MOS_STATUS SetRotMirParams(VDBOX_SFC_PARAMS &sfcParam, VP_EXECUTE_CAPS &vpExecuteCaps);
100100 MOS_STATUS SetHistogramParams(VDBOX_SFC_PARAMS &sfcParam);
101101
102 VPHAL_SCALING_MODE GetScalingMode(CODECHAL_SCALING_MODE scalingMode);
103
102104 VP_MHWINTERFACE m_vpMhwInterface = {};
103105 PMOS_INTERFACE m_osInterface = nullptr;
104106 vp::VpAllocator *m_allocator = nullptr;
740740 return MOS_STATUS_SUCCESS;
741741 }
742742
743 // for debug purpose
744 #if (_DEBUG || _RELEASE_INTERNAL)
745 MOS_STATUS VpAllocator::ReAllocateSurface(
746 PVPHAL_SURFACE surface,
747 PCCHAR surfaceName,
748 MOS_FORMAT format,
749 MOS_GFXRES_TYPE defaultResType,
750 MOS_TILE_TYPE defaultTileType,
751 uint32_t width,
752 uint32_t height,
753 bool compressible,
754 MOS_RESOURCE_MMC_MODE compressionMode,
755 bool * allocated,
756 MOS_HW_RESOURCE_DEF resUsageType,
757 MOS_TILE_MODE_GMM tileModeByForce)
758 {
759 MOS_STATUS eStatus;
760 VPHAL_GET_SURFACE_INFO info;
761 MOS_ALLOC_GFXRES_PARAMS allocParams;
762 MOS_GFXRES_FREE_FLAGS resFreeFlags = {0};
763
764 //---------------------------------
765 VP_PUBLIC_ASSERT(&surface->OsResource);
766 //---------------------------------
767
768 eStatus = MOS_STATUS_SUCCESS;
769 *allocated = false;
770
771 // compressible should be compared with compressible since it is inited by compressible in previous call
772 // TileType of surface should be compared since we need to reallocate surface if TileType changes
773 if (!Mos_ResourceIsNull(&surface->OsResource) &&
774 (surface->dwWidth == width) &&
775 (surface->dwHeight == height) &&
776 (surface->Format == format) &&
777 (surface->bCompressible == compressible) &&
778 (surface->CompressionMode == compressionMode) &&
779 (surface->TileType == defaultTileType))
780 {
781 return eStatus;
782 }
783
784 MOS_ZeroMemory(&allocParams, sizeof(MOS_ALLOC_GFXRES_PARAMS));
785
786 VpHal_AllocParamsInitType(&allocParams, surface, defaultResType, defaultTileType);
787
788 allocParams.dwWidth = width;
789 allocParams.dwHeight = height;
790 allocParams.Format = format;
791 allocParams.bIsCompressible = compressible;
792 allocParams.CompressionMode = compressionMode;
793 allocParams.pBufName = surfaceName;
794 allocParams.dwArraySize = 1;
795 allocParams.ResUsageType = resUsageType;
796 allocParams.m_tileModeByForce = tileModeByForce;
797
798 VP_PUBLIC_CHK_STATUS_RETURN(DestroyResource(&surface->OsResource));
799
800 // Allocate surface
801 VP_PUBLIC_CHK_STATUS_RETURN(AllocateResource(&surface->OsResource, allocParams));
802
803 // Get surface information
804 MOS_ZeroMemory(&info, sizeof(VPHAL_GET_SURFACE_INFO));
805
806 // Pre-set to get surface info
807 surface->Format = format;
808
809 VP_PUBLIC_CHK_STATUS_RETURN(GetSurfaceInfo(surface, info));
810
811 *allocated = true;
812
813 VP_PUBLIC_ASSERT(eStatus == MOS_STATUS_SUCCESS);
814 return eStatus;
815 }
816 #endif
817
743818 MOS_STATUS VpAllocator::OsFillResource(
744819 PMOS_RESOURCE osResource,
745820 uint32_t size,
381381 MOS_TILE_MODE_GMM tileModeByForce = MOS_TILE_UNSET_GMM);
382382
383383 //!
384 //! \brief Allocates the Surface
385 //! \details Allocates the Surface
386 //! - if the surface is not already allocated OR
387 //! - resource dimenisions OR format changed
388 //! \param [in,out] pSurface
389 //! Pointer to VPHAL_SURFACE
390 //! \param [in] pSurfaceName
391 //! Pointer to surface name
392 //! \param [in] Format
393 //! Expected MOS_FORMAT
394 //! \param [in] DefaultResType
395 //! Expected Resource Type
396 //! \param [in] DefaultTileType
397 //! Expected Surface Tile Type
398 //! \param [in] dwWidth
399 //! Expected Surface Width
400 //! \param [in] dwHeight
401 //! Expected Surface Height
402 //! \param [in] bCompressible
403 //! Surface being compressible or not
404 //! \param [in] CompressionMode
405 //! Compression Mode
406 //! \param [out] pbAllocated
407 //! true if allocated, false for not
408 //! \param [in] resUsageType
409 //! resource usage type for caching
410 //! \return MOS_STATUS
411 //! MOS_STATUS_SUCCESS if success. Error code otherwise
412 //!
413 // for debug purpose
414 #if (_DEBUG || _RELEASE_INTERNAL)
415 MOS_STATUS ReAllocateSurface(
416 PVPHAL_SURFACE surface, // [in/out]Pointer to surface
417 PCCHAR surfaceName, // [in] Pointer to surface name
418 MOS_FORMAT format, // [in] Surface Format
419 MOS_GFXRES_TYPE defaultResType, // [in] Default Resource Type to use if resource has not be allocated yet
420 MOS_TILE_TYPE defaultTileType, // [in] Default Resource Tile Type to use if resource has not be allocated yet
421 uint32_t width, // [in] Resource Width
422 uint32_t height, // [in] Resource Height
423 bool compressible, // [in] Flag indaicated reource is compressible or not
424 MOS_RESOURCE_MMC_MODE compressionMode, // [in] Compression mode
425 bool * allocated, // [out] Flag indicating new allocation
426 MOS_HW_RESOURCE_DEF resUsageType = MOS_HW_RESOURCE_DEF_MAX, // [in] resource usage type
427 MOS_TILE_MODE_GMM tileModeByForce = MOS_TILE_UNSET_GMM); // [in] Flag to indicate if GMM flag tile64 need set
428 #endif
429 //!
384430 //! \brief Unified OS fill Resource
385431 //! \details Locks the surface and fills the resource with data
386432 //! \param PMOS_RESOURCE pOsResource
266266 return MOS_STATUS_SUCCESS;
267267 }
268268
269 // for now, Temp removed ARGB input for APG
270 if (pvpParams->pSrc[0]->Format == Format_A8R8G8B8 ||
271 pvpParams->pSrc[0]->Format == Format_X8R8G8B8)
269 // Temp removed RGB input with DN/DI/IECP case
270 if ((IS_RGB_FORMAT(pvpParams->pSrc[0]->Format)) &&
271 (pvpParams->pSrc[0]->pDenoiseParams ||
272 pvpParams->pSrc[0]->pDeinterlaceParams ||
273 pvpParams->pSrc[0]->pProcampParams ||
274 pvpParams->pSrc[0]->pColorPipeParams))
272275 {
273276 return MOS_STATUS_SUCCESS;
274277 }
459462 }
460463 bool VPFeatureManager::IsVeboxInputFormatSupport(PVPHAL_SURFACE pSrcSurface)
461464 {
462 bool bRet = false;
463 VPHAL_RENDER_CHK_NULL_NO_STATUS(pSrcSurface);
465 if (nullptr == pSrcSurface)
466 {
467 VP_PUBLIC_ASSERTMESSAGE("nullptr == pSrcSurface");
468 return false;
469 }
464470
465471 // Check if Sample Format is supported
466472 // Vebox only support P016 format, P010 format can be supported by faking it as P016
473479 pSrcSurface->Format != Format_Y8 &&
474480 pSrcSurface->Format != Format_Y16U &&
475481 pSrcSurface->Format != Format_Y16S &&
476 !IS_PA_FORMAT(pSrcSurface->Format)/* &&
482 !IS_PA_FORMAT(pSrcSurface->Format) &&
483 (pSrcSurface->Format != Format_A8B8G8R8) &&
484 (pSrcSurface->Format != Format_X8B8G8R8) &&
485 (pSrcSurface->Format != Format_A8R8G8B8) &&
486 (pSrcSurface->Format != Format_X8R8G8B8)/* &&
477487 !IS_RGB64_FLOAT_FORMAT(pSrcSurface->Format)*/)
478488 {
479 VPHAL_RENDER_NORMALMESSAGE("Unsupported Source Format '0x%08x' for VEBOX.", pSrcSurface->Format);
480 goto finish;
481 }
482
483 bRet = true;
484
485 finish:
486 return bRet;
489 VP_PUBLIC_NORMALMESSAGE("Unsupported Source Format '0x%08x' for VEBOX.", pSrcSurface->Format);
490 return false;
491 }
492
493 return true;
487494 }
488495 bool VPFeatureManager::IsVeboxRTFormatSupport(
489496 PVPHAL_SURFACE pSrcSurface,
766773 outSurface->Format != Format_Y216 &&
767774 outSurface->Format != Format_Y416)
768775 {
769 if (outSurface->TileType == MOS_TILE_Y &&
770 (outSurface->Format == Format_P010 ||
771 outSurface->Format == Format_P016 ||
776 if ((outSurface->TileType == MOS_TILE_Y ||
777 (MEDIA_IS_SKU(m_hwInterface->m_skuTable, FtrSFCLinearOutputSupport) &&
778 outSurface->TileType == MOS_TILE_LINEAR)) &&
779 (outSurface->Format == Format_P010 ||
780 outSurface->Format == Format_P016 ||
772781 outSurface->Format == Format_NV12))
773782 {
774783 ret = true;
201201 m_sfcCSCParams->iefParams = m_cscParams.pIEFParams;
202202 }
203203
204 m_cscParams.input.colorSpace = GetSfcInputColorSpace(m_executeCaps, m_cscParams.input.colorSpace, m_cscParams.output.colorSpace);
205 m_sfcCSCParams->inputColorSpcase = m_cscParams.input.colorSpace;
204 m_cscParams.input.colorSpace = GetSfcInputColorSpace(m_executeCaps, m_cscParams.input.colorSpace, m_cscParams.output.colorSpace);
205 m_sfcCSCParams->inputColorSpace = m_cscParams.input.colorSpace;
206206
207207 m_cscParams.formatInput = GetSfcInputFormat(m_executeCaps, m_cscParams.formatInput, m_cscParams.output.colorSpace);
208208 m_sfcCSCParams->inputFormat = m_cscParams.formatInput;
209209 m_sfcCSCParams->outputFormat = m_cscParams.formatOutput;
210210
211 if (m_sfcCSCParams->inputColorSpcase != m_cscParams.output.colorSpace)
211 if (m_sfcCSCParams->inputColorSpace != m_cscParams.output.colorSpace)
212212 {
213213 m_sfcCSCParams->bCSCEnabled = true;
214214 }
215215
216216 if (IS_RGB_CSPACE(m_cscParams.input.colorSpace))
217217 {
218 m_sfcCSCParams->bInputColorSpace = true;
218 m_sfcCSCParams->isInputColorSpaceRGB = true;
219219 }
220220 else
221221 {
222 m_sfcCSCParams->bInputColorSpace = false;
222 m_sfcCSCParams->isInputColorSpaceRGB = false;
223223 }
224224
225225 // Set Chromasting Params
253253 MOS_ZeroMemory(m_veboxCSCParams, sizeof(VEBOX_CSC_PARAMS));
254254 }
255255
256 m_veboxCSCParams->inputColorSpcase = m_cscParams.input.colorSpace;
257 m_veboxCSCParams->outputColorSpcase = m_cscParams.output.colorSpace;
256 m_veboxCSCParams->inputColorSpace = m_cscParams.input.colorSpace;
257 m_veboxCSCParams->outputColorSpace = m_cscParams.output.colorSpace;
258258 m_veboxCSCParams->inputFormat = m_cscParams.formatInput;
259259 m_veboxCSCParams->outputFormat = m_cscParams.formatOutput;
260260
139139 struct _SFC_CSC_PARAMS
140140 {
141141 bool bCSCEnabled; // CSC Enabled
142 bool bInputColorSpace; // 0: YUV color space, 1:RGB color space
142 bool isInputColorSpaceRGB; // 0: YUV color space, 1:RGB color space
143143 bool bIEFEnable; // IEF Enabled
144144 bool bChromaUpSamplingEnable; // ChromaUpSampling
145145 bool b8tapChromafiltering; // Enables 8 tap filtering for Chroma Channels
146 VPHAL_CSPACE inputColorSpcase; // Input Color Space
146 VPHAL_CSPACE inputColorSpace; // Input Color Space
147147 MOS_FORMAT inputFormat; // SFC Input Format
148148 MOS_FORMAT outputFormat; // SFC Output Format
149149 PVPHAL_IEF_PARAMS iefParams; // Vphal Params
232232 struct _VEBOX_CSC_PARAMS
233233 {
234234 bool bCSCEnabled; // CSC Enabled
235 VPHAL_CSPACE inputColorSpcase; // Input Color Space
236 VPHAL_CSPACE outputColorSpcase; // Input Color Space
235 VPHAL_CSPACE inputColorSpace; // Input Color Space
236 VPHAL_CSPACE outputColorSpace; // Input Color Space
237237 MOS_FORMAT inputFormat; // Input Format
238238 MOS_FORMAT outputFormat; // Output Format
239239 PVPHAL_ALPHA_PARAMS alphaParams; // Output Alpha Params
224224 m_cscInOffset,
225225 m_cscOutOffset);
226226
227 // swap the 1st and 3rd columns of the transfer matrix for A8R8G8B8 and X8R8G8B8
228 // to ensure SFC input being A8B8G8R8.
229 if (IsInputChannelSwapNeeded(m_renderData.SfcInputFormat))
230 {
231 float fTemp[3] = {};
232 fTemp[0] = m_cscCoeff[0];
233 fTemp[1] = m_cscCoeff[3];
234 fTemp[2] = m_cscCoeff[6];
235
236 m_cscCoeff[0] = m_cscCoeff[2];
237 m_cscCoeff[3] = m_cscCoeff[5];
238 m_cscCoeff[6] = m_cscCoeff[8];
239
240 m_cscCoeff[2] = fTemp[0];
241 m_cscCoeff[5] = fTemp[1];
242 m_cscCoeff[8] = fTemp[2];
243 }
244
227245 m_cscInputCspace = m_renderData.SfcInputCspace;
228246 m_cscRTCspace = m_renderData.pSfcPipeOutSurface->ColorSpace;
229247 }
587605 return true;
588606 }
589607
608 bool SfcRenderBase::IsInputChannelSwapNeeded(MOS_FORMAT inputFormat)
609 {
610 // 1st and 3rd columns of A8R8G8B8 and X8R8G8B8 need be swapped
611 // to ensure SFC input being A8B8G8R8.
612 if (inputFormat == Format_A8R8G8B8 ||
613 inputFormat == Format_X8R8G8B8)
614 {
615 return true;
616 }
617 else
618 {
619 return false;
620 }
621 }
622
590623 MOS_STATUS SfcRenderBase::SetCSCParams(PSFC_CSC_PARAMS cscParams)
591624 {
592625 VP_PUBLIC_CHK_NULL_RETURN(cscParams);
605638 m_renderData.bIEF = false;
606639 m_renderData.pIefParams = nullptr;
607640 }
608 m_renderData.bCSC = cscParams->bCSCEnabled;
609 m_renderData.SfcInputCspace = cscParams->inputColorSpcase;
641 m_renderData.bCSC = IsCscNeeded(*cscParams);
642 m_renderData.SfcInputCspace = cscParams->inputColorSpace;
610643 m_renderData.SfcInputFormat = cscParams->inputFormat;
611644
612 // ARGB8,ABGR10,A16B16G16R16,VYUY and YVYU output format need to enable swap
613 if (cscParams->outputFormat == Format_X8R8G8B8 ||
614 cscParams->outputFormat == Format_A8R8G8B8 ||
615 cscParams->outputFormat == Format_R10G10B10A2 ||
616 cscParams->outputFormat == Format_A16B16G16R16 ||
617 cscParams->outputFormat == Format_VYUY ||
618 cscParams->outputFormat == Format_YVYU)
619 {
620 m_renderData.sfcStateParams->bRGBASwapEnable = true;
621 }
622 else
623 {
624 m_renderData.sfcStateParams->bRGBASwapEnable = false;
625 }
626 m_renderData.sfcStateParams->bInputColorSpace = cscParams->bInputColorSpace;
645 m_renderData.sfcStateParams->bRGBASwapEnable = IsOutputChannelSwapNeeded(cscParams->outputFormat);
646 m_renderData.sfcStateParams->bInputColorSpace = cscParams->isInputColorSpaceRGB;
627647
628648 // Chromasitting config
629649 // VEBOX use polyphase coefficients for 1x scaling for better quality,
456456 MOS_STATUS SetLineBuffer(PMOS_RESOURCE &osResLineBuffer, VP_SURFACE *lineBuffer);
457457
458458 virtual MOS_STATUS SetupScalabilityParams() = 0;
459 virtual bool IsInputChannelSwapNeeded(MOS_FORMAT inputFormat);
460 virtual bool IsOutputChannelSwapNeeded(MOS_FORMAT outputFormat) = 0;
461 virtual bool IsCscNeeded(SFC_CSC_PARAMS &cscParams) = 0;
459462
460463 protected:
461464
5353 //!
5454 typedef struct _VPHAL_SFC_RENDER_DATA
5555 {
56 bool bColorFill; //!< Enable ColorFill
57 bool bScaling; //!< Enable Scaling
58 bool bIEF; //!< Enable IEF filter
59 bool bCSC; //!< Enable CSC filter
60 bool bMirrorEnable; //!< Enable Mirror filter
56 bool bColorFill; //!< Enable ColorFill
57 bool bScaling; //!< Enable Scaling
58 bool bIEF; //!< Enable IEF filter
59 bool bCSC; //!< Enable CSC filter
60 bool bMirrorEnable; //!< Enable Mirror filter
6161
62 float fScaleX; //!< X Scaling ratio
63 float fScaleY; //!< Y Scaling ratio
64 uint16_t wIEFFactor; //!< IEF factor
65 MHW_SFC_STATE_PARAMS *sfcStateParams; //!< Pointer to SFC state params
66 PVPHAL_IEF_PARAMS pIefParams; //!< Pointer to IEF params
67 PMHW_AVS_PARAMS pAvsParams; //!< Pointer to AVS params
68 PSFC_COLORFILL_PARAMS pColorFillParams; //!< Pointer to ColorFill params
69 PVPHAL_ALPHA_PARAMS pAlphaParams; //!< Pointer to Alpha params
70 VPHAL_CSPACE SfcInputCspace; //!< SFC Input Color Space
71 MOS_FORMAT SfcInputFormat; //!< SFC Input Format
72 VPHAL_ROTATION SfcRotation; //!< SFC Rotation Mode
73 uint32_t mirrorType; //!< Mirror Type -- vert/horiz
74 VPHAL_SCALING_MODE SfcScalingMode; //!< SFC Scaling Mode
62 float fScaleX; //!< X Scaling ratio
63 float fScaleY; //!< Y Scaling ratio
64 uint16_t wIEFFactor; //!< IEF factor
65 MHW_SFC_STATE_PARAMS *sfcStateParams; //!< Pointer to SFC state params
66 PVPHAL_IEF_PARAMS pIefParams; //!< Pointer to IEF params
67 PMHW_AVS_PARAMS pAvsParams; //!< Pointer to AVS params
68 PSFC_COLORFILL_PARAMS pColorFillParams; //!< Pointer to ColorFill params
69 PVPHAL_ALPHA_PARAMS pAlphaParams; //!< Pointer to Alpha params
70 VPHAL_CSPACE SfcInputCspace; //!< SFC Input Color Space
71 MOS_FORMAT SfcInputFormat; //!< SFC Input Format
72 VPHAL_ROTATION SfcRotation; //!< SFC Rotation Mode
73 uint32_t mirrorType; //!< Mirror Type -- vert/horiz
74 VPHAL_SCALING_MODE SfcScalingMode; //!< SFC Scaling Mode
7575
76 uint32_t SfcSrcChromaSiting; //!< SFC Source Surface Chroma Siting
76 uint32_t SfcSrcChromaSiting; //!< SFC Source Surface Chroma Siting
7777
78 PVP_SURFACE pSfcPipeOutSurface; //!< SFC Pipe output surface
78 PVP_SURFACE pSfcPipeOutSurface; //!< SFC Pipe output surface
7979
80 bool bForcePolyPhaseCoefs; //!< SFC AVS force polyphase coef
80 bool bForcePolyPhaseCoefs; //!< SFC AVS force polyphase coef
8181 } VP_SFC_RENDER_DATA, *PVP_SFC_RENDER_DATA;
8282
8383 //!
358358
359359 MHW_VEBOX_IECP_PARAMS& veboxIecpParams = pRenderData->GetIECPParams();
360360
361 if (m_CscInputCspace != cscParams->inputColorSpcase ||
362 m_CscOutputCspace != cscParams->outputColorSpcase)
361 if (m_CscInputCspace != cscParams->inputColorSpace ||
362 m_CscOutputCspace != cscParams->outputColorSpace)
363363 {
364364 VeboxGetBeCSCMatrix(
365 cscParams->inputColorSpcase,
366 cscParams->outputColorSpcase,
365 cscParams->inputColorSpace,
366 cscParams->outputColorSpace,
367367 cscParams->inputFormat);
368368
369 m_CscInputCspace = cscParams->inputColorSpcase;
370 m_CscOutputCspace = cscParams->outputColorSpcase;
369 m_CscInputCspace = cscParams->inputColorSpace;
370 m_CscOutputCspace = cscParams->outputColorSpace;
371371 }
372372
373373 if (m_PacketCaps.bVebox &&
5656 MOS_Delete(m_kernelSet);
5757 MOS_Delete(m_paramChecker);
5858 MOS_Delete(m_mmc);
59 #if (_DEBUG || _RELEASE_INTERNAL)
60 DestroySurface();
61 #endif
5962 MOS_Delete(m_allocator);
6063 MOS_Delete(m_statusReport);
6164 MOS_Delete(m_packetSharedContext);
8285
8386 return MOS_STATUS_SUCCESS;
8487 }
88
89 #if (_DEBUG || _RELEASE_INTERNAL)
90 MOS_STATUS VpPipeline::DestroySurface()
91 {
92 if (m_tempTargetSurface)
93 {
94 m_allocator->FreeResource(&m_tempTargetSurface->OsResource);
95 MOS_FreeMemAndSetNull(m_tempTargetSurface);
96 }
97
98 return MOS_STATUS_SUCCESS;
99 }
100 #endif
85101
86102 MOS_STATUS VpPipeline::UserFeatureReport()
87103 {
167183
168184 #if (_DEBUG || _RELEASE_INTERNAL)
169185 VP_DEBUG_INTERFACE_CREATE(m_debugInterface)
186 SkuWaTable_DUMP_XML(m_skuTable, m_waTable)
170187 #endif
171188
172189 m_pPacketFactory = MOS_New(PacketFactory, m_vpMhwInterface.m_vpPlatformInterface);
256273
257274 m_pPacketPipeFactory->ReturnPacketPipe(pPacketPipe);
258275
259 if (eStatus)
276 if (MOS_SUCCEEDED(eStatus))
260277 {
261278 VP_PUBLIC_CHK_STATUS(UpdateExecuteStatus());
262279 }
277294
278295 MOS_STATUS VpPipeline::UpdateExecuteStatus()
279296 {
280 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
281
297 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
282298 if (PIPELINE_PARAM_TYPE_LEGACY == m_pvpParams.type)
283299 {
284300 PVP_PIPELINE_PARAMS params = m_pvpParams.renderParams;
296312 bool uiForceDecompressedOutput = false;
297313 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
298314
299 eStatus = MOS_UserFeature_ReadValue_ID(
315 MOS_STATUS eStatus1 = MOS_UserFeature_ReadValue_ID(
300316 nullptr,
301317 __VPHAL_RNDR_FORCE_VP_DECOMPRESSED_OUTPUT_ID,
302318 &userFeatureData,
303319 m_osInterface->pOsContext);
304320
305 if (eStatus == MOS_STATUS_SUCCESS)
321 if (eStatus1 == MOS_STATUS_SUCCESS)
306322 {
307323 uiForceDecompressedOutput = userFeatureData.u32Data;
308324 }
460476 return MOS_STATUS_SUCCESS;
461477 }
462478
479 #if (_DEBUG || _RELEASE_INTERNAL)
480 VPHAL_SURFACE *VpPipeline::AllocateTempTargetSurface(VPHAL_SURFACE *m_tempTargetSurface)
481 {
482 m_tempTargetSurface = (VPHAL_SURFACE *)MOS_AllocAndZeroMemory(sizeof(VPHAL_SURFACE));
483 if (!m_tempTargetSurface)
484 {
485 return nullptr;
486 }
487 return m_tempTargetSurface;
488 }
489 #endif
490
491 #if (_DEBUG || _RELEASE_INTERNAL)
492 MOS_STATUS VpPipeline::SurfaceReplace(PVP_PIPELINE_PARAMS params)
493 {
494 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
495 bool allocated;
496 MOS_USER_FEATURE_VALUE_DATA userFeatureData = {0};
497
498 MEDIA_FEATURE_TABLE *skuTable = nullptr;
499 skuTable = m_vpMhwInterface.m_osInterface->pfnGetSkuTable(m_vpMhwInterface.m_osInterface);
500 VP_PUBLIC_CHK_NULL_RETURN(skuTable);
501
502 MOS_UserFeature_ReadValue_ID(
503 nullptr,
504 __VPHAL_ENABLE_SFC_NV12_P010_LINEAR_OUTPUT_ID,
505 &userFeatureData,
506 m_vpMhwInterface.m_osInterface->pOsContext);
507
508 if (userFeatureData.bData &&
509 MOS_TILE_LINEAR != params->pTarget[0]->TileType &&
510 (Format_P010 == params->pTarget[0]->Format || Format_NV12 == params->pTarget[0]->Format) &&
511 MEDIA_IS_SKU(skuTable, FtrSFCLinearOutputSupport))
512 {
513 if (!m_tempTargetSurface)
514 {
515 m_tempTargetSurface = AllocateTempTargetSurface(m_tempTargetSurface);
516 }
517 VP_PUBLIC_CHK_NULL_RETURN(m_tempTargetSurface);
518 eStatus = m_allocator->ReAllocateSurface(
519 m_tempTargetSurface,
520 "TempTargetSurface",
521 params->pTarget[0]->Format,
522 MOS_GFXRES_2D,
523 MOS_TILE_LINEAR,
524 params->pTarget[0]->dwWidth,
525 params->pTarget[0]->dwHeight,
526 false,
527 MOS_MMC_DISABLED,
528 &allocated);
529
530 m_tempTargetSurface->ColorSpace = params->pTarget[0]->ColorSpace;
531 m_tempTargetSurface->rcSrc = params->pTarget[0]->rcSrc;
532 m_tempTargetSurface->rcDst = params->pTarget[0]->rcDst;
533 m_tempTargetSurface->rcMaxSrc = params->pTarget[0]->rcMaxSrc;
534
535 if (eStatus == MOS_STATUS_SUCCESS)
536 {
537 params->pTarget[0] = m_tempTargetSurface; //params is the copy of pcRenderParams which will not cause the memleak,
538 }
539 }
540 return eStatus;
541 }
542 #endif
543
463544 MOS_STATUS VpPipeline::PrepareVpPipelineParams(PVP_PIPELINE_PARAMS params)
464545 {
465546 VP_FUNC_CALL();
466547 VP_PUBLIC_CHK_NULL_RETURN(params);
548
549 #if (_DEBUG || _RELEASE_INTERNAL)
550 SurfaceReplace(params); // replace output surface from Tile-Y to Linear
551 #endif
467552
468553 if ((m_vpMhwInterface.m_osInterface != nullptr))
469554 {
00 /*
1 * Copyright (c) 2018-2020, Intel Corporation
1 * Copyright (c) 2018-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
116116 virtual MOS_STATUS Destroy() override;
117117
118118 //!
119 //! \brief Destory the tempSurface and release internal resources
120 //! \return MOS_STATUS
121 //! MOS_STATUS_SUCCESS if success, else fail reason
122 //!
123 #if (_DEBUG || _RELEASE_INTERNAL)
124 MOS_STATUS DestroySurface();
125 #endif
126
127 //!
119128 //! \brief get Status Report Table
120129 //! \return PVPHAL_STATUS_TABLE
121130 //! Pointers to status Table
149158 //!
150159 bool IsVeboxSfcFormatSupported(MOS_FORMAT formatInput, MOS_FORMAT formatOutput);
151160
161 //!
162 //! \brief replace output surface from Tile-Y to Linear
163 //! \param [in] params
164 //! Pointer to VP pipeline params
165 //! \return MOS_STATUS
166 //! MOS_STATUS_SUCCESS if success, else fail reason
167 //!
168 #if (_DEBUG || _RELEASE_INTERNAL)
169 MOS_STATUS SurfaceReplace(PVP_PIPELINE_PARAMS params);
170 #endif
171
172 // for debug purpose
173 #if (_DEBUG || _RELEASE_INTERNAL)
174 virtual VPHAL_SURFACE *AllocateTempTargetSurface(VPHAL_SURFACE *m_tempTargetSurface);
175 #endif
176
152177 protected:
153178
154179 //!
276301 VPFeatureManager *m_paramChecker = nullptr;
277302 VP_PACKET_SHARED_CONTEXT *m_packetSharedContext = nullptr;
278303 VpInterface *m_vpInterface = nullptr;
304 #if (_DEBUG || _RELEASE_INTERNAL)
305 VPHAL_SURFACE *m_tempTargetSurface = nullptr;
306 #endif
279307 };
280308
281309 struct _VP_SFC_PACKET_PARAMS
00 /*
1 * Copyright (c) 2020, Intel Corporation
1 * Copyright (c) 2020-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
7878
7979 void VpDebugInterface::DumpToXML(PVPHAL_RENDER_PARAMS pRenderParams, uint32_t framecounter)
8080 {
81 if (m_surfaceDumper && m_surfaceDumper)
81 if (m_surfaceDumper && m_parameterDumper)
8282 {
8383 m_parameterDumper->DumpToXML(
8484 framecounter,
8585 m_surfaceDumper->m_dumpSpec.pcOutputPath,
8686 pRenderParams);
87 }
88 }
89
90 void VpDebugInterface::SkuWa_DumpToXML(MEDIA_FEATURE_TABLE *skuTable, MEDIA_WA_TABLE *waTable)
91 {
92 if (m_parameterDumper)
93 {
94 m_parameterDumper->SkuWa_DumpToXML(
95 skuTable,
96 waTable);
8797 }
8898 }
8999
00 /*
1 * Copyright (c) 2020, Intel Corporation
1 * Copyright (c) 2020-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
4646 PVPHAL_RENDER_PARAMS pRenderParams,
4747 uint32_t framecounter);
4848
49 void SkuWa_DumpToXML(
50 MEDIA_FEATURE_TABLE *skuTable,
51 MEDIA_WA_TABLE *waTable);
52
4953 MOS_STATUS DumpVpSurfaceArray(
5054 PVPHAL_SURFACE *ppSurfaces,
5155 uint32_t uiMaxSurfaces,
00 /*
1 * Copyright (c) 2018-2019, Intel Corporation
1 * Copyright (c) 2018-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
14931493 }
14941494 }
14951495 #endif
1496
1497 // Get enableSkuWaDump
1498 MOS_ZeroMemory(&UserFeatureData, sizeof(UserFeatureData));
1499 MOS_USER_FEATURE_INVALID_KEY_ASSERT(MOS_UserFeature_ReadValue_ID(
1500 nullptr,
1501 __VPHAL_DBG_PARA_DUMP_ENABLE_SKUWA_DUMP_ID,
1502 &UserFeatureData,
1503 m_osInterface->pOsContext));
1504 pDumpSpec->enableSkuWaDump = UserFeatureData.u32Data;
14961505
14971506 if ((eStatus != MOS_STATUS_SUCCESS) || (!bDumpEnabled))
14981507 {
00 /*
1 * Copyright (c) 2018-2019, Intel Corporation
1 * Copyright (c) 2018-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
121121 MOS_Delete(debuginterface); \
122122 debuginterface = nullptr;
123123
124 //------------------------------------------------------------------------------
125 // Dump macro for dumper. Dump Sku and workaround information.
126 //------------------------------------------------------------------------------
127 #define SkuWaTable_DUMP_XML(skuTable, waTable) \
128 m_debugInterface->SkuWa_DumpToXML( \
129 skuTable, \
130 waTable);
131
124132 //!
125133 //! Structure VPHAL_DBG_SURF_DUMP_SURFACE_DEF
126134 //! \brief Plane definition
202210 char outFileLocation[MAX_PATH]; // Location where dump files need to be stored
203211 uint32_t uiStartFrame; // Start frame for dumping
204212 uint32_t uiEndFrame; // End Frame for dumping
213 uint32_t enableSkuWaDump; // Enable sku and wa info dump
205214 };
206215
207216 //==<FUNCTIONS>=================================================================
467476 char *pcOutputPath,
468477 PVPHAL_RENDER_PARAMS pRenderParams);
469478
479 //!
480 //! \brief Dumps Sku and Workaround information to XML File
481 //!
482 virtual MOS_STATUS SkuWa_DumpToXML(
483 MEDIA_FEATURE_TABLE *skuTable,
484 MEDIA_WA_TABLE *waTable);
485
470486 protected:
471487 //!
472488 //! \brief Dumps the source Surface Parameters
758774 #define VP_PARAMETERS_DUMPPER_DESTORY(pParametersDumpSpec)
759775 #define VP_DEBUG_INTERFACE_CREATE(debuginterface)
760776 #define VP_DEBUG_INTERFACE_DESTROY(debuginterface)
761
777 #define SkuWaTable_DUMP_XML(skuTable, waTable)
762778 #endif // (!(_DEBUG || _RELEASE_INTERNAL) || EMUL)
763779
764780
00 /*
1 * Copyright (c) 2019-2020, Intel Corporation
1 * Copyright (c) 2019-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
4545 DECODE_CHK_NULL(cmdBuffer);
4646 DECODE_CHK_NULL(m_hwInterface);
4747
48 DECODE_CHK_STATUS(m_miInterface->SetWatchdogTimerThreshold(
48 int16_t tileIdx = m_av1BasicFeature->m_tileCoding.m_curTile;
49 m_isLastTileInPartialFrm = (tileIdx == int16_t(m_av1BasicFeature->m_tileCoding.m_lastTileId)) ? 1 : 0;
50 m_isFirstTileInPartialFrm = (tileIdx == int16_t(m_av1BasicFeature->m_tileCoding.m_lastTileId
51 - m_av1BasicFeature->m_tileCoding.m_numTiles + 1)) ? 1 : 0;
52
53 // For frame based submission mode, these cmds only need to be programed once per frame, otherwise need program per tile.
54 if (m_isFirstTileInPartialFrm || m_av1Pipeline->TileBasedDecodingInuse())
55 {
56 DECODE_CHK_STATUS(m_miInterface->SetWatchdogTimerThreshold(
4957 m_av1BasicFeature->m_width, m_av1BasicFeature->m_height, false));
50 DECODE_CHK_STATUS(Mos_Solo_PreProcessDecode(m_osInterface, &m_av1BasicFeature->m_destSurface));
51
52 SetPerfTag(CODECHAL_DECODE_MODE_AV1VLD, m_av1BasicFeature->m_pictureCodingType);
53
54 auto mmioRegisters = m_hwInterface->GetMfxInterface()->GetMmioRegisters(MHW_VDBOX_NODE_1);
55 HalOcaInterface::On1stLevelBBStart(*cmdBuffer, *m_osInterface->pOsContext, m_osInterface->CurrentGpuContextHandle, *m_miInterface, *mmioRegisters);
58
59 DECODE_CHK_STATUS(Mos_Solo_PreProcessDecode(m_osInterface, &m_av1BasicFeature->m_destSurface));
60
61 SetPerfTag(CODECHAL_DECODE_MODE_AV1VLD, m_av1BasicFeature->m_pictureCodingType);
62
63 auto mmioRegisters = m_hwInterface->GetMfxInterface()->GetMmioRegisters(MHW_VDBOX_NODE_1);
64 HalOcaInterface::On1stLevelBBStart(*cmdBuffer, *m_osInterface->pOsContext, m_osInterface->CurrentGpuContextHandle, *m_miInterface, *mmioRegisters);
65 }
5666
5767 DECODE_CHK_STATUS(PackPictureLevelCmds(*cmdBuffer));
5868 DECODE_CHK_STATUS(PackTileLevelCmds(*cmdBuffer));
5969
60 HalOcaInterface::On1stLevelBBEnd(*cmdBuffer, *m_osInterface);
70 if (m_isLastTileInPartialFrm || m_av1Pipeline->TileBasedDecodingInuse())
71 {
72 HalOcaInterface::On1stLevelBBEnd(*cmdBuffer, *m_osInterface);
73 }
74
75 if (m_isFirstTileInPartialFrm || m_av1Pipeline->TileBasedDecodingInuse())
76 {
77 DECODE_CHK_STATUS(m_allocator->SyncOnResource(&m_av1BasicFeature->m_resDataBuffer, false));
78 }
6179
6280 m_av1BasicFeature->m_tileCoding.m_curTile++; //Update tile index of current frame
63
64 DECODE_CHK_STATUS(m_allocator->SyncOnResource(&m_av1BasicFeature->m_resDataBuffer, false));
6581
6682 //Set ReadyToExecute to true for the last tile of the frame
6783 Mos_Solo_SetReadyToExecute(m_osInterface, m_av1BasicFeature->m_frameCompletedFlag);
97113
98114 PERF_UTILITY_AUTO(__FUNCTION__, PERF_DECODE, PERF_LEVEL_HAL);
99115
100 if (IsPrologRequired())
101 {
102 DECODE_CHK_STATUS(AddForceWakeup(cmdBuffer));
103 DECODE_CHK_STATUS(SendPrologWithFrameTracking(cmdBuffer, true));
104 }
105
106 DECODE_CHK_STATUS(StartStatusReport(statusReportMfx, &cmdBuffer));
107
108 if (m_av1BasicFeature->m_usingDummyWl && (m_av1Pipeline->TileBasedDecodingInuse() ||
109 (m_av1BasicFeature->m_tileCoding.m_curTile == (m_av1BasicFeature->m_tileCoding.m_lastTileId
110 - m_av1BasicFeature->m_tileCoding.m_numTiles + 1))))
116 if (m_isFirstTileInPartialFrm || m_av1Pipeline->TileBasedDecodingInuse())
117 {
118 if (IsPrologRequired())
119 {
120 DECODE_CHK_STATUS(AddForceWakeup(cmdBuffer));
121 DECODE_CHK_STATUS(SendPrologWithFrameTracking(cmdBuffer, true));
122 }
123 DECODE_CHK_STATUS(StartStatusReport(statusReportMfx, &cmdBuffer));
124 }
125
126 if (m_av1BasicFeature->m_usingDummyWl && (m_av1Pipeline->TileBasedDecodingInuse() || m_isFirstTileInPartialFrm))
111127 {
112128 DECODE_CHK_STATUS(InitDummyWL(cmdBuffer));
113129 }
114130
115 DECODE_CHK_STATUS(m_picturePkt->Execute(cmdBuffer));
131 // For multiple tiles per frame case, picture level command is same between different tiles, so put them into 2nd
132 // level BB to exectue picture level cmd only once for 1st tile of the frame and reduce SW latency eventually.
133 if (!(m_av1PicParams->m_picInfoFlags.m_fields.m_largeScaleTile) && !m_av1Pipeline->TileBasedDecodingInuse())
134 {
135 if (m_isFirstTileInPartialFrm)
136 {
137 m_batchBuf = m_secondLevelBBArray->Fetch();
138
139 if (m_batchBuf != nullptr)
140 {
141 ResourceAutoLock resLock(m_allocator, &m_batchBuf->OsResource);
142 uint8_t *batchBufBase = (uint8_t *)resLock.LockResouceForWrite();
143 DECODE_CHK_STATUS(InitPicLevelCmdBuffer(*m_batchBuf, batchBufBase));
144 DECODE_CHK_STATUS(m_picturePkt->Execute(m_picCmdBuffer));
145 DECODE_CHK_STATUS(m_miInterface->AddMiBatchBufferEnd(&m_picCmdBuffer, nullptr));
146 }
147 }
148 DECODE_CHK_STATUS(m_miInterface->AddMiBatchBufferStartCmd(&cmdBuffer, m_batchBuf));
149 }
150 else
151 {
152 DECODE_CHK_STATUS(m_picturePkt->Execute(cmdBuffer));
153 }
116154
117155 return MOS_STATUS_SUCCESS;
118156 }
181219 DECODE_CHK_STATUS(m_tilePkt->Execute(cmdBuffer, tileIdx));
182220 }
183221
184 DECODE_CHK_STATUS(VdMemoryFlush(cmdBuffer));
185 DECODE_CHK_STATUS(VdPipelineFlush(cmdBuffer));
186
187 DECODE_CHK_STATUS(EnsureAllCommandsExecuted(cmdBuffer));
188 DECODE_CHK_STATUS(EndStatusReport(statusReportMfx, &cmdBuffer));
189
222 if (m_isLastTileInPartialFrm || m_av1Pipeline->TileBasedDecodingInuse())
223 {
224 DECODE_CHK_STATUS(VdMemoryFlush(cmdBuffer));
225 DECODE_CHK_STATUS(VdPipelineFlush(cmdBuffer));
226 DECODE_CHK_STATUS(EnsureAllCommandsExecuted(cmdBuffer));
227 DECODE_CHK_STATUS(EndStatusReport(statusReportMfx, &cmdBuffer));
228 }
229
230 // For film grain frame, apply noise packet should update report global count
190231 bool isLastTileInFullFrm = (tileIdx == int16_t(m_av1BasicFeature->m_tileCoding.m_totalTileNum) - 1) ? 1 : 0;
191 bool isLastTileInPartialFrm = (tileIdx == int16_t(m_av1BasicFeature->m_tileCoding.m_lastTileId)) ? 1 : 0;
192
193 // For film grain frame, apply noise packet should update report global count
194232 if (isLastTileInFullFrm && !m_av1BasicFeature->m_filmGrainEnabled)
195233 {
196234 DECODE_CHK_STATUS(UpdateStatusReport(statusReportGlobalCount, &cmdBuffer));
208246 }
209247 })
210248
211 if (isLastTileInPartialFrm || m_av1Pipeline->TileBasedDecodingInuse())
249 if (m_isLastTileInPartialFrm || m_av1Pipeline->TileBasedDecodingInuse())
212250 {
213251 DECODE_CHK_STATUS(m_miInterface->AddMiBatchBufferEnd(&cmdBuffer, nullptr));
214252 }
00 /*
1 * Copyright (c) 2019, Intel Corporation
1 * Copyright (c) 2019-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
4949 DECODE_CHK_STATUS(AddAvpPicStateCmd(cmdBuffer));
5050 DECODE_CHK_STATUS(AddAvpInterPredStateCmd(cmdBuffer));
5151 DECODE_CHK_STATUS(AddAvpSegmentStateCmd(cmdBuffer));
52 DECODE_CHK_STATUS(AddAvpInloopFilterStateCmd(cmdBuffer));
5352
5453 return MOS_STATUS_SUCCESS;
5554 }
6867 return MOS_STATUS_SUCCESS;
6968 }
7069
71 void Av1DecodePicPktG12::SetAvpPipeModeSelectParams(MHW_VDBOX_PIPE_MODE_SELECT_PARAMS_G12& pipeModeSelectParams)
72 {
73 DECODE_FUNC_CALL();
74
75 Av1DecodePicPkt::SetAvpPipeModeSelectParams(pipeModeSelectParams);
76 }
77
7870 MOS_STATUS Av1DecodePicPktG12::AddAvpPipeModeSelectCmd(MOS_COMMAND_BUFFER &cmdBuffer)
7971 {
8072 DECODE_FUNC_CALL();
8173
8274 MHW_VDBOX_PIPE_MODE_SELECT_PARAMS_G12 pipeModeSelectParams;
8375 pipeModeSelectParams ={};
84 SetAvpPipeModeSelectParams(pipeModeSelectParams);
76 Av1DecodePicPkt::SetAvpPipeModeSelectParams(pipeModeSelectParams);
8577 DECODE_CHK_STATUS(m_avpInterface->AddAvpPipeModeSelectCmd(&cmdBuffer, &pipeModeSelectParams));
8678
8779 return MOS_STATUS_SUCCESS;
119111 return MOS_STATUS_SUCCESS;
120112 }
121113
122 MOS_STATUS Av1DecodePicPktG12::SetAvpPicStateParams(MhwVdboxAvpPicStateParams& picStateParams)
123 {
124 DECODE_FUNC_CALL();
125
126 DECODE_CHK_STATUS(Av1DecodePicPkt::SetAvpPicStateParams(picStateParams));
127
128 return MOS_STATUS_SUCCESS;
129 }
130
131 MOS_STATUS Av1DecodePicPktG12::SetInterPredStateParams(MhwVdboxAvpPicStateParams& picStateParams)
132 {
133 DECODE_FUNC_CALL();
134
135 DECODE_CHK_STATUS(Av1DecodePicPkt::SetAvpInterPredStateParams(picStateParams));
136
137 return MOS_STATUS_SUCCESS;
138 }
139
140 MOS_STATUS Av1DecodePicPktG12::SetInloopFilterStateParams(MhwVdboxAvpPicStateParams& picStateParams)
141 {
142 DECODE_FUNC_CALL();
143
144 DECODE_CHK_STATUS(Av1DecodePicPkt::SetInloopFilterStateParams(picStateParams));
145
146 return MOS_STATUS_SUCCESS;
147 }
148114
149115 MOS_STATUS Av1DecodePicPktG12::AddAvpInterPredStateCmd(MOS_COMMAND_BUFFER &cmdBuffer)
150116 {
151117 DECODE_FUNC_CALL();
152118
153119 MhwVdboxAvpPicStateParams picStateParams;
154 DECODE_CHK_STATUS(SetInterPredStateParams(picStateParams));
120 DECODE_CHK_STATUS(Av1DecodePicPkt::SetAvpInterPredStateParams(picStateParams));
155121 DECODE_CHK_STATUS(m_avpInterface->AddAvpInterPredStateCmd(&cmdBuffer, &picStateParams));
156122
157123 return MOS_STATUS_SUCCESS;
164130 MhwVdboxAvpPicStateParams picStateParams;
165131 DECODE_CHK_STATUS(SetAvpPicStateParams(picStateParams));
166132 DECODE_CHK_STATUS(m_avpInterface->AddAvpDecodePicStateCmd(&cmdBuffer, &picStateParams));
167
168 return MOS_STATUS_SUCCESS;
169 }
170
171 MOS_STATUS Av1DecodePicPktG12::AddAvpInloopFilterStateCmd(MOS_COMMAND_BUFFER &cmdBuffer)
172 {
173 DECODE_FUNC_CALL();
174
175 MhwVdboxAvpPicStateParams picStateParams;
176 DECODE_CHK_STATUS(SetInloopFilterStateParams(picStateParams));
177 DECODE_CHK_STATUS(m_avpInterface->AddAvpInloopFilterStateCmd(&cmdBuffer, &picStateParams));
178133
179134 return MOS_STATUS_SUCCESS;
180135 }
00 /*
1 * Copyright (c) 2019-2020, Intel Corporation
1 * Copyright (c) 2019-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
5555
5656 protected:
5757 virtual MOS_STATUS VdInit(MOS_COMMAND_BUFFER &cmdBuffer);
58
59 virtual void SetAvpPipeModeSelectParams(
60 MHW_VDBOX_PIPE_MODE_SELECT_PARAMS_G12 &vdboxPipeModeSelectParams) override;
6158 virtual MOS_STATUS AddAvpPipeModeSelectCmd(MOS_COMMAND_BUFFER &cmdBuffer) override;
6259
6360 virtual MOS_STATUS AddAvpPipeBufAddrCmd(MOS_COMMAND_BUFFER &cmdBuffer) override;
6461 MOS_STATUS SetSurfaceMmcState(MhwVdboxAvpPipeBufAddrParams& pipeBufAddrParams);
6562
66 virtual MOS_STATUS SetAvpPicStateParams(MhwVdboxAvpPicStateParams &picStateParams) override;
67 virtual MOS_STATUS SetInterPredStateParams(MhwVdboxAvpPicStateParams &picStateParams);
68 virtual MOS_STATUS SetInloopFilterStateParams(MhwVdboxAvpPicStateParams &picStateParams) override;
6963 virtual MOS_STATUS AddAvpInterPredStateCmd(MOS_COMMAND_BUFFER &cmdBuffer);
7064 virtual MOS_STATUS AddAvpPicStateCmd(MOS_COMMAND_BUFFER &cmdBuffer);
71 virtual MOS_STATUS AddAvpInloopFilterStateCmd(MOS_COMMAND_BUFFER &cmdBuffer);
7265
7366 //!
7467 //! \brief Calculate picture state command size
2828
2929 namespace decode
3030 {
31 MOS_STATUS Av1DecodeTilePktG12::Execute(MOS_COMMAND_BUFFER& cmdBuffer, int16_t tileIdx)
32 {
33 //AV1 Tile Level Commands
34 DECODE_CHK_STATUS(AddAvpInloopFilterStateCmd(cmdBuffer));
35 DECODE_CHK_STATUS(AddAvpTileState(cmdBuffer, tileIdx));
36 DECODE_CHK_STATUS(AddBsdObj(cmdBuffer, tileIdx));
3137
32 Av1DecodeTilePktG12::~Av1DecodeTilePktG12()
33 {
34
38 return MOS_STATUS_SUCCESS;
39 }
3540 }
36
37 MOS_STATUS Av1DecodeTilePktG12::Execute(MOS_COMMAND_BUFFER& cmdBuffer, int16_t tileIdx)
38 {
39 //AV1 Tile Level Commands
40 DECODE_CHK_STATUS(AddAvpTileState(cmdBuffer, tileIdx));
41 DECODE_CHK_STATUS(AddBsdObj(cmdBuffer, tileIdx));
42
43 return MOS_STATUS_SUCCESS;
44 }
45
46 }
4242 : Av1DecodeTilePkt(pipeline, hwInterface)
4343 {
4444 }
45 virtual ~Av1DecodeTilePktG12();
45 virtual ~Av1DecodeTilePktG12() {};
4646
4747 MOS_STATUS Execute(MOS_COMMAND_BUFFER& cmdBuffer, int16_t tileIdx) override;
4848
7070 DECODE_CHK_NULL(basicFeature);
7171
7272 DecodeScalabilityPars scalPars;
73 MOS_ZeroMemory(&scalPars, sizeof(ScalabilityPars));
73 MOS_ZeroMemory(&scalPars, sizeof(scalPars));
7474 scalPars.disableScalability = true;
7575 scalPars.enableVE = MOS_VE_SUPPORTED(m_osInterface);
7676 if (MEDIA_IS_SKU(m_skuTable, FtrWithSlimVdbox))
192192 CodechalDbgAttr::attrFilmGrain,
193193 "FilmGrain"));)
194194 }
195
196 CODECHAL_DEBUG_TOOL(
197 PMHW_BATCH_BUFFER batchBuffer = m_av1DecodePkt->GetSecondLvlBB();
198 batchBuffer->iLastCurrent = batchBuffer->iSize;
199 batchBuffer->dwOffset = 0;
200 DECODE_CHK_STATUS(m_debugInterface->Dump2ndLvlBatch(
201 batchBuffer,
202 CODECHAL_NUM_MEDIA_STATES,
203 "AV1_DEC_Secondary"));)
195204
196205 // Only update user features for the first frame.
197206 if (feature->m_frameNum == 0)
00 /*
1 * Copyright (c) 2020, Intel Corporation
1 * Copyright (c) 2020-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
113113
114114 void FilmGrainPostSubPipeline::InitScalabilityPars(PMOS_INTERFACE osInterface)
115115 {
116 MOS_ZeroMemory(&m_decodeScalabilityPars, sizeof(ScalabilityPars));
116 MOS_ZeroMemory(&m_decodeScalabilityPars, sizeof(m_decodeScalabilityPars));
117117 m_decodeScalabilityPars.disableScalability = true;
118118 m_decodeScalabilityPars.disableRealTile = true;
119119 m_decodeScalabilityPars.enableVE = MOS_VE_SUPPORTED(osInterface);
00 /*
1 * Copyright (c) 2020, Intel Corporation
1 * Copyright (c) 2020-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
150150
151151 void FilmGrainPreSubPipeline::InitScalabilityPars(PMOS_INTERFACE osInterface)
152152 {
153 MOS_ZeroMemory(&m_decodeScalabilityPars, sizeof(ScalabilityPars));
153 MOS_ZeroMemory(&m_decodeScalabilityPars, sizeof(m_decodeScalabilityPars));
154154 m_decodeScalabilityPars.disableScalability = true;
155155 m_decodeScalabilityPars.disableRealTile = true;
156156 m_decodeScalabilityPars.enableVE = MOS_VE_SUPPORTED(osInterface);
00 /*
1 * Copyright (c) 2018-2020, Intel Corporation
1 * Copyright (c) 2018-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
7878 //! Pointer to VPHAL_FEATURE_REPOR: rendering features reported
7979 //!
8080 virtual VphalFeatureReport* GetRenderFeatureReport() override;
81
82 protected:
83 virtual bool IsApoEnabled() override
84 {
85 return true;
86 }
87
8188 };
8289 #endif // !__VP_PIPELINE_ADAPTER_G12_H__
8390
238238
239239 return eStatus;
240240 }
241
242 bool SfcRenderM12::IsOutputChannelSwapNeeded(MOS_FORMAT outputFormat)
243 {
244 // ARGB8,ABGR10, output format need to enable swap
245 // Only be used with RGB output formats and CSC conversion is turned on.
246 if (outputFormat == Format_X8R8G8B8 ||
247 outputFormat == Format_A8R8G8B8 ||
248 outputFormat == Format_R10G10B10A2)
249 {
250 return true;
251 }
252 else
253 {
254 return false;
255 }
256 }
257
258 bool SfcRenderM12::IsCscNeeded(SFC_CSC_PARAMS &cscParams)
259 {
260 return cscParams.bCSCEnabled ||
261 IsInputChannelSwapNeeded(cscParams.inputFormat) ||
262 IsOutputChannelSwapNeeded(cscParams.outputFormat);
263 }
8080 virtual MOS_STATUS SetCodecPipeMode(CODECHAL_STANDARD codecStandard);
8181
8282 virtual MOS_STATUS SetupScalabilityParams();
83
84 virtual bool IsOutputChannelSwapNeeded(MOS_FORMAT outputFormat);
85 virtual bool IsCscNeeded(SFC_CSC_PARAMS &cscParams);
8386 };
8487
8588 }
00 /*
1 * Copyright (c) 2020, Intel Corporation
1 * Copyright (c) 2020-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
3636 PVP_MHWINTERFACE hwInterface) :
3737 VPFeatureManager(hwInterface)
3838 {
39 }
40
41 bool VPFeatureManagerM12_0::IsVeboxInputFormatSupport(PVPHAL_SURFACE pSrcSurface)
42 {
43 bool bRet = false;
44 VPHAL_RENDER_CHK_NULL_NO_STATUS(pSrcSurface);
45
46 // Check if Sample Format is supported
47 // Vebox only support P016 format, P010 format can be supported by faking it as P016
48 if (pSrcSurface->Format != Format_NV12 &&
49 pSrcSurface->Format != Format_AYUV &&
50 pSrcSurface->Format != Format_P010 &&
51 pSrcSurface->Format != Format_P016 &&
52 pSrcSurface->Format != Format_P210 &&
53 pSrcSurface->Format != Format_P216 &&
54 pSrcSurface->Format != Format_Y8 &&
55 pSrcSurface->Format != Format_Y16U &&
56 pSrcSurface->Format != Format_Y16S &&
57 !IS_PA_FORMAT(pSrcSurface->Format)/* &&
58 !IS_RGB64_FLOAT_FORMAT(pSrcSurface->Format)*/)
59 {
60 VPHAL_RENDER_NORMALMESSAGE("Unsupported Source Format '0x%08x' for VEBOX.", pSrcSurface->Format);
61 goto finish;
62 }
63
64 bRet = true;
65
66 finish:
67 return bRet;
3968 }
4069
4170 MOS_STATUS VPFeatureManagerM12_0::CheckFeatures(void * params, bool &bApgFuncSupported)
00 /*
1 * Copyright (c) 2020, Intel Corporation
1 * Copyright (c) 2020-2021, Intel Corporation
22 *
33 * Permission is hereby granted, free of charge, to any person obtaining a
44 * copy of this software and associated documentation files (the "Software"),
5656 //! MOS_STATUS_SUCCESS if success, else fail reason
5757 //!
5858 virtual MOS_STATUS CheckFeatures(void *params, bool &bapgFuncSupported);
59
60 protected:
61 virtual bool IsVeboxInputFormatSupport(PVPHAL_SURFACE pSrcSurface);
5962 };
6063
6164 }
1818 # OTHER DEALINGS IN THE SOFTWARE.
1919
2020 media_include_subdirectory(os)
21 media_include_subdirectory(cp)
21 media_include_subdirectory(cp)
22 media_include_subdirectory(vp)
10371037 skipSyncBoList.push_back(alloc_bo);
10381038 }
10391039
1040 MOS_TraceEventExt(EVENT_MOS_BATCH_SUBMIT, EVENT_TYPE_INFO,
1041 &alloc_bo->handle,
1042 sizeof(alloc_bo->handle),
1043 &currentPatch->uiWriteOperation,
1044 sizeof(currentPatch->uiWriteOperation));
1040 #if (_DEBUG || _RELEASE_INTERNAL)
1041 {
1042 uint32_t evtData[] = {alloc_bo->handle, currentPatch->uiWriteOperation, currentPatch->AllocationOffset};
1043 MOS_TraceEventExt(EVENT_MOS_BATCH_SUBMIT, EVENT_TYPE_INFO,
1044 evtData, sizeof(evtData),
1045 &boOffset, sizeof(boOffset));
1046 }
1047 #endif
1048
10451049 if(mos_gem_bo_is_softpin(alloc_bo))
10461050 {
10471051 if (alloc_bo != tempCmdBo)
0 # Copyright (c) 2021, Intel Corporation
1 #
2 # Permission is hereby granted, free of charge, to any person obtaining a
3 # copy of this software and associated documentation files (the "Software"),
4 # to deal in the Software without restriction, including without limitation
5 # the rights to use, copy, modify, merge, publish, distribute, sublicense,
6 # and/or sell copies of the Software, and to permit persons to whom the
7 # Software is furnished to do so, subject to the following conditions:
8 #
9 # The above copyright notice and this permission notice shall be included
10 # in all copies or substantial portions of the Software.
11 #
12 # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
13 # OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
15 # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
16 # OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
17 # ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
18 # OTHER DEALINGS IN THE SOFTWARE.
19
20 set(TMP_SOURCES_
21 ${CMAKE_CURRENT_LIST_DIR}/skuwa_dumper_specific.c
22 )
23
24 set(TMP_HEADERS_ "")
25
26 set(SOURCES_
27 ${SOURCES_}
28 ${TMP_SOURCES_}
29 )
30
31 # no header for now
32 #set(HEADERS_
33 # ${HEADERS_}
34 # ${TMP_HEADERS_}
35 #)
36 #
37 #media_add_curr_to_include_path()
0 /*
1 * Copyright (c) 2021, Intel Corporation
2 *
3 * Permission is hereby granted, free of charge, to any person obtaining a
4 * copy of this software and associated documentation files (the "Software"),
5 * to deal in the Software without restriction, including without limitation
6 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
7 * and/or sell copies of the Software, and to permit persons to whom the
8 * Software is furnished to do so, subject to the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included
11 * in all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
14 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
16 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
17 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
18 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
19 * OTHER DEALINGS IN THE SOFTWARE.
20 */
21 //!
22 //! \file skuwa_dumper_specific.c
23 //!
24 //!
25
26 #if (_DEBUG || _RELEASE_INTERNAL)
27 #include <stdio.h>
28 #include "vphal.h"
29 #include "mhw_vebox.h"
30 #include "mos_os.h"
31 #include "vp_dumper.h"
32 #include "ctype.h"
33
34 MOS_STATUS VpParameterDumper::SkuWa_DumpToXML(
35 MEDIA_FEATURE_TABLE *skuTable,
36 MEDIA_WA_TABLE *waTable)
37 {
38 char sPath[MAX_PATH] = {0}, sOsPath[MAX_PATH] = {0};
39 MOS_STATUS eStatus;
40 char* pcOutContents;
41 std::string SkuWatableFileName = "skuwatable_dump";
42 VPHAL_PARAMS_DUMP_SPEC* pParamsDumpSpec = &m_dumpSpec;
43 bool enableSkuWaDump = false;
44
45 eStatus = MOS_STATUS_SUCCESS;
46 pcOutContents = nullptr;
47 enableSkuWaDump = m_dumpSpec.enableSkuWaDump;
48
49 std::map<std::string, uint8_t>::iterator iter;
50 MediaFeatureTable::MediaMap * mediaSkuMap = skuTable->GetMediaSku();
51 MediaWaTable::MediaMap * mediaWaMap = waTable->GetMediaWa();
52
53 VPHAL_DEBUG_CHK_NULL(pParamsDumpSpec);
54
55 if (!enableSkuWaDump)
56 goto finish;
57
58 VPHAL_DEBUG_CHK_NULL(skuTable);
59 VPHAL_DEBUG_CHK_NULL(waTable);
60
61 VPHAL_DEBUG_CHK_STATUS(VpDumperTool::AppendString(true, &pcOutContents, "<?xml version=\"1.0\" encoding=\"utf-8\"?>\n"));
62 VPHAL_DEBUG_CHK_STATUS(VpDumperTool::AppendString(false, &pcOutContents, "\n"));
63
64 VPHAL_DEBUG_CHK_STATUS(VpDumperTool::AppendString(false, &pcOutContents, "\t<ID>%d</ID>\n", MOS_GetPid()));
65
66 VPHAL_DEBUG_CHK_STATUS(VpDumperTool::AppendString(false, &pcOutContents, "\t<!-- SkuTable infomation -->\n"));
67 VPHAL_DEBUG_CHK_STATUS(VpDumperTool::AppendString(false, &pcOutContents, "\t<SkuTable>\n"));
68
69 VPHAL_DEBUG_CHK_NULL(mediaSkuMap);
70
71 for (iter = mediaSkuMap->begin(); iter != mediaSkuMap->end(); iter++)
72 {
73 VPHAL_DEBUG_CHK_STATUS(VpDumperTool::AppendString(false, &pcOutContents, "\t\t<%s> %d </%s>\n", iter->first.c_str(), unsigned(iter->second), iter->first.c_str()));
74 }
75 VPHAL_DEBUG_CHK_STATUS(VpDumperTool::AppendString(false, &pcOutContents, "\t</SkuTable>\n"));
76
77 VPHAL_DEBUG_CHK_STATUS(VpDumperTool::AppendString(false, &pcOutContents, "\t<!-- WaTable information -->\n"));
78 VPHAL_DEBUG_CHK_STATUS(VpDumperTool::AppendString(false, &pcOutContents, "\t<WaTable>\n"));
79
80 VPHAL_DEBUG_CHK_NULL(mediaWaMap);
81
82 for (iter = mediaWaMap->begin(); iter != mediaWaMap->end(); iter++)
83 {
84 VPHAL_DEBUG_CHK_STATUS(VpDumperTool::AppendString(false, &pcOutContents, "\t\t<%s> %d </%s>\n", iter->first.c_str(), unsigned(iter->second), iter->first.c_str()));
85 }
86 VPHAL_DEBUG_CHK_STATUS(VpDumperTool::AppendString(false, &pcOutContents, "\t</WaTable>\n"));
87
88 MOS_SecureStringPrint(sPath, MAX_PATH, MAX_PATH, "%s%c%s.xml", pParamsDumpSpec->outFileLocation, MOS_DIR_SEPERATOR, SkuWatableFileName.c_str());
89 VpDumperTool::GetOsFilePath(sPath, sOsPath);
90 VPHAL_DEBUG_CHK_STATUS(MOS_WriteFileFromPtr(sOsPath, pcOutContents, strlen(pcOutContents)));
91
92 finish:
93 if (pcOutContents)
94 {
95 MOS_FreeMemory(pcOutContents);
96 pcOutContents = nullptr;
97 }
98
99 return eStatus;
100 }
101
102 #endif // (_DEBUG || _RELEASE_INTERNAL)
0 # Copyright (c) 2021, Intel Corporation
1 #
2 # Permission is hereby granted, free of charge, to any person obtaining a
3 # copy of this software and associated documentation files (the "Software"),
4 # to deal in the Software without restriction, including without limitation
5 # the rights to use, copy, modify, merge, publish, distribute, sublicense,
6 # and/or sell copies of the Software, and to permit persons to whom the
7 # Software is furnished to do so, subject to the following conditions:
8 #
9 # The above copyright notice and this permission notice shall be included
10 # in all copies or substantial portions of the Software.
11 #
12 # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
13 # OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
15 # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
16 # OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
17 # ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
18 # OTHER DEALINGS IN THE SOFTWARE.
19
20 media_include_subdirectory(hal)
644644 #ifdef _VP9_DECODE_SUPPORTED
645645 if (info->Mode == CODECHAL_DECODE_MODE_VP9VLD)
646646 {
647 m_codechalDevice = MOS_New(Decode::Vp9, hwInterface, debugInterface, info);
647 #ifdef _APOGEIOS_SUPPORTED
648 bool apogeiosEnable = false;
649 MOS_USER_FEATURE_VALUE_DATA userFeatureData;
650 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
651
652 userFeatureData.i32Data = apogeiosEnable;
653 userFeatureData.i32DataFlag = MOS_USER_FEATURE_VALUE_DATA_FLAG_CUSTOM_DEFAULT_VALUE_TYPE;
654 MOS_UserFeature_ReadValue_ID(
655 nullptr,
656 __MEDIA_USER_FEATURE_VALUE_APOGEIOS_VP9D_ENABLE_ID,
657 &userFeatureData,
658 hwInterface->GetOsInterface()->pOsContext);
659
660 apogeiosEnable = userFeatureData.bData ? true : false;
661
662 if (apogeiosEnable)
663 {
664 m_codechalDevice = MOS_New(DecodeVp9PipelineAdapterG12, hwInterface, debugInterface);
665 }
666 else
667 #endif
668 {
669 m_codechalDevice = MOS_New(Decode::Vp9, hwInterface, debugInterface, info);
670 }
648671 }
649672 else
650673 #endif
121121 #ifdef _APOGEIOS_SUPPORTED
122122 #include "encode_hevc_vdenc_pipeline_adapter_g12.h"
123123 #include "decode_hevc_pipeline_adapter_m12.h"
124 #include "decode_vp9_pipeline_adapter_m12.h"
124125 #endif
125126 #endif
126127