Commit f8ffbc6b1c15094e6c7438566464d9c487480bbc - intel-media-driver

+77

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README.md less more

10	10
11	11	The Intel(R) Media Driver for VAAPI is distributed under the MIT license with
12	12	portions covered under the BSD 3-clause "New" or "Revised" License.
13		You may obtain a copy of the License at:
14
15		https://opensource.org/licenses/MIT
16
17		&
18
19		https://opensource.org/licenses/BSD-3-Clause
	13	You may obtain a copy of the License at [MIT](https://opensource.org/licenses/MIT) & [BSD-3-Clause](https://opensource.org/licenses/BSD-3-Clause)
20	14
21	15	## Prerequisites
22	16
23		For Ubuntu 16.04 and above
	17	For Ubuntu 16.04+
24	18
25		\# apt install autoconf libtool libdrm-dev xorg xorg-dev openbox libx11-dev libgl1-mesa-glx libgl1-mesa-dev
	19	```
	20	apt install autoconf libtool libdrm-dev xorg xorg-dev openbox libx11-dev libgl1-mesa-glx libgl1-mesa-dev
	21	```
26	22
27	23	Equivalents for other distributions should work.
28	24
29	25	## Dependencies
30	26
31		Libva - https://github.com/intel/libva
32
33		GmmLib - https://github.com/intel/gmmlib (please check https://github.com/intel/media-driver/wiki/Comparability-with-GmmLib)
	27	* [Libva](https://github.com/intel/libva)
	28	* [GmmLib](https://github.com/intel/gmmlib)(Please check [comparability with GmmLib](https://github.com/intel/media-driver/wiki/Comparability-with-GmmLib))
34	29
35	30	## Building
36	31

55	50	```
56	51	7.
57	52	```
58		$ make -j8
	53	$ make -j"$(nproc)"
59	54	```
60	55
61	56	## Install

76	71	export LIBVA_DRIVER_NAME=iHD
77	72	```
78	73
79		## Build Modes
80
81		This section summarizes key driver build modes which can be used in the different environment requirements:
82
83		\| Build option \| Default value \| Dependencies \| Comments \|
84		\|-\|-\|-\|-\|
85		\| ENABLE_KERNELS \| ON \| N/A \| Enable/Disable shaders during driver build \|
86		\| ENABLE_NONFREE_KERNELS \| ON \| ENABLE_KERNELS=ON \| Enable/disable close source shaders (kernels) during the build \|
87		\| BUILD_KERNELS \| OFF \| ENABLE_KERNELS=ON, ENABLE_NONFREE_KERNELS=OFF \| If enabled, rebuild open source shaders (kernels) from sources. Requires ENABLE_NONFREE_KERNELS=OFF \|
88
89		With the above options it is possible to build (table assumes that non-listed options have default values):
90
91		\| No. \| Build option(s) \| HW Features \| Shaders (Kernels) \| Comments \|
92		\|-\|-\|-\|-\|-\|
93		\| 1 \| ENABLE_KERNELS=ON \| Yes \| Close source (pre-built) \| Default Build, full feature driver \|
94		\| 2 \| ENABLE_KERNELS=OFF \| Yes \| None \| HW features only, include HW decoder, HW VDEnc Encoder (CQP mode) \|
95		\| 3 \| ENABLE_NONFREE_KERNELS=OFF \| Yes \| Open source (pre-built) \| Open Source Build, HW features available in prev. mode (ENABLE_KERNELS=ON) and features supported by open source shaders \|
96		\| 4 \| ENABLE_NONFREE_KERNELS=OFF BUILD_KERNELS=ON \| Yes \| Open source \| Open Source Build, Same as ENABLE_NONFREE_KERNELS=OFF driver, but shaders are rebuilt from sources \|
97	74
98	75	## Supported Platforms
99	76
100		BDW (Broadwell)
	77	* BDW (Broadwell)
	78	* SKL (Skylake)
	79	* BXT (Broxton) / APL (Apollo Lake)
	80	* KBL (Kaby Lake)
	81	* CFL (Coffee Lake)
	82	* WHL (Whiskey Lake)
	83	* CML (Comet Lake)
	84	* ICL (Ice Lake)
101	85
102		SKL (Skylake)
103	86
104		BXT (Broxton) / APL (Apollo Lake)
	87	## Components and Features
105	88
106		KBL (Kaby Lake)
	89	Media driver contains three components as below
	90	* Video decoding calls hardware-based decoder([VDBox](https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-kbl-vol08-media_vdbox.pdf)) which provides fully-accelerated hardware video decoding to release the graphics engine for other operations.
	91	* Video encoding supports two modes, one calls hardware-based encoder([VDEnc](https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-kbl-vol08-media_vdbox.pdf)/[Huc](https://01.org/linuxgraphics/downloads/firmware?langredirect=1)) to provide low power encoding, another one is hardware([PAK](https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-kbl-vol08-media_vdbox.pdf))+shader(media kernel+[VME](https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-kbl-vol04-configurations.pdf)) based encoding. User could choose the mode through VA-API.
	92	* Video processing supports several popular features by hardware-based video processor([VEBox/SFC](https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-kbl-vol09-media_vebox.pdf)) and shader(media kernel) based solution together.
107	93
108		CFL (Coffee Lake)
	94	Media driver supports two build types as below
	95	* Full Feature Build is default driver build, which supports all feature by hardware accelerator and close source shaders(media kernel binaries). Ubuntu [intel-media-va-driver-non-free](https://packages.ubuntu.com/disco/intel-media-va-driver-non-free) package is generated from this build type.
	96	* Free Kernel Build, enables fully open source shaders(media kernels) and hardware features but the features would be limited. Ubuntu [intel-media-va-driver](https://packages.ubuntu.com/disco/intel-media-va-driver) package is generated from this build type.
109	97
110		WHL (Whiskey Lake)
111	98
112		CML (Comet Lake)
	99	### Decoding/Encoding Features
113	100
114		ICL (Ice Lake)
	101	\| CODEC \| Build Types \| BDW \| SKL \| BXT/APL \| KBL \| CFL \| WHL \| CML \| ICL* \|
	102	\|---\|---\|---\|---\|---\|---\|---\|---\|---\|---\|
	103	\| AVC \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>D/Es</u><br><i>D<i> \| <u>D/E/Es</u><br><i>D/E<i> \| <u>D/E/Es</u><br><i>D/E<i> \| <u>D/E/Es</u><br><i>D/E<i> \| <u>D/E/Es</u><br><i>D/E<i> \| <u>D/E/Es</u><br><i>D/E<i> \| <u>D/E/Es</u><br><i>D/E<i> \| <u>D/E/Es</u><br><i>D/E<i> \|
	104	\| MPEG-2 \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \|
	105	\| VC-1 \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>D</u><br><i> <i> \| <u>D</u><br><i> <i> \| <u>D</u><br><i> <i> \| <u>D</u><br><i> <i> \| <u>D</u><br><i> <i> \| <u>D</u><br><i> <i> \| <u>D</u><br><i> <i> \| <u>D</u><br><i> <i> \|
	106	\| JPEG \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>D</u><br><i>D<i> \| <u>D/E</u><br><i>D/E<i> \| <u>D/E</u><br><i>D/E<i> \| <u>D/E</u><br><i>D/E<i> \| <u>D/E</u><br><i>D/E<i> \| <u>D/E</u><br><i>D/E<i> \| <u>D/E</u><br><i>D/E<i> \| <u>D/E</u><br><i>D/E<i> \|
	107	\| VP8 \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>D</u><br><i>D<i> \| <u>D</u><br><i>D<i> \| <u>D</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \|
	108	\| HEVC 8bit \| <u>Full Feature</u><br><i>Free Kernel</i> \| \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/E/Es</u><br><i>D/E<i> \|
	109	\| HEVC 8bit 422 \| <u>Full Feature</u><br><i>Free Kernel</i> \| \| \| \| \| \| \| \| <u>D/Es</u><br><i>D<i> \|
	110	\| HEVC 8bit 444 \| <u>Full Feature</u><br><i>Free Kernel</i> \| \| \| \| \| \| \| \| <u>D/E</u><br><i>D/E<i> \|
	111	\| HEVC 10bit \| <u>Full Feature</u><br><i>Free Kernel</i> \| \| \| <u>D</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/Es</u><br><i>D<i> \| <u>D/E/Es</u><br><i>D/E<i> \|
	112	\| HEVC 10bit 422 \| <u>Full Feature</u><br><i>Free Kernel</i> \| \| \| \| \| \| \| \| <u>D/Es</u><br><i>D<i> \|
	113	\| HEVC 10bit 444 \| <u>Full Feature</u><br><i>Free Kernel</i> \| \| \| \| \| \| \| \| <u>D/E</u><br><i>D/E<i> \|
	114	\| VP9 8bit \| <u>Full Feature</u><br><i>Free Kernel</i> \| \| \| <u>D</u><br><i>D<i> \| <u>D</u><br><i>D<i> \| <u>D</u><br><i>D<i> \| <u>D</u><br><i>D<i> \| <u>D</u><br><i>D<i> \| <u>D/E</u><br><i>D/E<i> \|
	115	\| VP9 8bit 444 \| <u>Full Feature</u><br><i>Free Kernel</i> \| \| \| \| \| \| \| \| <u>D/E</u><br><i>D/E<i> \|
	116	\| VP9 10bit \| <u>Full Feature</u><br><i>Free Kernel</i> \| \| \| \| <u>D</u><br><i>D<i> \| <u>D</u><br><i>D<i> \| <u>D</u><br><i>D<i> \| <u>D</u><br><i>D<i> \| <u>D/E</u><br><i>D/E<i> \|
	117	\| VP9 10bit 444 \| <u>Full Feature</u><br><i>Free Kernel</i> \| \| \| \| \| \| \| \| <u>D/E</u><br><i>D/E<i> \|
115	118
116		## Driver Features
117
118		### Features in Default Driver Build
119
120		\| CODEC \| BDW \| SKL \| BXT/APL \| KBL \| CFL \| WHL \| CML \| ICL* \|
121		\|---\|---\|---\|---\|---\|---\|---\|---\|---\|
122		\| AVC \| D/Es \| D/E/Es \| D/E/Es \| D/E/Es \| D/E/Es \| D/E/Es \| D/E/Es \| D/E/Es \|
123		\| MPEG-2 \| D/Es \| D/Es \| D \| D/Es \| D/Es \| D/Es \| D/Es \| D/Es \|
124		\| VC-1 \| D \| D \| D \| D \| D \| D \| D \| D \|
125		\| JPEG \| D \| D/E \| D/E \| D/E \| D/E \| D/E \| D/E \| D/E \|
126		\| VP8 \| D \| D \| D \| D/Es \| D/Es \| D/Es \| D/Es \| D/Es \|
127		\| HEVC 8bit \| \| D/Es \| D/Es \| D/Es \| D/Es \| D/Es \| D/Es \| D/E/Es \|
128		\| HEVC 8bit 422 \| \| \| \| \| \| \| \| D/Es \|
129		\| HEVC 8bit 444 \| \| \| \| \| \| \| \| D/E \|
130		\| HEVC 10bit \| \| \| D \| D/Es \| D/Es \| D/Es \| D/Es \| D/E/Es \|
131		\| HEVC 10bit 422 \| \| \| \| \| \| \| \| D/Es \|
132		\| HEVC 10bit 444 \| \| \| \| \| \| \| \| D/E \|
133		\| VP9 8bit \| \| \| D \| D \| D \| D \| D \| D/E \|
134		\| VP9 8bit 444 \| \| \| \| \| \| \| \| D/E \|
135		\| VP9 10bit \| \| \| \| D \| D \| D \| D \| D/E \|
136		\| VP9 10bit 444 \| \| \| \| \| \| \| \| D/E \|
137
138		D - HW Decoding
139
140		E - HW Encoding, Low Power Encoding
141
142		Es - HW + Shader Encoding
	119	* D - Hardware Decoding
	120	* E - Hardware Encoding, Low Power Encoding(VDEnc/Huc)
	121	* Es - Hardware(PAK) + Shader(media kernel+VME) Encoding
143	122
144	123	\* ICL encoding is pending on i915 support on upstream, for more information, please check [Known Issues and Limitations #5](https://github.com/intel/media-driver/blob/master/README.md#known-issues-and-limitations).
145	124
	125	For more information, please refer to
	126	* [Media Features Summary](https://github.com/intel/media-driver/blob/master/docs/media_features.md#media-features-summary)
	127	* [Supported Decoding Output Format and Max Resolution](https://github.com/intel/media-driver/blob/master/docs/media_features.md#supported-decoding-output-format-and-max-resolution)
	128	* [Supported Encoding Input Format and Max Resolution](https://github.com/intel/media-driver/blob/master/docs/media_features.md#supported-encoding-input-format-and-max-resolution)
146	129
147		\| Video Processing \| BDW \| SKL \| BXT/APL \| KBL \| CFL \| WHL \| CML \| ICL \|
148		\|---\|---\|---\|---\|---\|---\|---\|---\|---\|
149		\| Blending \| Y \| Y \| Y \| Y \| Y \| Y \| Y \| Y \|
150		\| CSC (Color Space Conversion) \| Y \| Y \| Y \| Y \| Y \| Y \| Y \| Y \|
151		\| De-interlace \| Y \| Y \| Y \| Y \| Y \| Y \| Y \| Y \|
152		\| De-noise \| Y \| Y \| Y \| Y \| Y \| Y \| Y \| Y \|
153		\| Luma Key \| Y \| Y \| Y \| Y \| Y \| Y \| Y \| Y \|
154		\| Mirroring \| Y \| Y \| Y \| Y \| Y \| Y \| Y \| Y \|
155		\| ProcAmp (brightness,contrast,hue,saturation) \| Y \| Y \| Y \| Y \| Y \| Y \| Y \| Y \|
156		\| Rotation \| Y \| Y \| Y \| Y \| Y \| Y \| Y \| Y \|
157		\| Scaling \| Y \| Y \| Y \| Y \| Y \| Y \| Y \| Y \|
158		\| Sharpening \| Y \| Y \| Y \| Y \| Y \| Y \| Y \| Y \|
159		\| STD/E (Skin Tone Detect & Enhancement) \| Y \| Y \| Y \| Y \| Y \| Y \| Y \| Y \|
160		\| TCC (Total Color Control) \| Y \| Y \| Y \| Y \| Y \| Y \| Y \| Y \|
161		\| Color fill \| Y \| Y \| Y \| Y \| Y \| Y \| Y \| Y \|
162		\| Chroma Siting \| \| Y \| Y \| Y \| Y \| Y \| Y \| Y \|
163		\| HDR10 Tone Mapping \| \| \| \| \| \| \| \| Y \|
	130	### Video Processing Features
164	131
165		For detail feature information, you can access [Media Features](https://github.com/intel/media-driver/blob/master/docs/media_features.md).
	132	\| Features \| Build Types \| BDW \| SKL \| BXT/APL \| KBL \| CFL \| WHL \| CML \| ICL \|
	133	\|---\|---\|---\|---\|---\|---\|---\|---\|---\|---\|
	134	\| Blending \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i>Yes</i> \|
	135	\| CSC<br>(Color Space Conversion) \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i>Yes</i> \|
	136	\| De-interlace \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i>Yes</i> \|
	137	\| De-noise \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \|
	138	\| Luma Key \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i>Yes</i> \|
	139	\| Mirroring \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i>Yes</i> \|
	140	\| ProcAmp<br>(brightness,contrast,hue,saturation) \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i>Yes</i> \|
	141	\| Rotation \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i>Yes</i> \|
	142	\| Scaling \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i>Yes</i> \|
	143	\| Sharpening \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i>Yes</i> \|
	144	\| STD/E<br>(Skin Tone Detect & Enhancement) \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \|
	145	\| TCC<br>(Total Color Control) \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \|
	146	\| Color fill \| <u>Full Feature</u><br><i>Free Kernel</i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i>Yes</i> \|
	147	\| Chroma Siting \| <u>Full Feature</u><br><i>Free Kernel</i> \|  <br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i> </i> \| <u>Yes</u><br><i>Yes</i> \|
	148	\| HDR10 Tone Mapping \| <u>Full Feature</u><br><i>Free Kernel</i> \|  <br><i> </i> \|  <br><i> </i> \|  <br><i> </i> \|  <br><i> </i> \|  <br><i> </i> \|  <br><i> </i> \|  <br><i> </i> \| <u>Yes</u><br><i> </i> \|
	149
	150	For more feature information, please refer to [Supported video processing csc/scaling format](https://github.com/intel/media-driver/blob/master/docs/media_features.md#supported-video-processing-cscscaling-format)
166	151
167	152
168		### Features in Open Source Build
	153	### Build Options
169	154
170		\| CODEC \| BDW \| SKL \| BXT/APL \| KBL \| CFL \| WHL \| CML \| ICL* \|
171		\|---\|---\|---\|---\|---\|---\|---\|---\|---\|
172		\| AVC \| D \| D/E \| D/E \| D/E \| D/E \| D/E \| D/E \| D/E \|
173		\| MPEG-2 \| D \| D \| D \| D \| D \| D \| D \| D \|
174		\| VC-1 \| \| \| \| \| \| \| \| \|
175		\| JPEG \| D \| D/E \| D/E \| D/E \| D/E \| D/E \| D/E \| D/E \|
176		\| VP8 \| D \| D \| D \| D \| D \| D \| D \| D \|
177		\| HEVC 8bit \| \| D \| D \| D \| D \| D \| D \| D/E \|
178		\| HEVC 8bit 422 \| \| \| \| \| \| \| \| D \|
179		\| HEVC 8bit 444 \| \| \| \| \| \| \| \| D/E \|
180		\| HEVC 10bit \| \| \| D \| D \| D \| D \| D \| D/E \|
181		\| HEVC 10bit 422 \| \| \| \| \| \| \| \| D \|
182		\| HEVC 10bit 444 \| \| \| \| \| \| \| \| D/E \|
183		\| VP9 8bit \| \| \| D \| D \| D \| D \| D \| D/E \|
184		\| VP9 8bit 444 \| \| \| \| \| \| \| \| D/E \|
185		\| VP9 10bit \| \| \| \| D \| D \| D \| D \| D/E \|
186		\| VP9 10bit 444 \| \| \| \| \| \| \| \| D/E \|
	155	You could follow below build options to enable these two builds.
	156	* Full Feature Build: ENABLE_KERNELS=ON(Default) ENABLE_NONFREE_KERNELS=ON(Default)
	157	* Free Kernel Build: ENABLE_KERNELS=ON ENABLE_NONFREE_KERNELS=OFF
	158	* If trying to use pre-built open source kernel binaries, please add BUILD_KERNELS=OFF(Default).
	159	* If trying to rebuild open source kernel from source code, please add BUILD_KERNELS=ON.
187	160
188		D - HW Decoding
189
190		E - HW Encoding, Low Power Encoding
191
192		\* ICL encoding is pending on i915 support on upstream, for more information, please check [Known Issues and Limitations #5](https://github.com/intel/media-driver/blob/master/README.md#known-issues-and-limitations).
193
194
195		\| Video Processing \| BDW \| SKL \| BXT/APL \| KBL \| CFL \| WHL \| CML \| ICL \|
196		\|---\|---\|---\|---\|---\|---\|---\|---\|---\|
197		\| Blending \| \| \| \| \| \| \| \| Y \|
198		\| CSC (Color Space Conversion) \| \| \| \| \| \| \| \| Y \|
199		\| De-interlace \| \| \| \| \| \| \| \| Y \|
200		\| Luma Key \| \| \| \| \| \| \| \| Y \|
201		\| Mirroring \| \| \| \| \| \| \| \| Y \|
202		\| ProcAmp (brightness,contrast,hue,saturation) \| \| \| \| \| \| \| \| Y \|
203		\| Rotation \| \| \| \| \| \| \| \| Y \|
204		\| Scaling \| \| \| \| \| \| \| \| Y \|
205		\| Sharpening \| \| \| \| \| \| \| \| Y \|
206		\| Color fill \| \| \| \| \| \| \| \| Y \|
207		\| Chroma Siting \| \| \| \| \| \| \| \| Y \|
208	161
209	162
210	163	## Known Issues and Limitations

212	165	1. Intel(R) Media Driver for VAAPI is recommended to be built against gcc compiler v6.1
213	166	or later, which officially supported C++11.
214	167
215		2. SKL: Green or other incorrect color will be observed in output frames when using YV12/I420 as input format for csc/scaling/blending/rotation, etc. on Ubuntu 16.04 stock (with kernel 4.10). The issue can be addressed with the kernel patch: WaEnableYV12BugFixInHalfSliceChicken7 [commit 0b71cea29fc29bbd8e9dd9c641fee6bd75f6827](https://cgit.freedesktop.org/drm-tip/commit/?id=0b71cea29fc29bbd8e9dd9c641fee6bd75f68274)
	168	2. SKL: Green or other incorrect color will be observed in output frames when using YV12/I420 as input format for csc/scaling/blending/rotation, etc. on Ubuntu 16.04 stock (with kernel 4.10). The issue can be addressed with the kernel patch: [WaEnableYV12BugFixInHalfSliceChicken7](https://cgit.freedesktop.org/drm-tip/commit/?id=0b71cea29fc29bbd8e9dd9c641fee6bd75f68274)
216	169
217		3. HuC firmware is needed for AVC low power encoding bitrate control, including CBR, VBR, etc. As of now, HuC firmware support is disabled in Linux kernels by default. Please, refer to i915 kernel mode driver documentation to learn how to enable it. Mind that HuC firmware support presents in the following kernels for the specified platforms:
	170	3. HuC firmware is needed for AVC/HEVC/VP9 low power encoding bitrate control, including CBR, VBR, etc. As of now, HuC firmware support is disabled in Linux kernels by default. Please, refer to i915 kernel mode driver documentation to learn how to enable it. Mind that HuC firmware support presents in the following kernels for the specified platforms:
218	171	* APL/KBL: starting from kernel 4.11
219	172	* CFL: starting from kernel 4.15
220	173

+2

-1

cmrtlib/linux/hardware/cm_device_os.cpp less more

147	147	m_printEnabled ( false),
148	148	m_printBufferSize( 0),
149	149	m_createOption(createOption),
150		m_driverStoreEnabled(0)
	150	m_driverStoreEnabled(0),
	151	m_driFileDescriptor(0)
151	152	{
152	153
153	154	// New Surface Manager

+19

-27

docs/media_features.md less more

0	0	# Media Features Summary
1	1
2		## Supported Decoding Format and Resolution
3
4		Supported decoding output format and max resolution:
	2	## Supported Decoding Output Format and Max Resolution
5	3
6	4	(2k=2048x2048, 4k=4096x4096, 8k=8192x8192, 16k=16384x16384)
7	5
8		\| Codec \| Type \| BDW \| SKL \| BXT/APL \| KBL \| CFL \| WHL \| CNL \| ICL \|
	6	\| Codec \| Type \| BDW \| SKL \| BXT/APL \| KBL \| CFL \| WHL \| CML \| ICL \|
9	7	\|------------\|----------\|------\|------\|---------\|------\|------\|------\|------\|----------------\|
10	8	\| AVC \|Output \| NV12 \| NV12 \| NV12 \| NV12 \| NV12 \| NV12 \| NV12 \| NV12 \|
11	9	\| \|Max Res. \| 4k \| 4k \| 4k \| 4k \| 4k \| 4k \| 4k \| 4k \|

25	23	\| VP9 10bit \|Output \| \| \| \| P010 \| P010 \| P010 \| P010 \| P010/Y410 \|
26	24	\| \|Max Res. \| \| \| \| 8k \| 8k \| 8k \| 8k \| 8k \|
27	25
28		\* JPEG output format: NV12/411P/422H/422V/444P/BGRP/RGBP/YUY2/ARGB
	26	* \* JPEG output format: NV12/411P/422H/422V/444P/BGRP/RGBP/YUY2/ARGB
29	27
30	28
31		## Supported Encoding Format and Resolution
	29	## Supported Encoding Input Format and Max Resolution
32	30
33		### HW Encoding:
34
35		Supported input format and max resoultuion:
	31	### Hardware Encoding, Low Power Encoding(VDEnc/Huc)
36	32
37	33	(4k=4096x4096, 16k=16384x16384)
38	34
39		\| Codec \| Type \| BDW \| SKL \| BXT/APL \| KBL \| CFL \| WHL \| CNL \| ICL*** \|
	35	\| Codec \| Type \| BDW \| SKL \| BXT/APL \| KBL \| CFL \| WHL \| CML \| ICL*** \|
40	36	\|------------\|------------\|------\|------\|---------\|------\|-------\|-------\|------\|----------------\|
41		\| AVC \|Input \| \| \| NV12 \| More\| More \| More* \| \| More* \|
42		\| \|Max Res. \| \| \| 4k \| 4k \| 4k \| 4k \| \| 4k \|
	37	\| AVC \|Input \| \| NV12 \| NV12 \| More\| More \| More* \| More\| More \|
	38	\| \|Max Res. \| \| 4k \| 4k \| 4k \| 4k \| 4k \| 4k \| 4k \|
43	39	\| JPEG \|Input/Output\| \|Note\| Note \|Note\|Note \|Note \|Note\| Note** \|
44	40	\| \|Max Res. \| \| 16k \| 16k \| 16k \| 16k \| 16k \| 16k \| 16k \|
45	41	\| HEVC 8bit \|Input \| \| \| \| \| \| \| \| NV12/AYUV \|

51	47	\| VP9 10bit \|Input \| \| \| \| \| \| \| \| P010/Y410 \|
52	48	\| \|Max Res. \| \| \| \| \| \| \| \| 8k \|
53	49
54		\* KBL/CFL/ICL AVC encoding supported input formats: NV12/YUY2/YUYV/YVYU/UYVY/AYUV/ARGB
55
56		\** JPEG encoding supports input format NV12/YUY2/UYVY/AYUV/ABGR/Y8 and output format YUV400/YUV420/YUV422H_2Y/YUV444/RGB24.
57
58		\*** ICL encoding is pending on i915 support on upstream, for more information, please check [Known Issues and Limitations #5](https://github.com/intel/media-driver/blob/master/README.md#known-issues-and-limitations).
	50	* \* KBL/CFL/ICL AVC encoding supported input formats: NV12/YUY2/YUYV/YVYU/UYVY/AYUV/ARGB
	51	* \** JPEG encoding supports input format NV12/YUY2/UYVY/AYUV/ABGR/Y8 and output format YUV400/YUV420/YUV422H_2Y/YUV444/RGB24.
	52	* \*** ICL encoding is pending on i915 support on upstream, for more information, please check [Known Issues and Limitations #5](https://github.com/intel/media-driver/blob/master/README.md#known-issues-and-limitations).
59	53
60	54
61		### HW+Shader Encoding:
62
63		Supported input format and max resolution:
	55	### Hardware(PAK) + Shader(media kernel+VME) Encoding
64	56
65	57	(2k=2048x2048, 4k=4096x4096, 8k=8192x8192)
66	58
67		\| Codec \| Type \| BDW \| SKL \| BXT/APL \| KBL \| CFL \| WHL \| CNL \| ICL* \|
	59	\| Codec \| Type \| BDW \| SKL \| BXT/APL \| KBL \| CFL \| WHL \| CML \| ICL* \|
68	60	\|------------\|------------\|------\|------\|---------\|------\|------\|------\|------\|----------------\|
69	61	\| AVC \|Input \| NV12 \| NV12 \| NV12 \| NV12 \| NV12 \| NV12 \| NV12 \| NV12 \|
70	62	\| \|Max Res. \| 4k \| 4k \| 4k \| 4k \| 4k \| 4k \| 4k \| 4k \|
71	63	\| MPEG2 \|Input \| NV12 \| NV12 \| \| NV12 \| NV12 \| NV12 \| NV12 \| NV12 \|
72	64	\| \|Max Res. \| 2k \| 2k \| \| 2k \| 2k \| 2k \| 2k \| 2k \|
73		\| VP8 \|Input \| \| \| \| \| \| NV12 \| NV12 \| NV12 \|
74		\| \|Max Res. \| \| \| \| \| \| 4k \| 4k \| 4k \|
	65	\| VP8 \|Input \| \| \| \| NV12 \| NV12 \| NV12 \| NV12 \| NV12 \|
	66	\| \|Max Res. \| \| \| \| 4k \| 4k \| 4k \| 4k \| 4k \|
75	67	\| HEVC 8bit \|Input \| \| NV12 \| NV12 \| NV12 \| NV12 \| NV12 \| NV12 \| NV12/AYUV \|
76	68	\| \|Max Res. \| \| 8k \| 8k \| 8k \| 8k \| 8k \| 8k \| 8k \|
77		\| HEVC 10bit \|Input \| \| \| \| \| \| \| NV12 \| P010/Y410 \|
78		\| \|Max Res. \| \| \| \| \| \| \| 8k \| 8k \|
	69	\| HEVC 10bit \|Input \| \| \| \| \| \| \| \| P010/Y410 \|
	70	\| \|Max Res. \| \| \| \| \| \| \| \| 8k \|
79	71
80		\* ICL encoding is pending on i915 support on upstream, for more information, please check [Known Issues and Limitations #5](https://github.com/intel/media-driver/blob/master/README.md#known-issues-and-limitations).
	72	* \* ICL encoding is pending on i915 support on upstream, for more information, please check [Known Issues and Limitations #5](https://github.com/intel/media-driver/blob/master/README.md#known-issues-and-limitations).
81	73
82	74	## Supported Video Processing CSC/Scaling Format
83	75

85	77	\|-----------------------\|--------\|------\|------\|------\|------\|------\|------\|------\|------\|------\|
86	78	\| BDW \| Input \| Y \| Y \| Y \| \| Y \| \| \| \| \|
87	79	\| \| Output \| Y \| Y \| Y \| \| Y \| \| \| \| \|
88		\|SKL/BXT/APL/KBL/CFL/WHL\| Input \| Y \| Y \| Y \| Y \| Y \| \| \| \| \|
	80	\|SKL/BXT/KBL/CFL/WHL/CML\| Input \| Y \| Y \| Y \| Y \| Y \| \| \| \| \|
89	81	\| \| Output \| Y \| Y \| Y \| \| Y \| \| \| \| \|
90	82	\| ICL \| Input \| Y \| Y \| Y \| Y \| Y \| Y \| Y \| Y \| Y \|
91	83	\| \| Output \| Y \| Y \| Y \| Y \| Y \| \| Y \| Y \| Y \|⏎

+7

-4

media_driver/agnostic/common/cm/cm_device_rt.cpp less more

138	138	m_nGPUFreqMax(0),
139	139	m_vtuneOn(false),
140	140	m_isDriverStoreEnabled(0),
	141	m_notifierGroup(nullptr),
141	142	m_hasGpuCopyKernel(false),
142	143	m_hasGpuInitKernel(false)
143	144	{
	145	//Initialize the structures in the class
	146	MOS_ZeroMemory(&m_halMaxValues, sizeof(m_halMaxValues));
	147	MOS_ZeroMemory(&m_halMaxValuesEx, sizeof(m_halMaxValuesEx));
	148	MOS_ZeroMemory(&m_cmHalCreateOption, sizeof(m_cmHalCreateOption));
	149
144	150	//Initialize Dev Create Param
145	151	InitDevCreateOption( m_cmHalCreateOption, options );
146	152

1656	1662	CM_QUEUE_CREATE_OPTION queueCreateOption)
1657	1663	{
1658	1664	INSERT_API_CALL_LOG();
1659		m_criticalSectionQueue.Acquire();
	1665	CLock locker(m_criticalSectionQueue);
1660	1666
1661	1667	CmQueueRT *queueRT = nullptr;
1662	1668	if (CM_QUEUE_TYPE_RENDER == queueCreateOption.QueueType)

1669	1675	&& gpuContext == queueCreateOption.GPUContext)
1670	1676	{
1671	1677	queue = (*iter);
1672		m_criticalSectionQueue.Release();
1673	1678	return CM_SUCCESS;
1674	1679	}
1675	1680	}

1681	1686	if (result != CM_SUCCESS)
1682	1687	{
1683	1688	CM_ASSERTMESSAGE("Failed to create the queue.");
1684		m_criticalSectionQueue.Release();
1685	1689	return result;
1686	1690	}
1687	1691	m_queue.push_back(queueRT);
1688	1692	queue = queueRT;
1689		m_criticalSectionQueue.Release();
1690	1693
1691	1694	return result;
1692	1695	}

+5

-3

media_driver/agnostic/common/cm/cm_hal.cpp less more

9011	9011	if (batchBuffer->bLocked)
9012	9012	{
9013	9013	// Only happens in Error cases
9014		CM_CHK_NULL_RETURN_MOSERROR(batchBuffer->pPrivateData);
9015
9016		if (((PCM_HAL_BB_ARGS)batchBuffer->pPrivateData)->refCount == 1)
	9014	if (batchBuffer->pPrivateData && ((PCM_HAL_BB_ARGS)batchBuffer->pPrivateData)->refCount == 1)
9017	9015	{
9018	9016	renderHal->pfnUnlockBB(renderHal, batchBuffer);
	9017	}
	9018	else if (batchBuffer->pPrivateData == nullptr)
	9019	{
	9020	eStatus = MOS_STATUS_NULL_POINTER;
9019	9021	}
9020	9022	}
9021	9023	}

+12

-0

media_driver/agnostic/common/cm/cm_kernel_rt.h less more

89	89	isDirty = false;
90	90	isNull = false;
91	91	unitVmeArraySize = 0;
	92	surfIndex = nullptr;
	93	aliasIndex = 0;
	94	unitOffsetInPayloadOrig = 0;
	95	isSet = false;
	96	index = 0;
	97	unitKindOrig = 0;
	98	nCustomValue = 0;
	99	surfaceKind = DATA_PORT_SURF;
	100	unitSizeOrig = 0;
	101	surfArrayArg = nullptr;
	102	aliasCreated = false;
	103
92	104	}
93	105	};
94	106

+13

-5

media_driver/agnostic/common/cm/cm_queue_rt.cpp less more

119	119	m_usingVirtualEngine(false),
120	120	m_osSyncEvent(nullptr),
121	121	m_trackerIndex(0),
122		m_fastTrackerIndex(0)
123		{
124
	122	m_fastTrackerIndex(0),
	123	m_streamIndex(0)
	124	{
	125	MOS_ZeroMemory(&m_mosVeHintParams, sizeof(m_mosVeHintParams));
125	126	}
126	127
127	128	//*-----------------------------------------------------------------------------

550	551	if ( !(MOS_QueryPerformanceCounter( (uint64_t*)&nEnqueueTime.QuadPart )))
551	552	{
552	553	CM_ASSERTMESSAGE("Error: Query performance counter failure.");
	554	CmTaskInternal::Destroy(task);
553	555	return CM_FAILURE;
554	556	}
555	557

628	630	if ( !(MOS_QueryPerformanceCounter( (uint64_t*)&nEnqueueTime.QuadPart )))
629	631	{
630	632	CM_ASSERTMESSAGE("Error: Query performance counter failure.");
	633	CmTaskInternal::Destroy(task);
631	634	return CM_FAILURE;
632	635	}
633	636

739	742	if ( !(MOS_QueryPerformanceCounter( (uint64_t*)&nEnqueueTime.QuadPart )) )
740	743	{
741	744	CM_ASSERTMESSAGE("Error: Query performance counter failure.");
	745	CmTaskInternal::Destroy(task);
742	746	return CM_FAILURE;
743	747	}
744	748

3141	3145	if ( !(MOS_QueryPerformanceCounter( (uint64_t*)&nEnqueueTime.QuadPart )) )
3142	3146	{
3143	3147	CM_ASSERTMESSAGE("Error: Query Performance counter failure.");
3144		return CM_FAILURE;
	3148	hr = CM_FAILURE;
	3149	goto finish;
3145	3150	}
3146	3151
3147	3152	CM_CHK_CMSTATUS_GOTOFINISH(CreateEvent(task, isEventVisible, taskDriverId, eventRT));

3162	3167	CM_CHK_CMSTATUS_GOTOFINISH(FlushTaskWithoutSync());
3163	3168
3164	3169	finish:
3165
	3170	if (hr != CM_SUCCESS)
	3171	{
	3172	CmTaskInternal::Destroy(task);
	3173	}
3166	3174	return hr;
3167	3175	}
3168	3176

+2

-0

media_driver/agnostic/common/cm/cm_surface_manager_base.cpp less more

169	169	m_device(device),
170	170	m_surfaceArraySize(0),
171	171	m_surfaceArray(nullptr),
	172	m_maxSurfaceIndexAllocated(0),
172	173	m_surfaceSizes(nullptr),
173	174	m_maxBufferCount(0),
174	175	m_bufferCount(0),

192	193	m_delayDestroyHead(nullptr),
193	194	m_delayDestroyTail(nullptr)
194	195	{
	196	MOS_ZeroMemory(&m_surfaceBTIInfo, sizeof(m_surfaceBTIInfo));
195	197	GetSurfaceBTIInfo();
196	198	};
197	199

+11

-14

media_driver/agnostic/common/cm/cm_task_internal.cpp less more

1791	1791	void ** curTaskSurfResArray = nullptr;
1792	1792	uint32_t refSurfCnt = 0;
1793	1793	uint32_t *refSurfHandleArray = nullptr;
	1794	CM_RETURN_CODE hr = CM_SUCCESS;
1794	1795
1795	1796	curTaskSurfResArray = (void *)MOS_AllocAndZeroMemory(sizeof(void )*poolSize);
1796	1797	CM_CHK_NULL_RETURN_CMERROR(curTaskSurfResArray);

1807	1808
1808	1809	// get the last tracker
1809	1810	PCM_CONTEXT_DATA cmData = ( PCM_CONTEXT_DATA )m_cmDevice->GetAccelData();
1810		CM_CHK_NULL_RETURN_CMERROR(cmData);
1811		PCM_HAL_STATE state = cmData->cmHalState;
1812		CM_CHK_NULL_RETURN_CMERROR(state);
	1811	PCM_HAL_STATE state = nullptr;
	1812	CM_CHK_NULL_GOTOFINISH_CMERROR(cmData);
	1813	state = cmData->cmHalState;
	1814	CM_CHK_NULL_GOTOFINISH_CMERROR(state);
1813	1815
1814	1816	if (!m_isSurfaceUpdateDone)
1815	1817	{

1818	1820	if (m_surfaceArray[i])
1819	1821	{
1820	1822	CmSurface *surface = NULL;
1821		CM_CHK_CMSTATUS_RETURN(surfaceMgr->GetSurface(i, surface));
	1823	CM_CHK_CMSTATUS_GOTOFINISH(surfaceMgr->GetSurface(i, surface));
1822	1824	if (surface == nullptr) // surface destroyed but not updated in kernel
1823	1825	{
1824	1826	continue;

1896	1898	}
1897	1899	else
1898	1900	{
1899		surfaceLock->Release();
1900		if (curTaskSurfResArray)
1901		{
1902		MOS_FreeMemory(curTaskSurfResArray);
1903		curTaskSurfResArray = nullptr;
1904		}
1905		return CM_INVALID_ARG_INDEX;
	1901	hr = CM_INVALID_ARG_INDEX;
	1902	goto finish;
1906	1903	}
1907	1904	break;
1908	1905

1915	1912	m_isSurfaceUpdateDone = true;
1916	1913	}
1917	1914
1918		surfaceLock->Release();
1919
1920	1915	// Check if there is any secure surface.
1921	1916	if (curTaskSurfCnt > 0 && state->osInterface && state->osInterface->osCpInterface)
1922	1917	{
1923	1918	state->osInterface->osCpInterface->PrepareResources(curTaskSurfResArray, curTaskSurfCnt, nullptr, 0);
1924	1919	}
1925	1920
	1921	finish:
	1922	surfaceLock->Release();
1926	1923	if (curTaskSurfResArray)
1927	1924	{
1928	1925	MOS_FreeMemory(curTaskSurfResArray);
1929	1926	curTaskSurfResArray = nullptr;
1930	1927	}
1931	1928
1932		return CM_SUCCESS;
	1929	return hr;
1933	1930	}
1934	1931
1935	1932	#if CM_LOG_ON

+1

-2

media_driver/agnostic/common/cm/cm_visa.cpp less more

30	30	using namespace vISA;
31	31
32	32	ISAfile::ISAfile(const uint8_t *data, unsigned size) : version(0), data(data), end(data + size),
33		size(size), error(0), header(0), kernel_data_loaded(false), function_data_loaded(false) { }
	33	size(size), error(0), header(0), kernel_data_loaded(false), function_data_loaded(false), errorIndex(0) { }
34	34
35	35	ISAfile::ISAfile(const ISAfile& other) {
36	36	version = other.version;
37	37	data = other.data;
38	38	end = other.end;
39	39	size = other.size;
40		delete[] error;
41	40	char *perror = new char[std::strlen(other.error)];
42	41	MOS_SecureMemcpy(perror, sizeof(perror), other.error, sizeof(other.error));
43	42	error = perror;

+3

-0

media_driver/agnostic/common/codec/hal/codechal_decode_avc.cpp less more

1974	1974	MOS_ZeroMemory(&m_resAvcDmvBuffers, (sizeof(MOS_RESOURCE) * CODEC_AVC_NUM_DMV_BUFFERS));
1975	1975	MOS_ZeroMemory(&m_resInvalidRefBuffer, sizeof(MOS_RESOURCE));
1976	1976	MOS_ZeroMemory(&m_resMvcDummyDmvBuffer, (sizeof(MOS_RESOURCE) * 2));
	1977	MOS_ZeroMemory(&m_destSurface, sizeof(MOS_SURFACE));
	1978	MOS_ZeroMemory(&m_resSyncObjectWaContextInUse, sizeof(MOS_RESOURCE));
	1979	MOS_ZeroMemory(&m_resSyncObjectVideoContextInUse, sizeof(MOS_RESOURCE));
1977	1980	m_refFrameSurface = nullptr;
1978	1981
1979	1982	m_vldSliceRecord = nullptr;

+24

-2

media_driver/agnostic/common/codec/hal/codechal_decode_hevc.cpp less more

2647	2647	CodechalHwInterface * hwInterface,
2648	2648	CodechalDebugInterface *debugInterface,
2649	2649	PCODECHAL_STANDARD_INFO standardInfo) : CodechalDecode(hwInterface, debugInterface, standardInfo),
	2650	m_minCtbSize(0),
	2651	m_is10BitHevc(false),
	2652	m_is12BitHevc(false),
	2653	m_chromaFormatinProfile(0),
	2654	m_shortFormatInUse(false),
	2655	m_dataSize(0),
	2656	m_dataOffset(0),
	2657	m_numSlices(0),
2650	2658	m_is8BitFrameIn10BitHevc(false),
2651	2659	m_internalNv12RtIndexMapInitilized(false),
2652	2660	m_mfdDeblockingFilterRowStoreScratchBufferPicWidth(0),

2654	2662	m_saoLineBufferPicWidth(0),
2655	2663	m_mvBufferProgrammed(false),
2656	2664	m_dmemBufferIdx(0),
	2665	m_dmemBufferSize(0),
	2666	m_dmemTransferSize(0),
	2667	m_dmemBufferProgrammed(false),
2657	2668	m_copyDataBufferSize(0),
	2669	m_copyDataOffset(0),
2658	2670	m_copyDataBufferInUse(false),
	2671	m_estiBytesInBitstream(0),
	2672	m_curPicIntra(false),
2659	2673	m_mvBufferSize(0),
	2674	m_hevcMvBufferIndex(0),
	2675	m_frameIdx(0),
2660	2676	m_enableSf2DmaSubmits(false),
2661	2677	m_widthLastMaxAlloced(0),
2662	2678	m_heightLastMaxAlloced(0),
2663		m_ctbLog2SizeYMax(0)
	2679	m_ctbLog2SizeYMax(0),
	2680	m_hcpDecPhase(0)
2664	2681	{
2665	2682	CODECHAL_DECODE_FUNCTION_ENTER;
2666	2683

2679	2696	MOS_ZeroMemory(m_resDmemBuffer, sizeof(m_resDmemBuffer));
2680	2697	MOS_ZeroMemory(&m_resCopyDataBuffer, sizeof(m_resCopyDataBuffer));
2681	2698	MOS_ZeroMemory(&m_resSyncObjectWaContextInUse, sizeof(m_resSyncObjectWaContextInUse));
2682		MOS_ZeroMemory(&m_picMhwParams, sizeof(m_picMhwParams));
	2699	MOS_ZeroMemory(&m_picMhwParams,sizeof(m_picMhwParams));
	2700	MOS_ZeroMemory(&m_hevcPicParams,sizeof(m_hevcPicParams));
	2701	MOS_ZeroMemory(&m_hevcSliceParams,sizeof(m_hevcSliceParams));
	2702	MOS_ZeroMemory(&m_hevcIqMatrixParams,sizeof(m_hevcIqMatrixParams));
	2703	MOS_ZeroMemory(&m_destSurface,sizeof(m_destSurface));
	2704	MOS_ZeroMemory(&m_currPic,sizeof(m_currPic));
2683	2705
2684	2706	m_hcpInUse = true;
2685	2707	}

+1

-1

media_driver/agnostic/common/codec/hal/codechal_decode_hevc.h less more

574	574
575	575	#ifdef _DECODE_PROCESSING_SUPPORTED
576	576	// SFC
577		CodechalHevcSfcState *m_sfcState; //!< HEVC SFC State
	577	CodechalHevcSfcState *m_sfcState = nullptr; //!< HEVC SFC State
578	578	#endif
579	579	PIC_LONG_FORMAT_MHW_PARAMS m_picMhwParams; //!< picture parameters
580	580

+13

-1

media_driver/agnostic/common/codec/hal/codechal_decode_jpeg.cpp less more

66	66	CodechalHwInterface * hwInterface,
67	67	CodechalDebugInterface *debugInterface,
68	68	PCODECHAL_STANDARD_INFO standardInfo) : CodechalDecode(hwInterface, debugInterface, standardInfo),
69		m_copiedDataBufferSize(0)
	69	m_dataSize(0),
	70	m_dataOffset(0),
	71	m_copiedDataBufferSize(0),
	72	m_nextCopiedDataOffset(0),
	73	m_totalDataLength(0),
	74	m_preNumScans(0),
	75	m_copiedDataBufferInUse(false)
	76
70	77	{
71	78	CODECHAL_DECODE_FUNCTION_ENTER;
72	79
73	80	MOS_ZeroMemory(&m_resCopiedDataBuffer, sizeof(m_resCopiedDataBuffer));
	81	MOS_ZeroMemory(&m_destSurface, sizeof(m_destSurface));
	82	MOS_ZeroMemory(&m_jpegHuffmanTable, sizeof(m_jpegHuffmanTable));
	83	MOS_ZeroMemory(&m_resDataBuffer, sizeof(m_resDataBuffer));
	84	MOS_ZeroMemory(&m_resSyncObjectWaContextInUse, sizeof(m_resSyncObjectWaContextInUse));
	85	MOS_ZeroMemory(&m_resSyncObjectVideoContextInUse, sizeof(m_resSyncObjectVideoContextInUse));
74	86	}
75	87
76	88	MOS_STATUS CodechalDecodeJpeg::InitializeBeginFrame()

+3

-3

media_driver/agnostic/common/codec/hal/codechal_decode_jpeg.h less more

139	139	#endif
140	140
141	141	MOS_SURFACE m_destSurface; //!< Pointer to MOS_SURFACE of render surface
142		CodecDecodeJpegPicParams *m_jpegPicParams; //!< Picture parameter for JPEG
	142	CodecDecodeJpegPicParams *m_jpegPicParams = nullptr; //!< Picture parameter for JPEG
143	143
144	144	#if USE_CODECHAL_DEBUG_TOOL
145	145	MOS_STATUS DumpIQParams(

223	223	protected:
224	224	uint32_t m_dataSize; //!< Data size of the bitstream
225	225	uint32_t m_dataOffset; //!< Data offset of the bitstream
226		CodecDecodeJpegScanParameter * m_jpegScanParams; //!< Scan parameter for JPEG
227		CodecJpegQuantMatrix * m_jpegQMatrix; //!< QMatrix for JPEG
	226	CodecDecodeJpegScanParameter * m_jpegScanParams = nullptr; //!< Scan parameter for JPEG
	227	CodecJpegQuantMatrix * m_jpegQMatrix = nullptr; //!< QMatrix for JPEG
228	228	PCODECHAL_DECODE_JPEG_HUFFMAN_TABLE m_jpegHuffmanTable; //!< Huffman table for JPEG
229	229
230	230	MOS_RESOURCE m_resDataBuffer; //!< Handle of bitstream buffer

+5

-1

media_driver/agnostic/common/codec/hal/codechal_decode_sfc_jpeg.h less more

40	40	//!
41	41	//! \brief Constructor
42	42	//!
43		CodechalJpegSfcState() { CODECHAL_HW_FUNCTION_ENTER; };
	43	CodechalJpegSfcState()
	44	{
	45	CODECHAL_HW_FUNCTION_ENTER;
	46	MOS_ZeroMemory(&m_sfcInSurface, sizeof(m_sfcInSurface));
	47	};
44	48	//!
45	49	//! \brief Destructor
46	50	//!

+9

-1

media_driver/agnostic/common/codec/hal/codechal_decode_vc1.cpp less more

4798	4798	CodechalHwInterface *hwInterface,
4799	4799	CodechalDebugInterface* debugInterface,
4800	4800	PCODECHAL_STANDARD_INFO standardInfo) :
4801		CodechalDecode(hwInterface, debugInterface, standardInfo)
	4801	CodechalDecode(hwInterface, debugInterface, standardInfo),
	4802	m_huCCopyInUse(0)
4802	4803	{
4803	4804	CODECHAL_DECODE_FUNCTION_ENTER;
4804	4805

4811	4812	MOS_ZeroMemory(&m_itObjectBatchBuffer, sizeof(m_itObjectBatchBuffer));
4812	4813	MOS_ZeroMemory(m_unequalFieldSurface, sizeof(m_unequalFieldSurface));
4813	4814	MOS_ZeroMemory(m_unequalFieldRefListIdx, sizeof(m_unequalFieldRefListIdx));
	4815	MOS_ZeroMemory(&m_destSurface, sizeof(m_destSurface));
	4816	MOS_ZeroMemory(&m_deblockSurface, sizeof(m_deblockSurface));
	4817	MOS_ZeroMemory(&m_resDataBuffer, sizeof(m_resDataBuffer));
	4818	MOS_ZeroMemory(&m_resBitplaneBuffer, sizeof(m_resBitplaneBuffer));
	4819	MOS_ZeroMemory(&m_resSyncObjectWaContextInUse, sizeof(m_resSyncObjectWaContextInUse));
	4820	MOS_ZeroMemory(&m_resSyncObjectVideoContextInUse, sizeof(m_resSyncObjectVideoContextInUse));
	4821
4814	4822	}
4815	4823
4816	4824	#if USE_CODECHAL_DEBUG_TOOL

+1

-0

media_driver/agnostic/common/codec/hal/codechal_decode_vp8.cpp less more

1497	1497	m_picHeightInMbLastMaxAlloced(0),
1498	1498	m_shortFormatInUse(false),
1499	1499	m_dataSize(0),
	1500	m_dataOffset(0),
1500	1501	m_vp8PicParams(nullptr),
1501	1502	m_vp8IqMatrixParams(nullptr),
1502	1503	m_presLastRefSurface(nullptr),

+5

-5

media_driver/agnostic/common/codec/hal/codechal_decode_vp8.h less more

493	493	//!
494	494	void QuantSetup();
495	495
496		const uint8_t *m_bufferEnd; //!< Pointer to Data Buffer End
497		const uint8_t *m_buffer; //!< Pointer to Data Buffer
498		int32_t m_count; //!< Bits Count for Bitstream Buffer
499		uint32_t m_value; //!< Entropy Value
500		uint32_t m_range; //!< Entropy Range
	496	const uint8_t *m_bufferEnd = nullptr; //!< Pointer to Data Buffer End
	497	const uint8_t *m_buffer = nullptr; //!< Pointer to Data Buffer
	498	int32_t m_count = 0; //!< Bits Count for Bitstream Buffer
	499	uint32_t m_value = 0; //!< Entropy Value
	500	uint32_t m_range = 0; //!< Entropy Range
501	501	};
502	502
503	503	using PVP8_ENTROPY_STATE = Vp8EntropyState*;

+22

-1

media_driver/agnostic/common/codec/hal/codechal_decode_vp9.cpp less more

162	162	CodechalHwInterface * hwInterface,
163	163	CodechalDebugInterface *debugInterface,
164	164	PCODECHAL_STANDARD_INFO standardInfo) : CodechalDecode(hwInterface, debugInterface, standardInfo),
	165	m_usFrameWidthAlignedMinBlk(0),
	166	m_usFrameHeightAlignedMinBlk(0),
	167	m_vp9DepthIndicator(0),
	168	m_chromaFormatinProfile(0),
	169	m_dataSize(0),
	170	m_dataOffset(0),
	171	m_frameCtxIdx(0),
165	172	m_curMvTempBufIdx(0),
166	173	m_colMvTempBufIdx(0),
167	174	m_copyDataBufferSize(0),
	175	m_copyDataOffset(0),
168	176	m_copyDataBufferInUse(false),
	177	m_hcpDecPhase(0),
169	178	m_prevFrmWidth(0),
170	179	m_prevFrmHeight(0),
171	180	m_allocatedWidthInSb(0),
172	181	m_allocatedHeightInSb(0),
173	182	m_mvBufferSize(0),
	183	m_resetSegIdBuffer(false),
174	184	m_pendingResetPartial(0),
175		m_saveInterProbs(0)
	185	m_saveInterProbs(0),
	186	m_fullProbBufferUpdate(false),
	187	m_dmemBufferSize(0)
176	188	{
177	189	CODECHAL_DECODE_FUNCTION_ENTER;
178	190

196	208	MOS_ZeroMemory(&m_resSegmentIdBuffReset, sizeof(m_resSegmentIdBuffReset));
197	209	MOS_ZeroMemory(&m_resHucSharedBuffer, sizeof(m_resHucSharedBuffer));
198	210	MOS_ZeroMemory(&m_picMhwParams, sizeof(m_picMhwParams));
	211	MOS_ZeroMemory(&m_destSurface, sizeof(m_destSurface));
	212	MOS_ZeroMemory(&m_lastRefSurface, sizeof(m_lastRefSurface));
	213	MOS_ZeroMemory(&m_goldenRefSurface, sizeof(m_goldenRefSurface));
	214	MOS_ZeroMemory(&m_altRefSurface, sizeof(m_altRefSurface));
	215	MOS_ZeroMemory(&m_resDataBuffer, sizeof(m_resDataBuffer));
	216	MOS_ZeroMemory(&m_resCoefProbBuffer, sizeof(m_resCoefProbBuffer));
	217	MOS_ZeroMemory(&m_resSyncObject, sizeof(m_resSyncObject));
	218	MOS_ZeroMemory(&m_resSyncObjectWaContextInUse, sizeof(m_resSyncObjectWaContextInUse));
	219	MOS_ZeroMemory(&m_resSyncObjectVideoContextInUse, sizeof(m_resSyncObjectVideoContextInUse));
199	220
200	221	m_prevFrameParams.value = 0;
201	222

+6

-6

media_driver/agnostic/common/codec/hal/codechal_decode_vp9.h less more

201	201	uint8_t m_chromaFormatinProfile; //!< Chroma format with current profilce
202	202	uint32_t m_dataSize; //!< Data size
203	203	uint32_t m_dataOffset; //!< Date offset
204		PCODEC_VP9_PIC_PARAMS m_vp9PicParams; //!< Pointer to VP9 picture parameter
205		PCODEC_VP9_SEGMENT_PARAMS m_vp9SegmentParams; //!< Pointer to VP9 segment parameter
206		PCODEC_VP9_SLICE_PARAMS m_vp9SliceParams; //!< Pointer to VP9 slice parameter
	204	PCODEC_VP9_PIC_PARAMS m_vp9PicParams = nullptr; //!< Pointer to VP9 picture parameter
	205	PCODEC_VP9_SEGMENT_PARAMS m_vp9SegmentParams = nullptr; //!< Pointer to VP9 segment parameter
	206	PCODEC_VP9_SLICE_PARAMS m_vp9SliceParams = nullptr; //!< Pointer to VP9 slice parameter
207	207	MOS_SURFACE m_destSurface; //!< MOS_SURFACE of render surface
208		PMOS_RESOURCE m_presLastRefSurface; //!< Pointer to last reference surface
209		PMOS_RESOURCE m_presGoldenRefSurface; //!< Pointer to golden reference surface
210		PMOS_RESOURCE m_presAltRefSurface; //!< Pointer to alternate reference surface
	208	PMOS_RESOURCE m_presLastRefSurface = nullptr; //!< Pointer to last reference surface
	209	PMOS_RESOURCE m_presGoldenRefSurface = nullptr; //!< Pointer to golden reference surface
	210	PMOS_RESOURCE m_presAltRefSurface = nullptr; //!< Pointer to alternate reference surface
211	211	MOS_SURFACE m_lastRefSurface; //!< MOS_SURFACE of last reference surface
212	212	MOS_SURFACE m_goldenRefSurface; //!< MOS_SURFACE of golden reference surface
213	213	MOS_SURFACE m_altRefSurface; //!< MOS_SURFACE of alternate reference surface

+2

-2

media_driver/agnostic/common/codec/hal/codechal_decoder.cpp less more

228	228	{
229	229	CODECHAL_DECODE_FUNCTION_ENTER;
230	230
	231	MOS_ZeroMemory(&m_dummyReference, sizeof(MOS_SURFACE));
	232
231	233	CODECHAL_DECODE_CHK_NULL_NO_STATUS_RETURN(hwInterface);
232	234	CODECHAL_DECODE_CHK_NULL_NO_STATUS_RETURN(hwInterface->GetOsInterface());
233	235	CODECHAL_DECODE_CHK_NULL_NO_STATUS_RETURN(hwInterface->GetMiInterface());

250	252
251	253	m_mode = standardInfo->Mode;
252	254	m_isHybridDecoder = standardInfo->bIsHybridCodec ? true : false;
253
254		MOS_ZeroMemory(&m_dummyReference, sizeof(MOS_SURFACE));
255	255	}
256	256
257	257	MOS_STATUS CodechalDecode::SetGpuCtxCreatOption(

+1

-1

media_driver/agnostic/common/codec/hal/codechal_encode_hevc.h less more

154	154	PCODECHAL_ENCODE_BINDING_TABLE_GENERIC m_brcKernelBindingTable = nullptr; //!< BRC kernel binding table
155	155	PMOS_SURFACE m_brcDistortion = nullptr; //!< Pointer to BRC distortion surface
156	156	HevcEncBrcBuffers m_brcBuffers; //!< BRC buffers
157		uint32_t m_numBrcKrnStates; //!< Number of BRC kernel states
	157	uint32_t m_numBrcKrnStates = 0; //!< Number of BRC kernel states
158	158	uint8_t m_slidingWindowSize = 0; //!< Sliding window size in number of frames
159	159	bool m_roiRegionSmoothEnabled = false; //!< ROI region smooth transition enable flag
160	160	HEVC_BRC_FRAME_TYPE m_currFrameBrcLevel = HEVC_BRC_FRAME_TYPE_I; //!< frame brc level

+1

-1

media_driver/agnostic/common/codec/hal/codechal_encoder_base.h less more

799	799	struct CODECHAL_ENCODE_BUFFER
800	800	{
801	801	MOS_RESOURCE sResource;
802		uint32_t dwSize;
	802	uint32_t dwSize = 0;
803	803	};
804	804	using PCODECHAL_ENCODE_BUFFER = CODECHAL_ENCODE_BUFFER*;
805	805

+10

-10

media_driver/agnostic/common/codec/hal/codechal_huc_cmd_initializer.h less more

208	208	public:
209	209	static constexpr uint32_t m_hucCmdInitializerKernelDescriptor = 14; //!< VDBox Huc cmd initializer kernel descriptoer
210	210
211		bool m_pakOnlyPass;
212		bool m_acqpEnabled;
213		bool m_brcEnabled;
214		bool m_streamInEnabled;
215		bool m_roundingEnabled;
216		bool m_panicEnabled;
217		bool m_roiStreamInEnabled;
	211	bool m_pakOnlyPass = false;
	212	bool m_acqpEnabled = false;
	213	bool m_brcEnabled = false;
	214	bool m_streamInEnabled = false;
	215	bool m_roundingEnabled = false;
	216	bool m_panicEnabled = false;
	217	bool m_roiStreamInEnabled = false;
218	218	int32_t m_currentPass = 0;
219	219	int32_t m_cmdCount = 0 ;
220	220

230	230	//VP9 related changes
231	231	Vp9CmdInitializerParams m_vp9Params;
232	232	#endif
233		CodechalHwInterface* m_hwInterface;
	233	CodechalHwInterface* m_hwInterface = nullptr;
234	234	MOS_RESOURCE m_cmdInitializerDmemBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][3];
235	235	MOS_RESOURCE m_cmdInitializerDataBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][3];
236		MOS_RESOURCE m_cmdInitializerDysScalingDmemBuffer;
237		MOS_RESOURCE m_cmdInitializerDysScalingDataBuffer;
	236	MOS_RESOURCE m_cmdInitializerDysScalingDmemBuffer = {0};
	237	MOS_RESOURCE m_cmdInitializerDysScalingDataBuffer = {0};
238	238
239	239	static constexpr uint32_t CODECHAL_CMD1_SIZE = 120;
240	240	static constexpr uint32_t CODECHAL_CMD2_SIZE = 148;

+2

-1

media_driver/agnostic/common/codec/hal/codechal_memdecomp.cpp less more

177	177	}
178	178
179	179	MediaMemDecompState::MediaMemDecompState() :
180		MediaMemDecompBaseState()
	180	MediaMemDecompBaseState(),
	181	m_currCmdBufId(0)
181	182	{
182	183	MHW_FUNCTION_ENTER;
183	184	m_stateHeapSettings.m_ishBehavior = HeapManager::Behavior::clientControlled;

+1

-1

media_driver/agnostic/common/codec/hal/codechal_memdecomp.h less more

210	210	bool m_renderContextUsesNullHw = false; //!< Indicate if render context use null hw or not
211	211	bool m_disableDecodeSyncLock = false; //!< Indicate if decode sync lock disabled or not
212	212	bool m_disableLockForTranscode = false; //!< Indicate if lock is disabled for transcode or not
213		uint32_t *m_cmdBufIdGlobal; //!< Pointer to command buffer global Id
	213	uint32_t *m_cmdBufIdGlobal = nullptr; //!< Pointer to command buffer global Id
214	214	MOS_RESOURCE m_resCmdBufIdGlobal; //!< Resource for command buffer global Id
215	215	uint32_t m_currCmdBufId; //!< Current command buffer Id
216	216	};

+4

-4

media_driver/agnostic/common/codec/hal/codechal_vdenc_hevc.h less more

144	144	MOS_RESOURCE m_vdencReadBatchBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][CODECHAL_VDENC_BRC_NUM_OF_PASSES]; //!< VDEnc read batch buffer
145	145	MOS_RESOURCE m_vdencGroup3BatchBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][CODECHAL_VDENC_BRC_NUM_OF_PASSES]; //!< VDEnc read batch buffer for Group3
146	146	MOS_RESOURCE m_vdencBrcDbgBuffer; //!< VDEnc brc debug buffer
147		uint32_t m_deltaQpRoiBufferSize; //!< VDEnc DeltaQp for ROI buffer size
148		uint32_t m_brcRoiBufferSize; //!< BRC ROI input buffer size
	147	uint32_t m_deltaQpRoiBufferSize = 0; //!< VDEnc DeltaQp for ROI buffer size
	148	uint32_t m_brcRoiBufferSize = 0; //!< BRC ROI input buffer size
149	149
150	150	// Batch Buffer for VDEnc
151	151	MHW_BATCH_BUFFER m_vdenc2ndLevelBatchBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM]; //!< VDEnc 2nd level batch buffer

167	167
168	168	PCODECHAL_CMD_INITIALIZER m_hucCmdInitializer = nullptr;
169	169
170		MOS_RESOURCE m_resDelayMinus;
171		uint32_t m_numDelay;
	170	MOS_RESOURCE m_resDelayMinus = {0};
	171	uint32_t m_numDelay = 0;
172	172
173	173	protected:
174	174	//!

+1

-1

media_driver/agnostic/common/heap_manager/memory_block_manager.h less more

436	436	//! to the udpated value may be re-used.
437	437	uint32_t *m_trackerData = nullptr;
438	438	PMOS_INTERFACE m_osInterface = nullptr; //!< OS interface used for managing graphics resources
439		bool m_lockHeapsOnAllocate; //!< All heaps allocated with the keep locked flag.
	439	bool m_lockHeapsOnAllocate = false; //!< All heaps allocated with the keep locked flag.
440	440
441	441	//! \brief Persistent storage for the sorted sizes used during AcquireSpace()
442	442	std::list<SortedSizePair> m_sortedSizes;

+3

-0

media_driver/agnostic/common/hw/mhw_mi.cpp less more

31	31	PMOS_INTERFACE osInterface)
32	32	{
33	33	MHW_FUNCTION_ENTER;
	34
	35	MOS_ZeroMemory(&UseGlobalGtt, sizeof(UseGlobalGtt));
	36	MOS_ZeroMemory(&MediaResetParam, sizeof(MediaResetParam));
34	37
35	38	if (cpInterface == nullptr \|\| osInterface == nullptr)
36	39	{

+2

-2

media_driver/agnostic/common/hw/mhw_mi.h less more

728	728	MOS_STATUS (*AddResourceToCmd) (
729	729	PMOS_INTERFACE pOsInterface,
730	730	PMOS_COMMAND_BUFFER cmdBuffer,
731		PMHW_RESOURCE_PARAMS params);
	731	PMHW_RESOURCE_PARAMS params) = nullptr;
732	732
733	733	//!
734	734	//! \brief Helper function to get GTT type (PGTT or GGTT)

757	757	} MediaResetParam;
758	758
759	759	//! \brief Mmio registers address
760		MHW_MI_MMIOREGISTERS m_mmioRegisters; //!< mfx mmio registers
	760	MHW_MI_MMIOREGISTERS m_mmioRegisters = {}; //!< mfx mmio registers
761	761
762	762	};
763	763

+5

-3

media_driver/agnostic/common/hw/mhw_sfc.cpp less more

31	31	{
32	32	MHW_FUNCTION_ENTER;
33	33
	34	MOS_ZeroMemory(&m_outputSurfCtrl, sizeof(m_outputSurfCtrl));
	35	MOS_ZeroMemory(&m_avsLineBufferCtrl, sizeof(m_avsLineBufferCtrl));
	36	MOS_ZeroMemory(&m_iefLineBufferCtrl, sizeof(m_iefLineBufferCtrl));
	37	pfnAddResourceToCmd = nullptr;
	38
34	39	if (pOsInterface == nullptr)
35	40	{
36	41	MHW_ASSERTMESSAGE("Invalid input pointers provided");

43	48	}
44	49
45	50	m_osInterface = pOsInterface;
46		memset(&m_outputSurfCtrl, 0, sizeof(m_outputSurfCtrl));
47		memset(&m_avsLineBufferCtrl, 0, sizeof(m_avsLineBufferCtrl));
48		memset(&m_iefLineBufferCtrl, 0, sizeof(m_iefLineBufferCtrl));
49	51
50	52	if (m_osInterface->bUsesGfxAddress)
51	53	{

+3

-1

media_driver/agnostic/common/hw/mhw_vebox.cpp less more

364	364	{
365	365	MHW_FUNCTION_ENTER;
366	366
	367	MOS_ZeroMemory(&m_veboxSettings, sizeof(m_veboxSettings));
	368	pfnAddResourceToCmd = nullptr;
	369
367	370	if (pOsInterface == nullptr)
368	371	{
369	372	MHW_ASSERTMESSAGE("Invalid input pointers provided");
370	373	return;
371	374	}
372	375	m_osInterface = pOsInterface;
373		memset(&m_veboxSettings, 0, sizeof(m_veboxSettings));
374	376
375	377	if (m_osInterface->bUsesGfxAddress)
376	378	{

+9

-0

media_driver/agnostic/common/hw/vdbox/mhw_vdbox_hcp_generic.h less more

113	113
114	114	cmd.DW1.SurfaceId = params->ucSurfaceStateId;
115	115	cmd.DW1.SurfacePitchMinus1 = params->psSurface->dwPitch - 1;
	116
	117	/* Handling of reconstructed surface is different for Y410 & AYUV formats */
	118	if ((params->ucSurfaceStateId != CODECHAL_HCP_SRC_SURFACE_ID) &&
	119	(params->psSurface->Format == Format_Y410))
	120	cmd.DW1.SurfacePitchMinus1 = params->psSurface->dwPitch / 2 - 1;
	121
	122	if ((params->ucSurfaceStateId != CODECHAL_HCP_SRC_SURFACE_ID) &&
	123	(params->psSurface->Format == Format_AYUV))
	124	cmd.DW1.SurfacePitchMinus1 = params->psSurface->dwPitch / 4 - 1;
116	125
117	126	cmd.DW2.YOffsetForUCbInPixel = params->psSurface->UPlaneOffset.iYOffset;
118	127

+6

-1

media_driver/agnostic/common/os/mos_gpucontext.h less more

41	41	//!
42	42	//! \brief Constructor
43	43	//!
44		GpuContext(){}
	44	GpuContext()
	45	{
	46	m_nodeOrdinal = MOS_GPU_NODE_MAX;
	47	m_gpuContextHandle = 0;
	48	m_gpuContext = MOS_GPU_CONTEXT_RENDER;
	49	}
45	50
46	51	//!
47	52	//! \brief Destructor

+2

-1

media_driver/agnostic/common/shared/media_perf_profiler.cpp less more

105	105
106	106	MediaPerfProfiler::MediaPerfProfiler()
107	107	{
	108	MOS_ZeroMemory(&m_perfStoreBuffer, sizeof(m_perfStoreBuffer));
108	109	m_perfDataIndex = 0;
109	110	m_ref = 0;
110	111	m_initialized = false;
111	112
112	113	m_profilerEnabled = 0;
113
	114
114	115	MOS_USER_FEATURE_VALUE_DATA userFeatureData;
115	116	// Check whether profiler is enabled
116	117	MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));

+2

-0

media_driver/agnostic/common/vp/hal/vphal_debug.h less more

623	623	//!
624	624	VphalHwStateDumper(PRENDERHAL_INTERFACE pRenderHal)
625	625	: m_renderHal(pRenderHal),
	626	iDebugStage(0),
	627	iPhase(0),
626	628	m_osInterface(pRenderHal->pOsInterface),
627	629	m_hwSizes(pRenderHal->pHwSizes),
628	630	m_stateHeap(pRenderHal->pStateHeap),

+2

-1

media_driver/agnostic/common/vp/hal/vphal_mdf_wrapper.cpp less more

105	105	mBatchTask(nullptr),
106	106	mHasBatchedTask(false),
107	107	mConditionalBatchBuffer(nullptr),
108		mCondParam({ 0 })
	108	mCondParam({ 0 }),
	109	mEventListener(nullptr)
109	110	{
110	111	VPHAL_RENDER_ASSERT(sOsContext);
111	112

+1

-0

media_driver/agnostic/common/vp/hal/vphal_render_renderstate.cpp less more

48	48	m_pSkuTable(nullptr),
49	49	m_pWaTable(nullptr),
50	50	m_bDisableRender(false),
	51	m_bSingleSlice(false),
51	52	m_pPerfData(pPerfData),
52	53	m_reporting(nullptr)
53	54	{

+61

-63

media_driver/agnostic/common/vp/hal/vphal_render_vebox_base.cpp less more

4212	4212	{
4213	4213	FFDISurfaces[i] = nullptr;
4214	4214	}
	4215	VeboxRGBHistogram = {};
4215	4216	VeboxStatisticsSurface = {}; //!< Statistics Surface for VEBOX
4216	4217	RenderHalVeboxStatisticsSurface = {}; //!< Statistics Surface for VEBOX for MHW
4217	4218	#if VEBOX_AUTO_DENOISE_SUPPORTED

4295	4296	bDisableTemporalDenoiseFilter = false; //!< Temporal denoise filter disable flag - read from User feature keys
4296	4297	bDisableTemporalDenoiseFilterUserKey = false; //!< Backup temporal denoise filter disable flag - read from User feature keys
4297	4298
	4299	uiCurrentChannel = 0;
	4300
4298	4301	RenderGpuContext = pOsInterface ? (pOsInterface->CurrentGpuContextOrdinal) : MOS_GPU_CONTEXT_RENDER;
4299	4302
4300		m_hvsDenoiser = nullptr;
	4303	Vebox3DLookUpTables = { };
	4304	SfcTempSurface = { };
	4305
	4306	m_hvsDenoiser = nullptr;
	4307	m_hvsKernelBinary = nullptr;
	4308	m_hvsKernelBinarySize = 0;
4301	4309	}
4302	4310
4303	4311	VPHAL_VEBOX_STATE::~VPHAL_VEBOX_STATE()

4501	4509	}
4502	4510	m_pVeboxIecpParams->Init();
4503	4511
4504		bColorPipe = false;
4505		bIECP = false;
4506		bProcamp = false;
4507
4508	4512	// Flags
4509		bRefValid = false;
4510		bSameSamples = false;
4511		bProgressive = false;
4512		bDenoise = false;
	4513	bRefValid = false;
	4514	bSameSamples = false;
	4515	bProgressive = false;
	4516	bDenoise = false;
4513	4517	#if VEBOX_AUTO_DENOISE_SUPPORTED
4514		bAutoDenoise = false;
	4518	bAutoDenoise = false;
4515	4519	#endif
4516		bChromaDenoise = false;
4517		bOutOfBound = false;
4518		bVDIWalker = false;
4519
	4520	bChromaDenoise = false;
	4521	bOutOfBound = false;
	4522	bVDIWalker = false;
	4523	bIECP = false;
	4524	bColorPipe = false;
	4525	bProcamp = false;
4520	4526	// DNDI/Vebox
4521		bDeinterlace = false;
4522		bSingleField = false;
4523		bTFF = false;
4524		bTopField = false;
4525		bBeCsc = false;
4526		bVeboxBypass = false;
4527		b60fpsDi = false;
4528
	4527	bDeinterlace = false;
	4528	bSingleField = false;
	4529	bTFF = false;
	4530	bTopField = false;
	4531	bBeCsc = false;
	4532	bVeboxBypass = false;
	4533	b60fpsDi = false;
	4534	bQueryVariance = false;
4529	4535	// Surface Information
4530		iFrame0 = 0;
4531		iFrame1 = 0;
4532		iCurDNIn = 0;
4533		iCurDNOut = 0;
4534		iCurHistIn = 0;
4535		iCurHistOut = 0;
4536
	4536	iFrame0 = 0;
	4537	iFrame1 = 0;
	4538	iCurDNIn = 0;
	4539	iCurDNOut = 0;
	4540	iCurHistIn = 0;
	4541	iCurHistOut = 0;
4537	4542	// Geometry
4538		iBlocksX = 0;
4539		iBlocksY = 0;
4540		iBindingTable = 0;
4541		iMediaID0 = 0;
4542		iMediaID1 = 0;
4543
	4543	iBlocksX = 0;
	4544	iBlocksY = 0;
	4545	iBindingTable = 0;
	4546	iMediaID0 = 0;
	4547	iMediaID1 = 0;
4544	4548	// Perf
4545		PerfTag = VPHAL_NONE;
4546
	4549	PerfTag = VPHAL_NONE;
4547	4550	// States
4548		pMediaState = nullptr;
4549		pVeboxState = nullptr;
4550		pRenderTarget = nullptr;
4551
4552		SamplerStateParams = { };
4553
4554		VeboxDNDIParams = { };
4555
4556		pAlphaParams = nullptr;
4557
	4551	pMediaState = nullptr;
	4552	pVeboxState = nullptr;
	4553	pRenderTarget = nullptr;
	4554	SamplerStateParams = { };
	4555	VeboxDNDIParams = { };
	4556	pAlphaParams = nullptr;
4558	4557	// Batch Buffer rendering arguments
4559	4558	BbArgs = { };
4560
4561	4559	// Vebox output parameters
4562	4560	OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
4563
4564	4561	// Kernel Information
4565		int i;
4566		for (i = 0; i < VPHAL_NUM_KERNEL_VEBOX; i++)
	4562	for (int i = 0; i < VPHAL_NUM_KERNEL_VEBOX; i++)
4567	4563	{
4568	4564	pKernelParam[i] = nullptr;
4569	4565	KernelEntry[i] = { };
4570	4566	}
4571
4572		pDNUVParams = nullptr;
4573		iCurbeLength = 0;
4574		iInlineLength = 0;
4575
	4567	pDNUVParams = nullptr;
	4568	iCurbeLength = 0;
	4569	iInlineLength = 0;
4576	4570	// Debug parameters
4577		pKernelName = nullptr;
4578		Component = COMPONENT_UNKNOWN;
4579
	4571	pKernelName = nullptr;
	4572	Component = COMPONENT_UNKNOWN;
4580	4573	// Memory compression flag
4581		bEnableMMC = false;
4582
4583		fScaleX = 0.0f; //!< X Scaling ratio
4584		fScaleY = 0.0f; //!< Y Scaling ratio
	4574	bEnableMMC = false;
	4575
	4576	fScaleX = 0.0f;
	4577	fScaleY = 0.0f;
	4578
	4579	bHdr3DLut = false;
	4580	uiMaxDisplayLum = 4000;
	4581	uiMaxContentLevelLum = 1000;
	4582	hdrMode = VPHAL_HDR_MODE_NONE;
4585	4583
4586	4584	return MOS_STATUS_SUCCESS;
4587	4585	}

+87

-13

media_driver/agnostic/common/vp/hal/vphal_render_vebox_base.h less more

658	658	public:
659	659	VPHAL_VEBOX_RENDER_DATA()
660	660	{
661		m_pVeboxStateParams = nullptr;
662		m_pVeboxIecpParams = nullptr;
	661	// Flags
	662	bRefValid = false;
	663	bSameSamples = false;
	664	bProgressive = false;
	665	bDenoise = false;
	666	#if VEBOX_AUTO_DENOISE_SUPPORTED
	667	bAutoDenoise = false;
	668	#endif
	669	bChromaDenoise = false;
	670	bOutOfBound = false;
	671	bVDIWalker = false;
	672	bIECP = false;
	673	bColorPipe = false;
	674	bProcamp = false;
	675	// DNDI/Vebox
	676	bDeinterlace = false;
	677	bSingleField = false;
	678	bTFF = false;
	679	bTopField = false;
	680	bBeCsc = false;
	681	bVeboxBypass = false;
	682	b60fpsDi = false;
	683	bQueryVariance = false;
	684	// Surface Information
	685	iFrame0 = 0;
	686	iFrame1 = 0;
	687	iCurDNIn = 0;
	688	iCurDNOut = 0;
	689	iCurHistIn = 0;
	690	iCurHistOut = 0;
	691	// Geometry
	692	iBlocksX = 0;
	693	iBlocksY = 0;
	694	iBindingTable = 0;
	695	iMediaID0 = 0;
	696	iMediaID1 = 0;
	697	// Perf
	698	PerfTag = VPHAL_NONE;
	699	// States
	700	pMediaState = nullptr;
	701	pVeboxState = nullptr;
	702	pRenderTarget = nullptr;
	703	SamplerStateParams = { };
	704	VeboxDNDIParams = { };
	705	pAlphaParams = nullptr;
	706	// Batch Buffer rendering arguments
	707	BbArgs = { };
	708	// Vebox output parameters
	709	OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
	710	// Kernel Information
	711	for (int i = 0; i < VPHAL_NUM_KERNEL_VEBOX; i++)
	712	{
	713	pKernelParam[i] = nullptr;
	714	KernelEntry[i] = { };
	715	}
	716	pDNUVParams = nullptr;
	717	iCurbeLength = 0;
	718	iInlineLength = 0;
	719	// Debug parameters
	720	pKernelName = nullptr;
	721	Component = COMPONENT_UNKNOWN;
	722	// Memory compression flag
	723	bEnableMMC = false;
	724
	725	pOutputTempField = nullptr;
	726
	727	fScaleX = 0.0f;
	728	fScaleY = 0.0f;
	729
	730	bHdr3DLut = false;
	731	uiMaxDisplayLum = 4000;
	732	uiMaxContentLevelLum = 1000;
	733	hdrMode = VPHAL_HDR_MODE_NONE;
	734
	735	m_pVeboxStateParams = nullptr;
	736	m_pVeboxIecpParams = nullptr;
663	737	}
664	738	VPHAL_VEBOX_RENDER_DATA(const VPHAL_VEBOX_RENDER_DATA&) = delete;
665	739	VPHAL_VEBOX_RENDER_DATA& operator=(const VPHAL_VEBOX_RENDER_DATA&) = delete;

753	827	// Scaling ratio is needed to determine if SFC or VEBOX is used
754	828	float fScaleX; //!< X Scaling ratio
755	829	float fScaleY; //!< Y Scaling ratio
756
757		bool bHdr3DLut = false; //!< Enable 3DLut to process HDR
758		uint32_t uiMaxDisplayLum = 4000; //!< Maximum Display Luminance
759		uint32_t uiMaxContentLevelLum = 1000; //!< Maximum Content Level Luminance
760		VPHAL_HDR_MODE hdrMode = VPHAL_HDR_MODE_NONE;
	830
	831	bool bHdr3DLut; //!< Enable 3DLut to process HDR
	832	uint32_t uiMaxDisplayLum; //!< Maximum Display Luminance
	833	uint32_t uiMaxContentLevelLum; //!< Maximum Content Level Luminance
	834	VPHAL_HDR_MODE hdrMode;
761	835
762	836	protected:
763	837	// Vebox State Parameters

976	1050
977	1051	MOS_GPU_CONTEXT RenderGpuContext; //!< Render GPU context
978	1052
979		VPHAL_SURFACE Vebox3DLookUpTables = {};
980		VPHAL_SURFACE SfcTempSurface = {};
981
982		VphalHVSDenoiser *m_hvsDenoiser = nullptr; //!< Human Vision System Based Denoiser - Media Kernel to generate DN parameter
983		uint8_t *m_hvsKernelBinary = nullptr; //!< Human Vision System Based Denoiser - Pointer to HVS kernel Binary
984		uint32_t m_hvsKernelBinarySize = 0; //!< Human Vision System Based Denoiser - Size of HVS kernel Binary
	1053	VPHAL_SURFACE Vebox3DLookUpTables;
	1054	VPHAL_SURFACE SfcTempSurface;
	1055
	1056	VphalHVSDenoiser *m_hvsDenoiser; //!< Human Vision System Based Denoiser - Media Kernel to generate DN parameter
	1057	uint8_t *m_hvsKernelBinary; //!< Human Vision System Based Denoiser - Pointer to HVS kernel Binary
	1058	uint32_t m_hvsKernelBinarySize; //!< Human Vision System Based Denoiser - Size of HVS kernel Binary
985	1059
986	1060	protected:
987	1061	PVPHAL_VEBOX_IECP_RENDERER m_IECP; //!< pointer to IECP Renderer module, which contains more filters like TCC, STE.

+8

-0

media_driver/agnostic/common/vp/hal/vphal_render_vebox_iecp.h less more

58	58	{
59	59	pColorPipeParams = nullptr;
60	60	pProcAmpParams = nullptr;
	61	dstFormat = Format_Any;
	62	srcFormat = Format_Any;
	63	bCSCEnable = false;
	64	pfCscCoeff = nullptr;
	65	pfCscInOffset = nullptr;
	66	pfCscOutOffset = nullptr;
	67	bAlphaEnable = false;
	68	wAlphaValue = 0;
61	69	}
62	70	virtual ~VPHAL_VEBOX_IECP_PARAMS()
63	71	{

+12

-0

media_driver/agnostic/gen10/codec/hal/codechal_encode_csc_ds_g10.h less more

200	200	DW1 =
201	201	DW2_FlatnessThreshold =
202	202	DW3_EnableMBStatSurface =
	203	DW4_CscCoefficientC0 =
	204	DW4_CscCoefficientC1 =
	205	DW5_CscCoefficientC2 =
	206	DW5_CscCoefficientC3 =
	207	DW6_CscCoefficientC4 =
	208	DW6_CscCoefficientC5 =
	209	DW7_CscCoefficientC6 =
	210	DW7_CscCoefficientC7 =
	211	DW8_CscCoefficientC8 =
	212	DW8_CscCoefficientC9 =
	213	DW9_CscCoefficientC10 =
	214	DW9_CscCoefficientC11 =
203	215	DW10_Reserved =
204	216	DW11_Reserved =
205	217	DW12_Reserved =

+13

-1

media_driver/agnostic/gen11/codec/hal/codechal_encode_csc_ds_g11.h less more

223	223	DW0 =
224	224	DW1 =
225	225	DW2 =
226		DW3_MBFlatnessThreshold = 0;
	226	DW3_MBFlatnessThreshold =
	227	DW4_CSC_Coefficient_C0 =
	228	DW4_CSC_Coefficient_C1 =
	229	DW5_CSC_Coefficient_C2 =
	230	DW5_CSC_Coefficient_C3 =
	231	DW6_CSC_Coefficient_C4 =
	232	DW6_CSC_Coefficient_C5 =
	233	DW7_CSC_Coefficient_C6 =
	234	DW7_CSC_Coefficient_C7 =
	235	DW8_CSC_Coefficient_C8 =
	236	DW8_CSC_Coefficient_C9 =
	237	DW9_CSC_Coefficient_C10 =
	238	DW9_CSC_Coefficient_C11 = 0;
227	239	DW10_BTI_InputSurface = cscSrcYPlane;
228	240	DW11_BTI_Enc8BitSurface = cscDstConvYPlane;
229	241	DW12_BTI_4xDsSurface = cscDst4xDs;

+1

-1

media_driver/agnostic/gen11/codec/hal/codechal_huc_cmd_initializer_g11.h less more

266	266
267	267	MOS_RESOURCE m_cmdInitializerCopyDmemBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][CODECHAL_VDENC_BRC_NUM_OF_PASSES]; //!< Dmem buffer for huc cmd initialization copy
268	268	MOS_RESOURCE m_cmdInitializerCopyDataBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][CODECHAL_VDENC_BRC_NUM_OF_PASSES]; //!< Data buffer for huc cmd initialization copy
269		MHW_BATCH_BUFFER m_vdencCopyBatchBuffer; //!< SLB for huc cmd initialization copy
	269	MHW_BATCH_BUFFER m_vdencCopyBatchBuffer = {}; //!< SLB for huc cmd initialization copy
270	270
271	271	//!
272	272	//! \brief Set dmem buffer for huc cmd initialization copy

+1

-1

media_driver/agnostic/gen11/hw/vdbox/mhw_vdbox_hcp_g11_X.cpp less more

1308	1308	mhw_vdbox_hcp_g11_X::HCP_SURFACE_STATE_CMD *cmd =
1309	1309	(mhw_vdbox_hcp_g11_X::HCP_SURFACE_STATE_CMD*)cmdBuffer->pCmdPtr;
1310	1310
1311		MHW_MI_CHK_STATUS(MhwVdboxHcpInterfaceGeneric<mhw_vdbox_hcp_g11_X>::AddHcpDecodeSurfaceStateCmd(cmdBuffer, params));
	1311	MHW_MI_CHK_STATUS(MhwVdboxHcpInterfaceGeneric<mhw_vdbox_hcp_g11_X>::AddHcpEncodeSurfaceStateCmd(cmdBuffer, params));
1312	1312
1313	1313	bool surf10bit= (params->psSurface->Format == Format_P010) \|\|
1314	1314	(params->psSurface->Format == Format_P210) \|\|

+7

-0

media_driver/agnostic/gen11/hw/vdbox/mhw_vdbox_vdenc_g11_X.h less more

1069	1069	if (cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatY416Variant \|\|
1070	1070	cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatAyuvVariant)
1071	1071	{
	1072	/* Y410/Y416 Reconstructed format handling */
	1073	if (cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatY416Variant)
	1074	cmd.Dwords25.DW1.SurfacePitch = params->psSurface->dwPitch / 2 - 1;
	1075	/* AYUV Reconstructed format handling */
	1076	if (cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatAyuvVariant)
	1077	cmd.Dwords25.DW1.SurfacePitch = params->psSurface->dwPitch / 4 - 1;
	1078
1072	1079	cmd.Dwords25.DW2.YOffsetForUCb = params->dwReconSurfHeight;
1073	1080	cmd.Dwords25.DW3.YOffsetForVCr = params->dwReconSurfHeight << 1;
1074	1081	}

+2

-2

media_driver/agnostic/gen8/codec/hal/codechal_decode_vc1_g8.cpp less more

288	288	PCODECHAL_STANDARD_INFO standardInfo) :
289	289	CodechalDecodeVc1(hwInterface, debugInterface, standardInfo)
290	290	{
	291	MOS_ZeroMemory(&m_olpBatchBuffer, sizeof(m_olpBatchBuffer));
	292
291	293	CODECHAL_DECODE_CHK_NULL_NO_STATUS_RETURN(hwInterface);
292	294
293	295	m_olpCurbeStaticDataLength = CODECHAL_DECODE_VC1_CURBE_SIZE_OLP_G8;
294
295		MOS_ZeroMemory(&m_olpBatchBuffer, sizeof(m_olpBatchBuffer));
296	296
297	297	MOS_STATUS eStatus = CodecHalGetKernelBinaryAndSize(
298	298	(uint8_t *)IGCODECKRN_G8,

+12

-0

media_driver/agnostic/gen9/codec/hal/codechal_encode_csc_ds_g9.h less more

200	200	DW1 =
201	201	DW2_FlatnessThreshold =
202	202	DW3_EnableMBStatSurface =
	203	DW4_CscCoefficientC0 =
	204	DW4_CscCoefficientC1 =
	205	DW5_CscCoefficientC2 =
	206	DW5_CscCoefficientC3 =
	207	DW6_CscCoefficientC4 =
	208	DW6_CscCoefficientC5 =
	209	DW7_CscCoefficientC6 =
	210	DW7_CscCoefficientC7 =
	211	DW8_CscCoefficientC8 =
	212	DW8_CscCoefficientC9 =
	213	DW9_CscCoefficientC10 =
	214	DW9_CscCoefficientC11 =
203	215	DW10_Reserved =
204	216	DW11_Reserved =
205	217	DW12_Reserved =

+3

-3

media_driver/agnostic/gen9_skl/codec/hal/codechal_fei_hevc_g9_skl.h less more

592	592
593	593	private:
594	594	// Resources for the render engine
595		MOS_SURFACE m_lcuQP; //!< input LCU QP surface
596
597		CodecEncodeHevcFeiPicParams *m_feiPicParams;
	595	MOS_SURFACE m_lcuQP = {}; //!< input LCU QP surface
	596
	597	CodecEncodeHevcFeiPicParams *m_feiPicParams = nullptr;
598	598
599	599	//!
600	600	//! \brief Get encoder kernel header and kernel size

+4

-4

media_driver/linux/common/cm/cm_def_os.h less more

111	111	{
112	112	public:
113	113	CM_NOINLINE SurfaceIndex() { index = 0; extraByte = 0; };
114		CM_NOINLINE SurfaceIndex(const SurfaceIndex& src) { index = src.index; };
115		CM_NOINLINE SurfaceIndex(const unsigned int& n) { index = n; };
	114	CM_NOINLINE SurfaceIndex(const SurfaceIndex& src) { index = src.index; extraByte = src.extraByte; };
	115	CM_NOINLINE SurfaceIndex(const unsigned int& n) { index = n; extraByte = 0; };
116	116	CM_NOINLINE SurfaceIndex& operator = (const unsigned int& n) { this->index = n; return *this; };
117	117	CM_NOINLINE SurfaceIndex& operator + (const unsigned int& n) { this->index += n; return *this; };
118	118	CM_NOINLINE SurfaceIndex& operator= (const SurfaceIndex& other) { this->index = other.index; return *this; };

140	140	{
141	141	public:
142	142	CM_NOINLINE SamplerIndex() { index = 0; extraByte = 0;};
143		CM_NOINLINE SamplerIndex(SamplerIndex& src) { index = src.get_data(); };
144		CM_NOINLINE SamplerIndex(const unsigned int& n) { index = n; };
	143	CM_NOINLINE SamplerIndex(SamplerIndex& src) { index = src.get_data(); extraByte = src.extraByte; };
	144	CM_NOINLINE SamplerIndex(const unsigned int& n) { index = n; extraByte = 0; };
145	145	CM_NOINLINE SamplerIndex& operator = (const unsigned int& n) { this->index = n; return *this; };
146	146	virtual unsigned int get_data(void) { return index; };
147	147	virtual ~SamplerIndex(){};

+1

-1

media_driver/linux/common/cm/cm_device_rt_os.cpp less more

565	565	snprintf(traceFile+offset, 256-offset, "%s", "/.mdf_trace");
566	566
567	567	FILE *traceFd = fopen(traceFile, "r");
568		uint flag = 0;
	568	int flag = 0;
569	569	if(traceFd )
570	570	{
571	571	//read data from file

+4

-3

media_driver/linux/common/cm/cm_surface_2d_rt.cpp less more

45	45	CM_SURFACE_FORMAT format,
46	46	CmSurfaceManager* surfaceManager ,
47	47	bool isCmCreated):
48		CmSurface2DRTBase(handle, width, height, pitch, format, surfaceManager, isCmCreated)
	48	CmSurface2DRTBase(handle, width, height, pitch, format, surfaceManager, isCmCreated),
	49	m_vaSurfaceID(0),
	50	m_vaCreated(0),
	51	m_vaDisplay(nullptr)
49	52	{
50		m_vaSurfaceID = 0;
51		m_vaCreated = 0;
52	53	}
53	54
54	55	//*-----------------------------------------------------------------------------

+9

-0

media_driver/linux/common/codec/ddi/media_ddi_decode_base.cpp less more

38	38	m_ddiDecodeAttr = ddiDecodeAttr;
39	39	m_ddiDecodeCtx = nullptr;
40	40	MOS_ZeroMemory(&m_destSurface, sizeof(m_destSurface));
	41	m_groupIndex = 0;
	42	m_picWidthInMB = 0;
	43	m_picHeightInMB = 0;
	44	m_decProcessingType = 0;
	45	m_width = 0;
	46	m_height = 0;
	47	m_streamOutEnabled = false;
	48	m_sliceParamBufNum = 0;
	49	m_sliceCtrlBufNum = 0;
41	50	m_codechalSettings = CodechalSetting::CreateCodechalSetting();
42	51	}
43	52

+1

-1

media_driver/linux/common/codec/ddi/media_ddi_encode_vp9.h less more

321	321
322	322	uint32_t lastPackedHeaderType = 0;
323	323
324		uint8_t vp9TargetUsage;
	324	uint8_t vp9TargetUsage = 0;
325	325	};

+1

-0

media_driver/linux/common/ddi/media_libva.cpp less more

2161	2161	surfDesc->uiTile = I915_TILING_NONE;
2162	2162	if (surfDesc->ulBuffer % 4096 != 0)
2163	2163	{
	2164	MOS_FreeMemory(surfDesc);
2164	2165	DDI_VERBOSEMESSAGE("Buffer Address is invalid");
2165	2166	return VA_STATUS_ERROR_INVALID_PARAMETER;
2166	2167	}

+1

-0

media_driver/linux/common/ddi/media_libva_common.cpp less more

335	335	PDDI_MEDIA_SURFACE dstSurface = (DDI_MEDIA_SURFACE *)MOS_AllocAndZeroMemory(sizeof(DDI_MEDIA_SURFACE));
336	336	if (nullptr == surfaceElement)
337	337	{
	338	MOS_FreeMemory(dstSurface);
338	339	return nullptr;
339	340	}
340	341

+7

-1

media_driver/linux/common/ddi/media_libva_putsurface_linux.cpp less more

869	869	uint8_t *umdContextY = dispTempBuffer;
870	870	uint8_t ptr = (uint8_t)DdiMediaUtil_LockSurface(mediaSurface, (MOS_LOCKFLAG_READONLY \| MOS_LOCKFLAG_WRITEONLY));
871	871	MOS_STATUS eStatus = MOS_SecureMemcpy(umdContextY, surfaceSize, ptr, surfaceSize);
872		DDI_CHK_CONDITION((eStatus != MOS_STATUS_SUCCESS), "DDI:Failed to copy surface buffer data!", VA_STATUS_ERROR_OPERATION_FAILED);
	872
	873	if (eStatus != MOS_STATUS_SUCCESS)
	874	{
	875	MOS_FreeMemory(dispTempBuffer);
	876	DDI_ASSERTMESSAGE("DDI:Failed to copy surface buffer data!");
	877	return VA_STATUS_ERROR_OPERATION_FAILED;
	878	}
873	879
874	880	Visual *visual = DefaultVisual(ctx->native_dpy, ctx->x11_screen);
875	881	GC gc = (pfn_XCreateGC)((Display)ctx->native_dpy, (Drawable)draw, 0, nullptr);

+1

-0

media_driver/linux/common/os/i915/mos_bufmgr.c less more

3978	3978	if (ret != 0) {
3979	3979	MOS_DBG("DRM_IOCTL_I915_GEM_VM_CREATE failed: %s\n",
3980	3980	strerror(errno));
	3981	free(vm);
3981	3982	return nullptr;
3982	3983	}
3983	3984

+1

-0

media_driver/linux/common/os/mos_gpucontext_specific.cpp less more

45	45	m_cmdBufMgr = cmdBufMgr;
46	46	m_gpuContext = mosGpuCtx;
47	47	m_statusBufferResource = nullptr;
	48	m_maxPatchLocationsize = PATCHLOCATIONLIST_SIZE;
48	49
49	50	if (reusedContext)
50	51	{

+2

-2

media_driver/linux/common/os/mos_gpucontext_specific.h less more

236	236	//! \brief Os context
237	237	OsContext *m_osContext = nullptr;
238	238
239		MOS_GPUCTX_CREATOPTIONS_ENHANCED *m_createOptionEnhanced;
	239	MOS_GPUCTX_CREATOPTIONS_ENHANCED *m_createOptionEnhanced = nullptr;
240	240	MOS_LINUX_CONTEXT* m_i915Context = nullptr;
241		uint32_t m_i915ExecFlag;
	241	uint32_t m_i915ExecFlag = 0;
242	242
243	243	#if MOS_COMMAND_RESINFO_DUMP_SUPPORTED
244	244	std::vector<const void *> m_cmdResPtrs; //!< Command OS resource pointers registered by pfnRegisterResource

+2

-1

media_driver/linux/common/os/mos_os_specific.c less more

1798	1798	return;
1799	1799	}
1800	1800
1801		return gpuContext->ResetGpuContextStatus();
	1801	gpuContext->ResetGpuContextStatus();
	1802	return;
1802	1803	}
1803	1804
1804	1805	pOsContext = pOsInterface->pOsContext;

+3

-0

media_driver/linux/common/os/mos_utilities_specific.c less more

1227	1227
1228	1228	if ( (eStatus = _UserFeature_DumpFile(szUserFeatureFile, &pKeyList)) != MOS_STATUS_SUCCESS )
1229	1229	{
	1230	MOS_FreeMemory(pKeyList);
1230	1231	return eStatus;
1231	1232	}
1232	1233

1329	1330	if ( (eStatus = _UserFeature_DumpFile(szUserFeatureFile, &pKeyList)) !=
1330	1331	MOS_STATUS_SUCCESS )
1331	1332	{
	1333	MOS_FreeMemory(pKeyList);
1332	1334	return eStatus;
1333	1335	}
1334	1336

1381	1383	if ( (eStatus = _UserFeature_DumpFile(szUserFeatureFile, &pKeyList)) !=
1382	1384	MOS_STATUS_SUCCESS )
1383	1385	{
	1386	MOS_FreeMemory(pKeyList);
1384	1387	return eStatus;
1385	1388	}
1386	1389

+5

-1

media_driver/linux/ult/ult_app/cm/mock_device.h less more

77	77	static vaDestroySurfacesFunc vaDestroySurfaces;
78	78
79	79	MockDevice(): vaCmExtSendReqMsg(nullptr),
80		m_cmDevice(nullptr) {}
	80	m_cmDevice(nullptr)
	81	{
	82	MOS_ZeroMemory(&vaCmExtSendReqMsg, sizeof(vaCmExtSendReqMsg));
	83	MOS_ZeroMemory(&m_vaDisplay, sizeof(m_vaDisplay));
	84	}
81	85
82	86	~MockDevice() { Release(); }
83	87

+3

-3

media_driver/linux/ult/ult_app/driver_loader.h less more

123	123
124	124	public:
125	125
126		VADriverContext m_ctx;
127		VADriverVTable m_vtable;
128		VADriverVTableVPP m_vtable_vpp;
	126	VADriverContext m_ctx = {};
	127	VADriverVTable m_vtable = {};
	128	VADriverVTableVPP m_vtable_vpp = {};
129	129
130	130	private:
131	131