Codebase list ohcount / upstream/3.1.1 test / src_dir / vhdl1.vhdl
upstream/3.1.1

Tree @upstream/3.1.1 (Download .tar.gz)

vhdl1.vhdl @upstream/3.1.1 — raw · history · blame 

 1
 2
 3
 4
 5
 6
 7
 8
 9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
library ieee;
use ieee.std_logic_1164.all;

entity tb is
end tb;

architecture behav of tb is

  -- toggle period
  constant period_c : time := 1 ms;

  -- we'll be poking on this signal
  signal toggle_s : std_logic_vector(1 downto 0) := "01";

begin

  -----------------------------------------------------------------------------
  -- Process toggle
  --
  -- Purpose:
  --   Flip the toggle_s signal periodically.
  --
  toggle: process
  begin

    wait for period_c/2;
    toggle_s <= not toggle_s;

  end process toggle;
  --
  -----------------------------------------------------------------------------

end behav;

configuration tb_behav_c0 of tb is

  for behav
  end for;

end tb_behav_c0;