engines/asm/e_padlock*: add support for Zhaoxin's x86 platform
VIA and Shanghai United Investment Co.,Ltd. found Shanghai ZhaoXin,
which is a fabless x86 CPU IC design company. ZhaoXin has issued
ZX-C, ZX-D x86 processors, which have 'Shanghai' CPU vendor id.
Reviewed-by: Andy Polyakov <appro@openssl.org>
Reviewed-by: Matt Caswell <matt@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/5640)
JeffZhao authored 6 years ago
Andy Polyakov committed 6 years ago
72 | 72 |
&cpuid ();
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73 | 73 |
&xor ("eax","eax");
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74 | 74 |
&cmp ("ebx","0x".unpack("H*",'tneC'));
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75 | |
&jne (&label("noluck"));
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75 |
&jne (&label("zhaoxin"));
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76 | 76 |
&cmp ("edx","0x".unpack("H*",'Hrua'));
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77 | 77 |
&jne (&label("noluck"));
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78 | 78 |
&cmp ("ecx","0x".unpack("H*",'slua'));
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79 | 79 |
&jne (&label("noluck"));
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80 |
&jmp (&label("zhaoxinEnd"));
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81 |
&set_label("zhaoxin");
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82 |
&cmp ("ebx","0x".unpack("H*",'hS '));
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83 |
&jne (&label("noluck"));
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84 |
&cmp ("edx","0x".unpack("H*",'hgna'));
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85 |
&jne (&label("noluck"));
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86 |
&cmp ("ecx","0x".unpack("H*",' ia'));
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87 |
&jne (&label("noluck"));
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88 |
&set_label("zhaoxinEnd");
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80 | 89 |
&mov ("eax",0xC0000000);
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81 | 90 |
&cpuid ();
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82 | 91 |
&mov ("edx","eax");
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56 | 56 |
cpuid
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57 | 57 |
xor %eax,%eax
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58 | 58 |
cmp \$`"0x".unpack("H*",'tneC')`,%ebx
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59 | |
jne .Lnoluck
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59 |
jne .Lzhaoxin
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60 | 60 |
cmp \$`"0x".unpack("H*",'Hrua')`,%edx
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61 | 61 |
jne .Lnoluck
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62 | 62 |
cmp \$`"0x".unpack("H*",'slua')`,%ecx
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63 | 63 |
jne .Lnoluck
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64 |
jmp .LzhaoxinEnd
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65 |
.Lzhaoxin:
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66 |
cmp \$`"0x".unpack("H*",'hS ')`,%ebx
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67 |
jne .Lnoluck
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68 |
cmp \$`"0x".unpack("H*",'hgna')`,%edx
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69 |
jne .Lnoluck
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70 |
cmp \$`"0x".unpack("H*",' ia')`,%ecx
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71 |
jne .Lnoluck
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72 |
.LzhaoxinEnd:
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64 | 73 |
mov \$0xC0000000,%eax
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65 | 74 |
cpuid
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66 | 75 |
mov %eax,%edx
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